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64dd7a2e89
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761 Commits

Author SHA1 Message Date
Devang Patel
64dd7a2e89 Large mechanical patch. 
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.

llvm-svn: 56622
 2008-09-25 21:00:45 +00:00
Evan Cheng
d190aeb62d With sse3 and when the source is a load or has multiple uses, favors movddup over shuffp*, pshufd, etc. Without sse3 or when the source is from a register, make use of movlhps 
llvm-svn: 56620
 2008-09-25 20:50:48 +00:00
Evan Cheng
1d0ed88bf9 X86ISD::VZEXT_LOAD should produce and fold a chain. 
llvm-svn: 56593
 2008-09-24 23:26:36 +00:00
Evan Cheng
f942615847 Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc. 
llvm-svn: 56526
 2008-09-24 00:05:32 +00:00
Dan Gohman
01a070f9c7 Arrange for FastISel code to have access to the MachineModuleInfo 
object. This will be needed to support debug info.

llvm-svn: 56508
 2008-09-23 21:53:34 +00:00
Evan Cheng
5bf702d20a Support x86 specific inline asm modifier 'J'. 
llvm-svn: 56483
 2008-09-22 23:57:37 +00:00
Dale Johannesen
3722f4c14c Make log, log2, log10, exp, exp2 use Expand by 
default.

llvm-svn: 56471
 2008-09-22 21:57:32 +00:00
Arnold Schwaighofer
49f49e2086 Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC. 
llvm-svn: 56436
 2008-09-22 14:50:07 +00:00
Bill Wendling
932818c75a Reverting r56249. On further investigation, this functionality isn't needed. 
Apologies for the thrashing.

llvm-svn: 56251
 2008-09-16 21:48:12 +00:00
Bill Wendling
1a240c8033 - Change "ExternalSymbolSDNode" to "SymbolSDNode". 
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

llvm-svn: 56249
 2008-09-16 21:12:30 +00:00
Dan Gohman
fa32c7c6d9 Remove isImm(), isReg(), and friends, in favor of 
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
 2008-09-13 17:58:21 +00:00
Dan Gohman
3450a8252f Define CallSDNode, an SDNode subclass for use with ISD::CALL. 
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.

llvm-svn: 56183
 2008-09-13 01:54:27 +00:00
Dan Gohman
89660301e3 Rename ConstantSDNode::getValue to getZExtValue, for consistency 
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
 2008-09-12 16:56:44 +00:00
Arnold Schwaighofer
adfb111f10 When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case. 
llvm-svn: 56119
 2008-09-11 20:28:43 +00:00
Dale Johannesen
10e1cf3df2 The version of AtomicSDNode::AtomicSDNode used (only) for 
cmp-and-swap reversed the Cmp and Swap arguments; comments
make it clear this is unintentional.  Unfortunately, the
x86 BE had a compensating reversal, which is removed here.
PPC is OK.

From inspection of the Alpha code I think it is OK, but
if somebody has that platform please check it out.  I
cannot test on that platform.

llvm-svn: 56091
 2008-09-11 03:12:59 +00:00
Dan Gohman
3ccdde5eef Add X86FastISel support for static allocas, and refences 
to static allocas. As part of this change, refactor the
address mode code for laods and stores.

llvm-svn: 56066
 2008-09-10 20:11:02 +00:00
Evan Cheng
83c694fbe7 Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc. 
llvm-svn: 56061
 2008-09-10 18:25:29 +00:00
Dale Johannesen
3e4bbf01d0 Handle new intrinsics with vector arguments. 
Patch by Paul Redmond.

llvm-svn: 56059
 2008-09-10 17:31:40 +00:00
Duncan Sands
6e9362aeaa Fix name. 
llvm-svn: 56055
 2008-09-10 13:22:10 +00:00
Duncan Sands
c3de6e13df Add trampoline support for the new FastCC calling 
convention (not related to recent Ada testsuite
failures).

llvm-svn: 56054
 2008-09-10 13:11:09 +00:00
Duncan Sands
63ef24bfb1 Turn off the new FastCC for the moment. It causes 
a slew of Ada testsuite failures on x86-32 linux.
Seems to be related to the use of float.

llvm-svn: 56053
 2008-09-10 13:09:24 +00:00
Anton Korobeynikov
59a67c60db Replace explicit pointer-size constants to TargetData query. 
No functionality change.

llvm-svn: 55996
 2008-09-09 18:22:57 +00:00
Anton Korobeynikov
33c69aaf24 Reapply 55899: First draft of EH support on x86/64-linux 
Now with fix, which prevents subtle codegen bug to trigger on darwin.
No fix for bug though, it's still there.

llvm-svn: 55955
 2008-09-08 21:12:47 +00:00
Anton Korobeynikov
8e8f8bf5a6 Reapply blindly reverted 55898: Implement FRAME_TO_ARGS_OFFSET for x86-64 
llvm-svn: 55954
 2008-09-08 21:12:11 +00:00
Bill Wendling
51ddfce77e Reverting r55898 as well. This wasn't reverted in the original revert... 
llvm-svn: 55938
 2008-09-08 19:42:32 +00:00
Bill Wendling
4cc4caab72 Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8

llvm-svn: 55928
 2008-09-08 17:59:12 +00:00
Anton Korobeynikov
8528e4dc99 First draft of EH support on x86/64-linux 
llvm-svn: 55899
 2008-09-08 14:21:53 +00:00
Anton Korobeynikov
38cc49e19d Implement FRAME_TO_ARGS_OFFSET for x86-64 
llvm-svn: 55898
 2008-09-08 14:21:10 +00:00
Evan Cheng
ad262ec3a7 Some code clean up. 
llvm-svn: 55881
 2008-09-07 09:07:23 +00:00
Evan Cheng
bd15e330d0 For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries. 
llvm-svn: 55807
 2008-09-04 22:59:58 +00:00
Evan Cheng
53ce5fa5ce Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support! 
llvm-svn: 55756
 2008-09-04 01:04:15 +00:00
Dale Johannesen
9e4d101fab Add intrinsics for log, log2, log10, exp, exp2. 
No functional change (and no FE change to generate them).

llvm-svn: 55753
 2008-09-04 00:47:13 +00:00
Dan Gohman
18cc2a26df Create HandlePHINodesInSuccessorBlocksFast, a version of 
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.

llvm-svn: 55746
 2008-09-03 23:12:08 +00:00
Evan Cheng
43c7084625 Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class. 
llvm-svn: 55679
 2008-09-03 00:03:49 +00:00
Evan Cheng
c1c53221c5 Swap fp comparison operands and change predicate to allow load folding (safely this time). 
llvm-svn: 55553
 2008-08-29 23:22:12 +00:00
Evan Cheng
17382f9ffb Backing out 55521. Not safe. 
llvm-svn: 55548
 2008-08-29 22:13:21 +00:00
Evan Cheng
cdd06ba3f4 Swap fp comparison operands and change predicate to allow load folding. 
llvm-svn: 55521
 2008-08-28 23:48:31 +00:00
Gabor Greif
5ec5f19852 remove tabs, fix > 80 cols 
llvm-svn: 55511
 2008-08-28 23:19:51 +00:00
Gabor Greif
86c795a8ca erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics 
llvm-svn: 55504
 2008-08-28 21:40:38 +00:00
Rafael Espindola
1cd4fc3111 Use resize instead of reserve. Reserve doesn't change size(). 
llvm-svn: 55486
 2008-08-28 18:32:53 +00:00
Dale Johannesen
490c016734 Split the ATOMIC NodeType's to include the size, e.g. 
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.

This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad.  This is the alternative.

llvm-svn: 55457
 2008-08-28 02:44:49 +00:00
Gabor Greif
4b86114f92 disallow direct access to SDValue::ResNo, provide a getter instead 
llvm-svn: 55394
 2008-08-26 22:36:50 +00:00
Chris Lattner
c5c00890e5 If an xmm register is referenced explicitly in an inline asm, make sure to 
assign it to a version of the xmm register with the regclass that matches its
type.  This fixes PR2715, a bug handling some crazy xpcom case in mozilla.

llvm-svn: 55358
 2008-08-26 06:19:02 +00:00
Evan Cheng
569b489cf5 Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot. 
llvm-svn: 55338
 2008-08-25 21:27:18 +00:00
Bill Wendling
5728cf59fd Temporarily reverting r55292. It's causing a bootstraping failure: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2

llvm-svn: 55295
 2008-08-24 21:45:30 +00:00
Evan Cheng
a600778748 Move callseq_start above the call address load to allow load to be folded into the call node. 
llvm-svn: 55292
 2008-08-24 19:19:55 +00:00
Bill Wendling
f105f92904 If part of the mask is "undef", then ignore it as we don't care what goes into it. 
llvm-svn: 55147
 2008-08-21 22:36:36 +00:00
Bill Wendling
170bd0a562 Fix whitespace. No functionality change. 
llvm-svn: 55146
 2008-08-21 22:35:37 +00:00
Evan Cheng
ef2509b3ba Fix a number of byval / memcpy / memset related codegen issues. 
1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying.
2. Do not use byte repeat move and store operations. These are slow.

llvm-svn: 55139
 2008-08-21 21:00:15 +00:00
Mon P Wang
bf7b94fd29 Treat floating point ST1 the same as ST0 when lowering for a call result 
llvm-svn: 55135
 2008-08-21 19:54:16 +00:00