Jim Laskey
28fec74f1b
Remove redundant <cmath>.
...
llvm-svn: 31561
2006-11-08 19:16:44 +00:00
Evan Cheng
1f5c4a6c43
- When performing pre-/post- indexed load/store transformation, do not worry
...
about whether the new base ptr would be live below the load/store. Let two
address pass split it back to non-indexed ops.
- Minor tweaks / fixes.
llvm-svn: 31544
2006-11-08 08:30:28 +00:00
Evan Cheng
acc6a98286
Fixed a minor bug preventing some pre-indexed load / store transformation.
...
llvm-svn: 31543
2006-11-08 06:56:05 +00:00
Reid Spencer
da1f5b882a
For PR950:
...
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.
llvm-svn: 31542
2006-11-08 06:47:33 +00:00
Evan Cheng
e50f5e4c05
Fix a obscure post-indexed load / store dag combine bug.
...
llvm-svn: 31537
2006-11-08 02:38:55 +00:00
Evan Cheng
3db2b3aab9
Add post-indexed load / store transformations.
...
llvm-svn: 31498
2006-11-07 09:03:05 +00:00
Chris Lattner
c8d5fc4461
Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll.
...
The low part goes in the first operand of expandop, not the second one.
llvm-svn: 31487
2006-11-07 04:11:44 +00:00
Evan Cheng
ef1c22b6fa
Remove dead code; added a missing null ptr check.
...
llvm-svn: 31478
2006-11-06 21:33:46 +00:00
Evan Cheng
f191d53a9a
Add comment.
...
llvm-svn: 31473
2006-11-06 08:14:30 +00:00
Jeff Cohen
e1003da1a2
Unbreak VC++ build.
...
llvm-svn: 31464
2006-11-05 19:31:28 +00:00
Evan Cheng
bf7db95159
Added pre-indexed store support.
...
llvm-svn: 31459
2006-11-05 09:31:14 +00:00
Evan Cheng
ae357e5044
Added getIndexedStore.
...
llvm-svn: 31458
2006-11-05 09:30:09 +00:00
Evan Cheng
42cb1fd0ac
Changes to use operand constraints to process two-address instructions.
...
llvm-svn: 31453
2006-11-04 09:44:31 +00:00
Evan Cheng
047a33d3e3
Fix comments.
...
llvm-svn: 31414
2006-11-03 07:31:32 +00:00
Evan Cheng
466e20fca2
Rename
...
llvm-svn: 31413
2006-11-03 07:21:16 +00:00
Reid Spencer
8cac48e619
Remove dead variable. Fix 80 column violations.
...
llvm-svn: 31412
2006-11-03 03:30:34 +00:00
Evan Cheng
a0133317f7
Added DAG combiner transformation to generate pre-indexed loads.
...
llvm-svn: 31410
2006-11-03 03:06:21 +00:00
Evan Cheng
b9ed18642c
Added isPredecessor.
...
llvm-svn: 31409
2006-11-03 03:05:24 +00:00
Chris Lattner
d4881b4e2d
silence warning
...
llvm-svn: 31397
2006-11-03 01:28:29 +00:00
Reid Spencer
4bafa71dc1
For PR786:
...
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
llvm-svn: 31380
2006-11-02 20:25:50 +00:00
Reid Spencer
1abf69e923
For PR950:
...
Replace the REM instruction with UREM, SREM and FREM.
llvm-svn: 31369
2006-11-02 01:53:59 +00:00
Chris Lattner
35cd439221
Allow the getRegForInlineAsmConstraint method to return a register class with
...
no fixes physreg. Treat this as permission to use any register in the register
class. When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time. This eliminates a ton
of copies around common inline asms. For example:
int test2(int Y, int X) {
asm("foo %0, %1" : "=r"(X): "r"(X));
return X;
}
now compiles to:
_test2:
foo r3, r4
blr
instead of:
_test2:
mr r2, r4
foo r2, r2
mr r3, r2
blr
GCC produces:
_test2:
foo r4, r4
mr r3,r4
blr
llvm-svn: 31366
2006-11-02 01:41:49 +00:00
Evan Cheng
1f18eca4f5
Clean up.
...
llvm-svn: 31359
2006-11-01 22:39:30 +00:00
Evan Cheng
5479bb9fc4
CopyFromReg starts a live range so its use should not be considered a floater.
...
llvm-svn: 31356
2006-11-01 22:17:06 +00:00
Evan Cheng
67c04b1f2a
Print jumptable index.
...
llvm-svn: 31340
2006-11-01 04:48:30 +00:00
Chris Lattner
850ef9955d
Compile CodeGen/PowerPC/fp-branch.ll to:
...
_intcoord_cond_next55:
LBB1_3: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
li r3, 1
blr
LBB1_2: ;cond_next62.exitStub
li r3, 0
blr
instead of:
_intcoord_cond_next55:
LBB1_3: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
li r3, 1
blr
LBB1_2: ;cond_next62.exitStub
li r3, 0
blr
llvm-svn: 31330
2006-10-31 23:06:00 +00:00
Chris Lattner
3131b7d6d1
look through isunordered to inline it into branch blocks.
...
llvm-svn: 31328
2006-10-31 22:37:42 +00:00
Chris Lattner
3bc1ad2c4a
handle global address constant sdnodes
...
llvm-svn: 31323
2006-10-31 20:01:56 +00:00
Chris Lattner
a44a27dc47
TargetLowering::isOperandValidForConstraint
...
llvm-svn: 31319
2006-10-31 19:41:18 +00:00
Chris Lattner
d9afd310a6
Change the prototype for TargetLowering::isOperandValidForConstraint
...
llvm-svn: 31318
2006-10-31 19:40:43 +00:00
Chris Lattner
a9f10b25cc
Turn an assert into an error message. This is commonly triggered when
...
we don't support a specific constraint yet. When this happens, print the
unsupported constraint.
llvm-svn: 31310
2006-10-31 07:33:13 +00:00
Evan Cheng
3da8d26445
Fix a typo which can break jumptables.
...
llvm-svn: 31305
2006-10-31 02:31:00 +00:00
Evan Cheng
972f469722
Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the target custom lower it.
...
llvm-svn: 31293
2006-10-30 08:00:44 +00:00
Evan Cheng
7437ed9f30
Added a new SDNode type: BR_JT for jumptable branch.
...
llvm-svn: 31292
2006-10-30 07:59:36 +00:00
Chris Lattner
46a439780e
fix Generic/2006-10-29-Crash.ll
...
llvm-svn: 31281
2006-10-29 21:01:20 +00:00
Chris Lattner
0a5d859ae3
Fix a load folding issue that Evan noticed: there is no need to export values
...
used by comparisons in the main block.
llvm-svn: 31279
2006-10-29 18:23:37 +00:00
Evan Cheng
fa1756d048
VLOAD is not the LoadSDNode opcode.
...
llvm-svn: 31276
2006-10-29 06:14:47 +00:00
Nick Lewycky
baef048f71
Remove spurious case. EXTLOAD is not one of the node opcodes.
...
llvm-svn: 31275
2006-10-29 02:26:30 +00:00
Chris Lattner
776740f897
split critical edges more carefully and intelligently. In particular, critical
...
edges whose destinations are not phi nodes don't bother us. Also, share
split edges, since the split edge can't have a phi. This significantly
reduces the complexity of generated code in some cases.
llvm-svn: 31274
2006-10-28 19:22:10 +00:00
Jim Laskey
26ac9ac4ad
Load and stores have not been uniqued properly.
...
llvm-svn: 31261
2006-10-28 17:25:28 +00:00
Chris Lattner
ee8a70f370
Split *all* critical edges before isel. This resolves issues with spill code
...
being inserted on unsplit critical edges, which introduces (sometimes large
amounts of) partially dead spill code.
This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll
llvm-svn: 31260
2006-10-28 17:04:37 +00:00
Chris Lattner
f44a34d817
Fix a serious bug that caused any x86 vector stuff to infinite loop
...
llvm-svn: 31254
2006-10-28 06:15:26 +00:00
Jim Laskey
17bfaab377
Clean up.
...
llvm-svn: 31243
2006-10-27 23:52:51 +00:00
Chris Lattner
e009249ae1
Fix a bug in merged condition handling (CodeGen/Generic/2006-10-27-CondFolding.ll).
...
Add many fewer CFG edges and PHI node entries. If there is a switch which has
the same block as multiple destinations, only add that block once as a successor/phi
node (in the jumptable case)
llvm-svn: 31242
2006-10-27 23:50:33 +00:00
Jim Laskey
ef56bc9680
Switch over from SelectionNodeCSEMap to FoldingSet.
...
llvm-svn: 31240
2006-10-27 23:46:08 +00:00
Chris Lattner
e2297cd5a6
remove debug code
...
llvm-svn: 31233
2006-10-27 21:58:03 +00:00
Chris Lattner
0fab97080c
Codegen cond&cond with two branches. This compiles (f.e.) PowerPC/and-branch.ll to:
...
cmpwi cr0, r4, 4
bgt cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_3: ;entry
cmplwi cr0, r3, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
instead of:
cmpwi cr7, r4, 4
mfcr r2
addic r4, r3, -1
subfe r3, r4, r3
rlwinm r2, r2, 30, 31, 31
or r2, r2, r3
cmplwi cr0, r2, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_1: ;cond_true
llvm-svn: 31232
2006-10-27 21:54:23 +00:00
Chris Lattner
05159debc4
Turn conditions like x<Y|z==q into multiple blocks.
...
This compiles Regression/CodeGen/X86/or-branch.ll into:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $5, %eax
jl LBB1_1 #cond_true
LBB1_3: #entry
testl %ecx, %ecx
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
instead of:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $4, %eax
setg %al
testl %ecx, %ecx
setne %cl
testb %cl, %al
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
And on ppc to:
cmpwi cr0, r29, 5
blt cr0, LBB1_1 ;cond_true
LBB1_3: ;entry
cmplwi cr0, r30, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
instead of:
cmpwi cr7, r4, 4
mfcr r2
addic r4, r3, -1
subfe r30, r4, r3
rlwinm r29, r2, 30, 31, 31
and r2, r29, r30
cmplwi cr0, r2, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
llvm-svn: 31230
2006-10-27 21:36:01 +00:00
Evan Cheng
88c050f772
getPreIndexedLoad -> getIndexedLoad.
...
llvm-svn: 31209
2006-10-26 21:53:40 +00:00
Reid Spencer
6833ffe8b8
For PR950:
...
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.
llvm-svn: 31195
2006-10-26 06:15:43 +00:00
Chris Lattner
a797dd393f
visitSwitchCase knows how to insert conditional branches well. Change
...
visitBr to just call visitSwitchCase, eliminating duplicate logic.
llvm-svn: 31167
2006-10-24 18:07:37 +00:00
Chris Lattner
79a1ca0a61
Generalize CaseBlock a bit more:
...
Rename LHSBB/RHSBB to TrueBB/FalseBB. Allow the RHS value to be null,
in which case the LHS is treated as a bool.
llvm-svn: 31166
2006-10-24 17:57:59 +00:00
Chris Lattner
fc8e70297e
generalize 'CaseBlock'. It really allows any comparison to be inserted.
...
llvm-svn: 31161
2006-10-24 17:03:35 +00:00
Chris Lattner
06236f7928
Minor tweak. Instead of generating:
...
movl 32(%esp), %eax
cmpl $1, %eax
je LBB1_1 #bb
LBB1_4: #entry
cmpl $2, %eax
je LBB1_2 #bb2
jmp LBB1_3 #UnifiedReturnBlock
LBB1_1: #bb
notice that we would miss the fall through and emit this instead:
movl 32(%esp), %eax
cmpl $2, %eax
je LBB1_2 #bb2
LBB1_4: #entry
cmpl $1, %eax
jne LBB1_3 #UnifiedReturnBlock
LBB1_1: #bb
llvm-svn: 31130
2006-10-23 18:38:22 +00:00
Chris Lattner
d91d082100
Fix phi node updating for switches lowered to linear sequences of branches.
...
llvm-svn: 31125
2006-10-22 23:00:53 +00:00
Chris Lattner
f592f04e3f
disable this code for now, it's not yet safely updating phi nodes
...
llvm-svn: 31124
2006-10-22 22:47:10 +00:00
Chris Lattner
a07b38f113
Implement PR964 and Regression/CodeGen/Generic/SwitchLowering.ll
...
llvm-svn: 31119
2006-10-22 21:36:53 +00:00
Chris Lattner
2f54afc364
Make flag and chain edges visually distinguishable from value edges in DOT
...
output.
llvm-svn: 31067
2006-10-20 18:06:09 +00:00
Reid Spencer
d414793dbc
For PR950:
...
This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.
llvm-svn: 31063
2006-10-20 07:07:24 +00:00
Bill Wendling
edce5ede57
Partially in response to PR926: insert the newly created machine basic
...
blocks into the basic block list when lowering the switch inst. into a
binary tree of if-then statements. This allows the "visitSwitchCase" func
to allow for fall-through behavior.
llvm-svn: 31057
2006-10-19 21:46:38 +00:00
Jim Laskey
c06a0bc853
Add option for controlling inclusion of global AA.
...
llvm-svn: 31040
2006-10-18 19:08:31 +00:00
Jim Laskey
288c230cbd
Use global info for alias analysis.
...
llvm-svn: 31035
2006-10-18 12:29:57 +00:00
Chris Lattner
8708a62f93
Trivial patch to speed up legalizing common i64 constants.
...
llvm-svn: 31020
2006-10-17 21:47:13 +00:00
Chris Lattner
bfbb76e103
Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
...
llvm-svn: 31019
2006-10-17 21:24:15 +00:00
Evan Cheng
3be6b15cd9
Fix printer for StoreSDNode.
...
llvm-svn: 31017
2006-10-17 21:18:26 +00:00
Evan Cheng
2113bdf34d
Reflect MemOpAddrMode change; added a helper to create pre-indexed load.
...
llvm-svn: 31016
2006-10-17 21:14:32 +00:00
Jim Laskey
7f16ca4872
Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty optimization.
...
llvm-svn: 31009
2006-10-17 19:33:52 +00:00
Evan Cheng
d9bec725a2
Make sure operand does have size and element type operands.
...
llvm-svn: 30999
2006-10-17 17:06:35 +00:00
Evan Cheng
2d9318cff1
Be careful when looking through a vbit_convert. Optimizing this:
...
(vector_shuffle
(vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32),
(undef, undef, undef, undef), (0, 0, 0, 0), 4, f32)
to the
vbitconvert
is a very bad idea.
llvm-svn: 30989
2006-10-16 22:49:37 +00:00
Jim Laskey
06f4428abc
Pass AliasAnalysis thru to DAGCombiner.
...
llvm-svn: 30984
2006-10-16 20:52:31 +00:00
Jim Laskey
1070dfefba
Tidy up after truncstore changes.
...
llvm-svn: 30961
2006-10-14 12:14:27 +00:00
Evan Cheng
bfd74c6d9c
Debug tweak.
...
llvm-svn: 30959
2006-10-14 08:34:06 +00:00
Chris Lattner
08aa96b824
Make sure that the node returned by SimplifySetCC is added to the worklist
...
so that it can be deleted if unused.
llvm-svn: 30955
2006-10-14 03:52:46 +00:00
Chris Lattner
a515f322f3
fold setcc of a setcc.
...
llvm-svn: 30953
2006-10-14 01:02:29 +00:00
Chris Lattner
25ad62d132
When SimplifySetCC was moved to the DAGCombiner, it was never removed from
...
SelectionDAG and it has since bitrotted. Remove the copy from SelectionDAG.
Next, remove the constant folding piece of DAGCombiner::SimplifySetCC into
a new FoldSetCC method which can be used by getNode() and SimplifySetCC.
This fixes obscure bugs.
llvm-svn: 30952
2006-10-14 00:41:01 +00:00
Jim Laskey
bf50140aac
Reduce the workload by not adding chain users to work list.
...
llvm-svn: 30948
2006-10-13 23:32:28 +00:00
Chris Lattner
9b1878a28c
Fix a bug where we incorrectly turned '(X & 0) == 0' into '(X & 0) >> -1',
...
which is undefined. "0" isn't a power of 2.
llvm-svn: 30947
2006-10-13 22:46:18 +00:00
Evan Cheng
fe5bb5dbe6
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
...
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
Chris Lattner
70444d5663
Lower X%C into X/C+stuff. This allows the 'division by a constant' logic to
...
apply to rems as well as divs. This fixes PR945 and speeds up ReedSolomon
from 14.57s to 10.90s (which is now faster than gcc).
It compiles CodeGen/X86/rem.ll into:
_test1:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
imull %ecx
addl %esi, %edx
movl %edx, %eax
shrl $31, %eax
sarl $7, %edx
addl %eax, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
_test2:
movl 4(%esp), %eax
movl %eax, %ecx
sarl $31, %ecx
shrl $24, %ecx
addl %eax, %ecx
andl $4294967040, %ecx
subl %ecx, %eax
ret
_test3:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
mull %ecx
shrl $7, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
instead of div/idiv instructions.
llvm-svn: 30920
2006-10-12 20:58:32 +00:00
Evan Cheng
61afb767eb
Add RemoveDeadNode to remove a dead node and its (potentially) dead operands.
...
llvm-svn: 30916
2006-10-12 20:34:05 +00:00
Chris Lattner
e38ce54cc9
add a minor dag combine noticed when looking at PR945
...
llvm-svn: 30915
2006-10-12 20:23:19 +00:00
Jim Laskey
388c9681ef
D'oh - need to use the rigth kind of store.
...
llvm-svn: 30903
2006-10-12 15:22:24 +00:00
Jim Laskey
eba756c1a7
Alias analysis of TRUNCSTORE.
...
llvm-svn: 30889
2006-10-11 18:55:16 +00:00
Jim Laskey
6efcd15c88
Typo
...
llvm-svn: 30884
2006-10-11 17:52:19 +00:00
Jim Laskey
4791a4ad14
Handle aliasing of loadext.
...
llvm-svn: 30883
2006-10-11 17:47:52 +00:00
Jim Laskey
fd6218f8f5
Fix regression in combiner alias analysis.
...
llvm-svn: 30880
2006-10-11 13:47:09 +00:00
Evan Cheng
9b31a4d4ed
Naming consistency.
...
llvm-svn: 30878
2006-10-11 07:10:22 +00:00
Andrew Lenharth
4b783303e5
Jimptables working again on alpha.
...
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.
llvm-svn: 30873
2006-10-11 04:29:42 +00:00
Chris Lattner
aa1741fc87
add two helper methods.
...
llvm-svn: 30869
2006-10-11 03:58:02 +00:00
Evan Cheng
d6b419ecb0
FindModifiedNodeSlot needs to add LoadSDNode ivars to create proper SelectionDAGCSEMap ID.
...
llvm-svn: 30866
2006-10-11 01:47:58 +00:00
Evan Cheng
0d8a340a8f
Also update getNodeLabel for LoadSDNode.
...
llvm-svn: 30861
2006-10-10 20:11:26 +00:00
Evan Cheng
a12747d2b4
SDNode::dump should also print out extension type and VT.
...
llvm-svn: 30860
2006-10-10 20:05:10 +00:00
Chris Lattner
e0734f522f
Fix another bug in extload promotion.
...
llvm-svn: 30857
2006-10-10 18:54:19 +00:00
Evan Cheng
070ae65fa8
Fix a bug introduced by my LOAD/LOADX changes.
...
llvm-svn: 30853
2006-10-10 07:51:21 +00:00
Evan Cheng
d22f3dd3ed
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
...
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
Chris Lattner
b0e0a23959
Eliminate more token factors by taking advantage of transitivity:
...
if TF depends on A and B, and A depends on B, TF just needs to depend on
A. With Jim's alias-analysis stuff enabled, this compiles the testcase in
PR892 into:
__Z4test3Val:
subl $44, %esp
call L__Z3foov$stub
movl %edx, 28(%esp)
movl %eax, 32(%esp)
movl %eax, 24(%esp)
movl %edx, 36(%esp)
movl 52(%esp), %ecx
movl %ecx, 4(%esp)
movl %eax, 8(%esp)
movl %edx, 12(%esp)
movl 48(%esp), %eax
movl %eax, (%esp)
call L__Z3bar3ValS_$stub
addl $44, %esp
ret
instead of:
__Z4test3Val:
subl $44, %esp
call L__Z3foov$stub
movl %eax, 24(%esp)
movl %edx, 28(%esp)
movl 24(%esp), %eax
movl %eax, 32(%esp)
movl 28(%esp), %eax
movl %eax, 36(%esp)
movl 32(%esp), %eax
movl 36(%esp), %ecx
movl 52(%esp), %edx
movl %edx, 4(%esp)
movl %eax, 8(%esp)
movl %ecx, 12(%esp)
movl 48(%esp), %eax
movl %eax, (%esp)
call L__Z3bar3ValS_$stub
addl $44, %esp
ret
llvm-svn: 30821
2006-10-08 22:57:01 +00:00
Jim Laskey
9260b2f86e
Combiner alias analysis passes Multisource (release-asserts.)
...
llvm-svn: 30818
2006-10-07 23:37:56 +00:00
Chris Lattner
f5758df6cd
Fix a bug legalizing zero-extending i64 loads into 32-bit loads. The bottom
...
part was always forced to be sextload, even when we needed an zextload.
llvm-svn: 30782
2006-10-07 00:58:36 +00:00
Chris Lattner
3f92c791b4
initialize ivar
...
llvm-svn: 30780
2006-10-06 22:52:08 +00:00
Chris Lattner
b5b96302f2
jump tables handle pic
...
llvm-svn: 30776
2006-10-06 22:32:29 +00:00
Chris Lattner
0d39b3a4cf
Fix a miscompilation of:
...
long long foo(long long X) {
return (long long)(signed char)(int)X;
}
Instead of:
_foo:
extsb r2, r4
srawi r3, r4, 31
mr r4, r2
blr
we now produce:
_foo:
extsb r4, r4
srawi r3, r4, 31
blr
This fixes a miscompilation in ConstantFolding.cpp.
llvm-svn: 30768
2006-10-06 17:34:12 +00:00
Evan Cheng
275825195a
Make use of getStore().
...
llvm-svn: 30759
2006-10-05 23:01:46 +00:00
Evan Cheng
c9e079d0c1
Add getStore() helper function to create ISD::STORE nodes.
...
llvm-svn: 30758
2006-10-05 22:57:11 +00:00
Jim Laskey
3f9f064fd1
Alias analysis code clean ups.
...
llvm-svn: 30753
2006-10-05 15:07:25 +00:00
Evan Cheng
5974db9813
Fix some typos that can cause a flag value to have more than one use.
...
llvm-svn: 30727
2006-10-04 22:23:53 +00:00
Jim Laskey
dd74085b55
More extensive alias analysis.
...
llvm-svn: 30721
2006-10-04 16:53:27 +00:00
Evan Cheng
494e8e6971
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
...
extra operand to LOADX to specify the exact value extension type.
llvm-svn: 30714
2006-10-04 00:56:09 +00:00
Evan Cheng
7b52bbd60c
Fix an obvious typo.
...
llvm-svn: 30711
2006-10-03 23:08:27 +00:00
Jim Laskey
97b1846c3e
Debugging kruft
...
llvm-svn: 30688
2006-10-02 13:01:17 +00:00
Jim Laskey
3d44b337d9
Add ability to annotate (color) nodes in a viewGraph.
...
llvm-svn: 30686
2006-10-02 12:26:53 +00:00
Chris Lattner
b512048344
refactor critical edge breaking out into the SplitCritEdgesForPHIConstants method.
...
This is a baby step towards fixing PR925.
llvm-svn: 30643
2006-09-28 06:17:10 +00:00
Andrew Lenharth
96c41b6c3c
Comments on JumpTableness
...
llvm-svn: 30615
2006-09-26 20:02:30 +00:00
Jim Laskey
74ba822f79
Load chain check is not needed
...
llvm-svn: 30613
2006-09-26 17:44:58 +00:00
Jim Laskey
2a8d8270eb
Chain can be any operand
...
llvm-svn: 30611
2006-09-26 09:32:41 +00:00
Jim Laskey
ae81857cba
Wrong size for load
...
llvm-svn: 30610
2006-09-26 08:14:06 +00:00
Jim Laskey
d72f4cfe04
Can't move a load node if it's chain is not used.
...
llvm-svn: 30609
2006-09-26 07:37:42 +00:00
Jim Laskey
6ae9f53d2c
Accidental enable of bad code
...
llvm-svn: 30601
2006-09-25 21:11:32 +00:00
Jim Laskey
640b7dbed5
Fix chain dropping in load and drop unused stores in ret blocks.
...
llvm-svn: 30600
2006-09-25 19:32:58 +00:00
Jim Laskey
ba2f6127b2
Core antialiasing for load and store.
...
llvm-svn: 30597
2006-09-25 16:29:54 +00:00
Andrew Lenharth
58f5a24f0c
Add support for other relocation bases to jump tables, as well as custom asm directives
...
llvm-svn: 30593
2006-09-24 19:45:58 +00:00
Evan Cheng
2086ffb27b
PIC jump table entries are always 32-bit. This fixes PIC jump table support on X86-64.
...
llvm-svn: 30590
2006-09-24 05:22:38 +00:00
Evan Cheng
ce6a660148
Make it work for DAG combine of multi-value nodes.
...
llvm-svn: 30573
2006-09-21 19:04:05 +00:00
Jim Laskey
231343018b
core corrections
...
llvm-svn: 30570
2006-09-21 17:35:47 +00:00
Jim Laskey
50750cf500
Basic "in frame" alias analysis.
...
llvm-svn: 30568
2006-09-21 16:28:59 +00:00
Chris Lattner
c17b86ef22
fold (aext (and (trunc x), cst)) -> (and x, cst).
...
llvm-svn: 30561
2006-09-21 06:40:43 +00:00
Chris Lattner
d9fca453f1
Check the right value type. This fixes 186.crafty on x86
...
llvm-svn: 30560
2006-09-21 06:17:39 +00:00
Chris Lattner
34768d5361
Compile:
...
int %test(ulong *%tmp) {
%tmp = load ulong* %tmp ; <ulong> [#uses=1]
%tmp.mask = shr ulong %tmp, ubyte 50 ; <ulong> [#uses=1]
%tmp.mask = cast ulong %tmp.mask to ubyte
%tmp2 = and ubyte %tmp.mask, 3 ; <ubyte> [#uses=1]
%tmp2 = cast ubyte %tmp2 to int ; <int> [#uses=1]
ret int %tmp2
}
to:
_test:
movl 4(%esp), %eax
movl 4(%eax), %eax
shrl $18, %eax
andl $3, %eax
ret
instead of:
_test:
movl 4(%esp), %eax
movl 4(%eax), %eax
shrl $18, %eax
# TRUNCATE movb %al, %al
andb $3, %al
movzbl %al, %eax
ret
llvm-svn: 30558
2006-09-21 06:14:31 +00:00
Chris Lattner
eb12877970
Generalize (zext (truncate x)) and (sext (truncate x)) folding to work when
...
the src/dst are not the same size. This catches things like "truncate
32-bit X to 8 bits, then zext to 16", which happens a bit on X86.
llvm-svn: 30557
2006-09-21 06:00:20 +00:00
Chris Lattner
a0243b3ad3
Compile:
...
int test3(int a, int b) { return (a < 0) ? a : 0; }
to:
_test3:
srawi r2, r3, 31
and r3, r2, r3
blr
instead of:
_test3:
cmpwi cr0, r3, 1
li r2, 0
blt cr0, LBB2_2 ;entry
LBB2_1: ;entry
mr r3, r2
LBB2_2: ;entry
blr
This implements: PowerPC/select_lt0.ll:seli32_a_a
llvm-svn: 30517
2006-09-20 06:41:35 +00:00
Chris Lattner
e78d019082
Fold the full generality of (any_extend (truncate x))
...
llvm-svn: 30514
2006-09-20 06:29:17 +00:00
Chris Lattner
6440707b6f
Two things:
...
1. teach SimplifySetCC that '(srl (ctlz x), 5) == 0' is really x != 0.
2. Teach visitSELECT_CC to use SimplifySetCC instead of calling it and
ignoring the result. This allows us to compile:
bool %test(ulong %x) {
%tmp = setlt ulong %x, 4294967296
ret bool %tmp
}
to:
_test:
cntlzw r2, r3
cmplwi cr0, r3, 1
srwi r2, r2, 5
li r3, 0
beq cr0, LBB1_2 ;
LBB1_1: ;
mr r3, r2
LBB1_2: ;
blr
instead of:
_test:
addi r2, r3, -1
cntlzw r2, r2
cntlzw r3, r3
srwi r2, r2, 5
cmplwi cr0, r2, 0
srwi r2, r3, 5
li r3, 0
bne cr0, LBB1_2 ;
LBB1_1: ;
mr r3, r2
LBB1_2: ;
blr
This isn't wonderful, but it's an improvement.
llvm-svn: 30513
2006-09-20 06:19:26 +00:00
Chris Lattner
644c6814ae
Expand 64-bit shifts more optimally if we know that the high bit of the
...
shift amount is one or zero. For example, for:
long long foo1(long long X, int C) {
return X << (C|32);
}
long long foo2(long long X, int C) {
return X << (C&~32);
}
we get:
_foo1:
movb $31, %cl
movl 4(%esp), %edx
andb 12(%esp), %cl
shll %cl, %edx
xorl %eax, %eax
ret
_foo2:
movb $223, %cl
movl 4(%esp), %eax
movl 8(%esp), %edx
andb 12(%esp), %cl
shldl %cl, %eax, %edx
shll %cl, %eax
ret
instead of:
_foo1:
subl $4, %esp
movl %ebx, (%esp)
movb $32, %bl
movl 8(%esp), %eax
movl 12(%esp), %edx
movb %bl, %cl
orb 16(%esp), %cl
shldl %cl, %eax, %edx
shll %cl, %eax
xorl %ecx, %ecx
testb %bl, %bl
cmovne %eax, %edx
cmovne %ecx, %eax
movl (%esp), %ebx
addl $4, %esp
ret
_foo2:
subl $4, %esp
movl %ebx, (%esp)
movb $223, %cl
movl 8(%esp), %eax
movl 12(%esp), %edx
andb 16(%esp), %cl
shldl %cl, %eax, %edx
shll %cl, %eax
xorl %ecx, %ecx
xorb %bl, %bl
testb %bl, %bl
cmovne %eax, %edx
cmovne %ecx, %eax
movl (%esp), %ebx
addl $4, %esp
ret
llvm-svn: 30506
2006-09-20 03:38:48 +00:00
Chris Lattner
61d08597df
Fold extract_element(cst) to cst
...
llvm-svn: 30478
2006-09-19 05:02:39 +00:00
Chris Lattner
556f869e88
Minor speedup for legalize by avoiding some malloc traffic
...
llvm-svn: 30477
2006-09-19 04:51:23 +00:00
Evan Cheng
65afc6af9f
Fix a typo.
...
llvm-svn: 30474
2006-09-18 23:28:33 +00:00
Evan Cheng
67b248dbc6
Allow i32 UDIV, SDIV, UREM, SREM to be expanded into libcalls.
...
llvm-svn: 30470
2006-09-18 21:49:04 +00:00
Andrew Lenharth
00bbd5641b
absolute addresses must match pointer size
...
llvm-svn: 30461
2006-09-18 17:59:35 +00:00
Chris Lattner
73f5ad9f38
Oh yeah, this is needed too
...
llvm-svn: 30407
2006-09-16 05:08:34 +00:00
Chris Lattner
594d4d9483
simplify control flow, no functionality change
...
llvm-svn: 30403
2006-09-16 00:21:44 +00:00
Chris Lattner
4318df13d7
Allow custom expand of mul
...
llvm-svn: 30402
2006-09-16 00:09:24 +00:00
Chris Lattner
c3f56368db
Fold (X & C1) | (Y & C2) -> (X|Y) & C3 when possible.
...
This implements CodeGen/X86/and-or-fold.ll
llvm-svn: 30379
2006-09-14 21:11:37 +00:00
Chris Lattner
dbe8078c76
Split rotate matching code out to its own function. Make it stronger, by
...
matching things like ((x >> c1) & c2) | ((x << c3) & c4) to (rot x, c5) & c6
llvm-svn: 30376
2006-09-14 20:50:57 +00:00
Chris Lattner
fdf4c06dac
If LSR went through a lot of trouble to put constants (e.g. the addr of a global
...
in a specific BB, don't undo this!). This allows us to compile
CodeGen/X86/loop-hoist.ll into:
_foo:
xorl %eax, %eax
*** movl L_Arr$non_lazy_ptr, %ecx
movl 4(%esp), %edx
LBB1_1: #cond_true
movl %eax, (%ecx,%eax,4)
incl %eax
cmpl %edx, %eax
jne LBB1_1 #cond_true
LBB1_2: #return
ret
instead of:
_foo:
xorl %eax, %eax
movl 4(%esp), %ecx
LBB1_1: #cond_true
*** movl L_Arr$non_lazy_ptr, %edx
movl %eax, (%edx,%eax,4)
incl %eax
cmpl %ecx, %eax
jne LBB1_1 #cond_true
LBB1_2: #return
ret
This was noticed in 464.h264ref. This doesn't usually affect PPC,
but strikes X86 all the time.
llvm-svn: 30290
2006-09-13 06:02:42 +00:00
Chris Lattner
81566af673
Compile X << 1 (where X is a long-long) to:
...
addl %ecx, %ecx
adcl %eax, %eax
instead of:
movl %ecx, %edx
addl %edx, %edx
shrl $31, %ecx
addl %eax, %eax
orl %ecx, %eax
and to:
addc r5, r5, r5
adde r4, r4, r4
instead of:
slwi r2,r9,1
srwi r0,r11,31
slwi r3,r11,1
or r2,r0,r2
on PPC.
llvm-svn: 30284
2006-09-13 03:50:39 +00:00
Evan Cheng
499d77553a
Added support for machine specific constantpool values. These are useful for
...
representing expressions that can only be resolved at link time, etc.
llvm-svn: 30278
2006-09-12 21:00:35 +00:00
Chris Lattner
480465a171
This code was trying too hard. By eliminating redundant edges in the CFG
...
due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.
This fixes 458.sjeng on x86 with llc.
llvm-svn: 30236
2006-09-10 06:36:57 +00:00
Chris Lattner
b935214653
Implement the fpowi now by lowering to a libcall
...
llvm-svn: 30225
2006-09-09 06:03:30 +00:00
Chris Lattner
8536526496
Allow targets to custom lower expanded BIT_CONVERT's
...
llvm-svn: 30217
2006-09-09 00:20:27 +00:00
Chris Lattner
8b75d6e068
Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted
...
too many phi operands when lowering a switch to branches in some cases.
llvm-svn: 30142
2006-09-07 01:59:34 +00:00
Chris Lattner
5f36aaa98f
Change the default to 0, which means 'default'.
...
llvm-svn: 30114
2006-09-05 17:39:15 +00:00
Chris Lattner
9cd4e3429e
Completely eliminate def&use operands. Now a register operand is EITHER a
...
def operand or a use operand.
llvm-svn: 30109
2006-09-05 02:31:13 +00:00
Duraid Madina
e1bb6d9ff8
forgot this
...
llvm-svn: 30097
2006-09-04 07:44:11 +00:00
Evan Cheng
464ef8dc53
Allow legalizer to expand ISD::MUL using only MULHS in the rare case that is
...
possible and the target only supports MULHS.
llvm-svn: 30022
2006-09-01 18:17:58 +00:00
Evan Cheng
b2933f3f52
DAG combiner fix for rotates. Previously the outer-most condition checks
...
for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.
llvm-svn: 29997
2006-08-31 07:41:12 +00:00
Evan Cheng
2335c819cd
Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG.
...
llvm-svn: 29951
2006-08-29 06:42:35 +00:00
Chris Lattner
33bd5dcfb7
s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
...
llvm-svn: 29911
2006-08-27 12:54:02 +00:00
Evan Cheng
6e08e7035f
Eliminate SelectNodeTo() and getTargetNode() variants which take more than
...
3 SDOperand operands. They are replaced by versions which take an array
of SDOperand and the number of operands.
llvm-svn: 29905
2006-08-27 08:08:54 +00:00
Evan Cheng
1c3d571e4b
SelectNodeTo now returns a SDNode*.
...
llvm-svn: 29901
2006-08-26 08:00:10 +00:00
Chris Lattner
3d2edbbafa
Fix PR861
...
llvm-svn: 29796
2006-08-21 20:24:53 +00:00
Chris Lattner
a2eba83561
switch the SUnit pred/succ sets from being std::sets to being smallvectors.
...
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%). More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.
llvm-svn: 29743
2006-08-17 00:09:56 +00:00
Chris Lattner
62b0dcb385
minor changes.
...
llvm-svn: 29740
2006-08-16 22:57:46 +00:00
Chris Lattner
841e7fbac4
Use the appropriate typedef
...
llvm-svn: 29730
2006-08-16 20:59:32 +00:00
Chris Lattner
cb3adb8225
Start using SDVTList more consistently
...
llvm-svn: 29711
2006-08-15 19:11:05 +00:00
Chris Lattner
ff1826e850
add a new SDVTList type and new SelectionDAG::getVTList methods to streamline
...
the creation of canonical VTLists.
llvm-svn: 29709
2006-08-15 17:46:01 +00:00
Chris Lattner
44d58ded54
eliminate use of getNode that takes vector of valuetypes.
...
llvm-svn: 29687
2006-08-14 23:53:35 +00:00
Chris Lattner
8e8d9a3358
Add a new getNode() method that takes a pointer to an already-intern'd list
...
of value-type nodes. This avoids having to do mallocs for std::vectors of
valuetypes when a node returns more than one type.
llvm-svn: 29685
2006-08-14 23:31:51 +00:00
Chris Lattner
9ff7eb17e0
remove SelectionDAG::InsertISelMapEntry, it is dead
...
llvm-svn: 29677
2006-08-14 22:24:39 +00:00
Chris Lattner
fe1fd00ce8
Add code to resize the CSEMap hash table. This doesn't speedup codegen of
...
kimwitu, but seems like a good idea from a "avoid performance cliffs" standpoint :)
llvm-svn: 29675
2006-08-14 22:19:25 +00:00
Chris Lattner
e02af2c427
Add the actual constant to the hash for ConstantPool nodes. Thanks to
...
Rafael Espindola for pointing this out.
llvm-svn: 29669
2006-08-14 20:12:44 +00:00
Chris Lattner
1d6e50c037
Switch to using SuperFastHash instead of adding all elements together. This
...
doesn't significantly improve performance but it helps a small amount.
llvm-svn: 29642
2006-08-12 01:07:10 +00:00
Chris Lattner
5510fa4ac5
Switch NodeID to track 32-bit chunks instead of 8-bit chunks, for a 2.5%
...
speedup in isel time.
llvm-svn: 29640
2006-08-11 23:55:53 +00:00
Chris Lattner
a271f8f58c
Remove 8 more std::map's.
...
llvm-svn: 29631
2006-08-11 21:55:30 +00:00
Chris Lattner
76da77fcbb
Move the BBNodes, GlobalValues, TargetGlobalValues, Constants, TargetConstants,
...
RegNodes, and ValueNodes maps into the CSEMap.
llvm-svn: 29626
2006-08-11 21:01:22 +00:00
Chris Lattner
3c504c013b
eliminate the NullaryOps map, use CSEMap instead.
...
llvm-svn: 29621
2006-08-11 18:38:11 +00:00
Chris Lattner
0d57396628
change internal impl of dag combiner so that calls to CombineTo never have to
...
make a temporary vector.
llvm-svn: 29618
2006-08-11 17:56:38 +00:00
Chris Lattner
a47d3dd2cc
Change one ReplaceAllUsesWith method to take an array of operands to replace
...
instead of a vector of operands.
llvm-svn: 29616
2006-08-11 17:46:28 +00:00
Chris Lattner
7b1362fa52
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
...
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
llvm-svn: 29566
2006-08-08 02:23:42 +00:00
Chris Lattner
be2fc7b875
Eliminate some malloc traffic by allocating vectors on the stack. Change some
...
method that took std::vector<SDOperand> to take a pointer to a first operand
and #operands.
This speeds up isel on kc++ by about 3%.
llvm-svn: 29561
2006-08-08 01:09:31 +00:00
Chris Lattner
1661ffa2eb
Revamp the "CSEMap" datastructure used in the SelectionDAG class. This
...
eliminates a bunch of std::map's in the SelectionDAG, replacing them with a
home-grown hashtable.
This is still a work in progress: not all the maps have been moved over and the
hashtable never resizes. That said, this still speeds up llc 20% on kimwitu++
with -fast -regalloc=local using a release build.
llvm-svn: 29550
2006-08-07 23:03:03 +00:00
Evan Cheng
d64d5529b0
Clear TopOrder before assigning topological order. Some clean ups.
...
llvm-svn: 29546
2006-08-07 22:13:29 +00:00
Evan Cheng
0853250689
Reverse the FlaggedNodes after scanning up for flagged preds or else the order would be reversed.
...
llvm-svn: 29545
2006-08-07 22:12:12 +00:00
Chris Lattner
154ffd3c8f
Make SelectionDAG::RemoveDeadNodes iterative instead of recursive, which
...
also make it simpler.
llvm-svn: 29524
2006-08-04 17:45:20 +00:00
Jim Laskey
de4cc067a9
Copy the liveins for the first block. PR859
...
llvm-svn: 29511
2006-08-03 20:51:06 +00:00
Chris Lattner
8cc175963d
Work around a GCC 3.3.5 bug noticed by a user.
...
llvm-svn: 29490
2006-08-03 00:18:59 +00:00
Evan Cheng
92b45ad949
- Change AssignTopologicalOrder to return vector of SDNode* by reference.
...
- Tweak implementation to avoid using std::map.
llvm-svn: 29479
2006-08-02 22:00:34 +00:00
Jim Laskey
6d121090d3
Final polish on machine pass registries.
...
llvm-svn: 29471
2006-08-02 12:30:23 +00:00
Jim Laskey
f9f462bc5e
Now that the ISel is available, it's possible to create a default instruction
...
scheduler creator.
llvm-svn: 29452
2006-08-01 19:14:14 +00:00
Jim Laskey
f5e160063e
1. Change use of "Cache" to "Default".
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2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.
More to follow.
llvm-svn: 29450
2006-08-01 18:29:48 +00:00
Jim Laskey
b92b14f422
Introducing plugable register allocators and instruction schedulers.
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llvm-svn: 29434
2006-08-01 14:21:23 +00:00
Evan Cheng
e4fdb294ae
Added AssignTopologicalOrder() to assign each node an unique id based on their topological order.
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llvm-svn: 29431
2006-08-01 08:20:41 +00:00
Evan Cheng
c1483b5e72
PIC jump table entries are always 32-bit even in 64-bit mode.
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llvm-svn: 29422
2006-08-01 01:03:13 +00:00
Evan Cheng
3b5f1c6248
Remove InFlightSet hack. No longer needed.
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llvm-svn: 29373
2006-07-28 00:47:19 +00:00
Nate Begeman
952d922bf1
Code cleanups, per review
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llvm-svn: 29347
2006-07-27 16:46:58 +00:00
Evan Cheng
bdb2562804
AssignNodeIds should return unsigned.
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llvm-svn: 29343
2006-07-27 07:36:47 +00:00
Evan Cheng
5783fd4aab
AssignNodeIds assign each node in the DAG an unique id.
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llvm-svn: 29337
2006-07-27 06:39:06 +00:00
Chris Lattner
92a0b69813
Add some advice
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llvm-svn: 29324
2006-07-27 04:24:14 +00:00
Nate Begeman
3d5f5b4e8b
Support jump tables when in PIC relocation model
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llvm-svn: 29318
2006-07-27 01:13:04 +00:00
Chris Lattner
cbd19c14f1
Fix a case where LegalizeAllNodesNotLeadingTo could take exponential time.
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This manifested itself as really long time to compile
Regression/CodeGen/Generic/2003-05-28-ManyArgs.ll on ppc.
This is PR847.
llvm-svn: 29313
2006-07-26 23:55:56 +00:00
Reid Spencer
10b9edbb69
For PR780:
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1. Move IncludeFile.h to System library
2. Move IncludeFile.cpp to System library
3. #1 and #2 required to prevent cyclic library dependencies for libSystem
4. Convert all existing uses of Support/IncludeFile.h to System/IncludeFile.h
5. Add IncludeFile support to various lib/System classes.
6. Add new lib/System classes to LinkAllVMCore.h
All this in an attempt to pull in lib/System to what's required for VMCore
llvm-svn: 29287
2006-07-26 16:18:00 +00:00
Reid Spencer
fb0feb79f0
Initialize some variables the compiler warns about.
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llvm-svn: 29277
2006-07-25 20:44:41 +00:00