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Commit Graph

148313 Commits

Author SHA1 Message Date
Zachary Turner
6a54e5a010 [CodeView] Write CodeView line information.
Differential Revision: https://reviews.llvm.org/D32716

llvm-svn: 301882
2017-05-01 23:27:42 +00:00
Dylan McKay
9b90c0caaf [AVR] Enable the frame pointer for all functions
This is a temporary measure while we figure out a way to get the frame
pointer working correctly.

llvm-svn: 301881
2017-05-01 23:16:59 +00:00
George Burgess IV
25e6d2b2ce [InstSimplify] Handle selects of GEPs with 0 offset
In particular (since it wouldn't fit nicely in the summary):
(select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V)

Differential Revision: https://reviews.llvm.org/D31435

llvm-svn: 301880
2017-05-01 23:12:08 +00:00
Simon Pilgrim
a5a31d2cfd [X86] Reduce code for setting operations actions by merging into loops across multiple types/ops. NFCI.
llvm-svn: 301879
2017-05-01 23:09:01 +00:00
Xin Tong
944aa3efa0 Empty Space. NFC
llvm-svn: 301878
2017-05-01 23:08:19 +00:00
Davide Italiano
4ff1d9fca6 [IR] Garbage collect unused variants. NFCI.
llvm-svn: 301877
2017-05-01 23:04:33 +00:00
Peter Collingbourne
e3c040a9f5 Fix a pessimising move warning.
llvm-svn: 301852
2017-05-01 22:48:10 +00:00
Matthias Braun
66266b1e91 MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFC
This tracks whether MaxCallFrameSize is computed yet. Ideally we would
assert and fail when the value is queried before it is computed, however
this fails various targets that need to be fixed first.

Differential Revision: https://reviews.llvm.org/D32570

llvm-svn: 301851
2017-05-01 22:32:25 +00:00
NAKAMURA Takumi
6630b83863 llvm-link: Add BitReader to deps corresponding to r301832.
llvm-svn: 301850
2017-05-01 22:31:43 +00:00
Davide Italiano
41fbe9a72a [NewGVN] Don't derive incorrect implications.
In the testcase attached,  we believe %tmp1 implies %tmp4.
where:
  br i1 %tmp1, label %bb2, label %bb7
  br i1 %tmp4, label %bb5, label %bb7

because Wwhile looking at PredicateInfo stuffs we end up calling
isImpliedTrueByMatchingCmp() with the arguments backwards.

Differential Revision:  https://reviews.llvm.org/D32718

llvm-svn: 301849
2017-05-01 22:26:28 +00:00
Sanjay Patel
0b683165b5 [InstCombine] check one-use before applying DeMorgan nor/nand folds
If we have ~(~X & Y), it only makes sense to transform it to (X | ~Y) when we do not need 
the intermediate (~X & Y) value. In that case, we would need an extra instruction to 
generate ~Y + 'or' (as shown in the test changes).

It's ok if we have multiple uses of ~X or Y, however. In those cases, we may not reduce the
instruction count or critical path, but we might improve throughput because we can generate 
~X and ~Y in parallel. Whether that actually makes perf sense or not for a target is something 
we can't answer in IR.

Differential Revision: https://reviews.llvm.org/D32703

llvm-svn: 301848
2017-05-01 22:25:42 +00:00
Greg Clayton
5e0a89ef4f Adds initial llvm-dwarfdump --verify support with unit tests.
lldb-dwarfdump gets a new "--verify" option that will verify a single file's DWARF debug info and will print out any errors that it finds. It will return an non-zero exit status if verification fails, and a zero exit status if verification succeeds. Adding the --quiet option will suppress any output the STDOUT or STDERR.

The first part of the verify does the following:

- verifies that all CU relative references (DW_FORM_ref1, DW_FORM_ref2, DW_FORM_ref4, DW_FORM_ref8, DW_FORM_ref_udata) have valid CU offsets
- verifies that all DW_FORM_ref_addr references have valid .debug_info offsets
- verifies that all DW_AT_ranges attributes have valid .debug_ranges offsets
- verifies that all DW_AT_stmt_list attributes have valid .debug_line offsets
- verifies that all DW_FORM_strp attributes have valid .debug_str offsets

Unit tests were added for each of the above cases.

Differential Revision: https://reviews.llvm.org/D32707

llvm-svn: 301844
2017-05-01 22:07:02 +00:00
Peter Collingbourne
3a58d4ac26 Bitcode: Make the summary reader responsible for merging. NFCI.
This is to prepare for an upcoming change which uses pointers instead of
GUIDs to represent references.

Differential Revision: https://reviews.llvm.org/D32469

llvm-svn: 301843
2017-05-01 22:04:36 +00:00
Craig Topper
2ed188d03a [APInt] In operator!, handle single word case by comparing VAL to 0 directly and handle multiword case by comparing countLeadingZerosSlowCase() to BitWidth.
We were using operator=(0) which implicitly calls countLeadingZeros but only to compare with 64 to determine if we can compare VAL or pVal[0] to uint64_t. By handling the multiword case with countLeadingZerosSlowCase==BitWidth we can prevent a load of pVal[0] from being inserted inline at each call site. This saves a little bit of code size.

llvm-svn: 301842
2017-05-01 21:56:05 +00:00
Quentin Colombet
402774bbe0 [AArch64] Move GISel accessor initialization from TargetMachine to Subtarget.
NFC

llvm-svn: 301841
2017-05-01 21:53:19 +00:00
Craig Topper
69f2ef5a5a [APInt] Fix copy/paste mistake in comment for isNullValue. NFC
llvm-svn: 301838
2017-05-01 21:16:44 +00:00
Peter Collingbourne
22b2c4ff87 IPO: Add missing build dep.
llvm-svn: 301835
2017-05-01 20:57:20 +00:00
Simon Pilgrim
42d3b719f4 [X86][AVX] Rename LowerVectorBroadcast to lowerBuildVectorAsBroadcast. NFCI.
Since the shuffle refactor, this is only used during BUILD_VECTOR lowering.

llvm-svn: 301834
2017-05-01 20:56:35 +00:00
Peter Collingbourne
d5c295b069 Object: Remove ModuleSummaryIndexObjectFile class.
Differential Revision: https://reviews.llvm.org/D32195

llvm-svn: 301832
2017-05-01 20:42:32 +00:00
Krzysztof Parzyszek
3b5560a0f1 [Hexagon] Replace CVI_VM_CUR_LD type with CVI_VM_LD
A .cur instruction can be identified by checking isCVINew() && mayLoad().

Patch by Colin LeMahieu.

llvm-svn: 301829
2017-05-01 20:16:35 +00:00
Krzysztof Parzyszek
f44562707e [Hexagon] Improving error reporting for writing to read only registers
Patch by Colin LeMahieu.

llvm-svn: 301828
2017-05-01 20:10:41 +00:00
Krzysztof Parzyszek
5213039bde [Hexagon] Give better error messages for solo instruction errors
Patch by Colin LeMahieu.

llvm-svn: 301827
2017-05-01 20:06:01 +00:00
Krzysztof Parzyszek
fbebda08d4 [Hexagon] Improve shuffle error reporting
Patch by Colin LeMahieu.

llvm-svn: 301823
2017-05-01 19:41:43 +00:00
Tim Northover
9a57322655 X86: initialize a few subtarget variables.
Otherwise an indeterminate value gets read, causing a bunch of UBSan failures.

llvm-svn: 301819
2017-05-01 17:50:15 +00:00
Sanjoy Das
59f5ec49a6 Use a 2 bit pointer in ValueHandleBase::PrevPair; NFC
This was an omission in r301813.  I had made the supporting changes to
make this happen, but I forgot to actually update the PrevPair
declaration.

llvm-svn: 301817
2017-05-01 17:36:12 +00:00
Xin Tong
2c91983aaf Take indirect branch into account as well when folding.
We may not be able to rewrite indirect branch target, but we also want to take it into
account when folding, i.e. if it and all its successor's predecessors go to the same
destination, we can fold, i.e. no need to thread.

llvm-svn: 301816
2017-05-01 17:15:37 +00:00
Sanjoy Das
ddb6f73838 Use WeakVH instead of WeakTrackingVH in AliasSetTracker's UnkownInsts
In cases where an instruction (a call site, say) is RAUW'ed with some
other value (this is possible via the `returned` attribute, for
instance), we want the slot in UnknownInsts to point to the original
Instruction we wanted to track, not the value it got replaced by.

Fixes PR32587.

This relands r301426.

llvm-svn: 301814
2017-05-01 17:07:56 +00:00
Sanjoy Das
8af1fa3f1f Add a new WeakVH value handle; NFC
This relands r301425.

llvm-svn: 301813
2017-05-01 17:07:54 +00:00
Sanjoy Das
19757d9ec3 Rename WeakVH to WeakTrackingVH; NFC
This relands r301424.

llvm-svn: 301812
2017-05-01 17:07:49 +00:00
Derek Schuff
a21f43ffe3 [WebAssembly] Fix use of SDNodeFlags after API change in r301803
llvm-svn: 301811
2017-05-01 16:49:39 +00:00
Zachary Turner
8652898f9b [PDB/CodeView] Rename some classes.
In preparation for introducing writing capabilities for each of
these classes, I would like to adopt a Foo / FooRef naming
convention, where Foo indicates that the class can manipulate and
serialize Foos, and FooRef indicates that it is an immutable view of
an existing Foo.  In other words, Foo is a writer and FooRef is a
reader.  This patch names some existing readers to conform to the
FooRef convention, while offering no functional change.

llvm-svn: 301810
2017-05-01 16:46:39 +00:00
Sanjoy Das
faa5631a32 Emulate TrackingVH using WeakVH
Summary:
This frees up one slot in the HandleBaseKind enum, which I will use
later to add a new kind of value handle.  The size of the
HandleBaseKind enum is important because we store a HandleBaseKind in
the low two bits of a (in the worst case) 4 byte aligned pointer.

Reviewers: davide, chandlerc

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32634

llvm-svn: 301809
2017-05-01 16:28:58 +00:00
Xin Tong
d63e264baa [JumpThread] Add some assertions for expected ConstantInt/BlockAddress
llvm-svn: 301808
2017-05-01 16:19:59 +00:00
Gabor Horvath
20f8e4c792 Remove unnecessary conditions as suggested by clang-tidy. NFC
Patch by: Gergely Angeli!

Differential Revision: https://reviews.llvm.org/D31936

llvm-svn: 301807
2017-05-01 16:18:42 +00:00
Craig Topper
5d2f58cc3e [SelectionDAG] Use known ones to provide a better bound for the known zeros for CTTZ/CTLZ operations.
This is the SelectionDAG version of D32521. If know where at least one 1 is located in the input to these intrinsics we can place an upper bound on the number of bits needed to represent the count and thus increase the number of known zeros in the output.

I think we can also refine this further for CTTZ_UNDEF/CTLZ_UNDEF by assuming that the answer will never be BitWidth. I've left this out for now because it caused other test failures across multiple targets. Usually because of turning ADD into OR based on this new information.

I'll fix CTPOP in a future patch.

Differential Revision: https://reviews.llvm.org/D32692

llvm-svn: 301806
2017-05-01 16:08:06 +00:00
Xin Tong
ccaaa48596 [JumpThread] Do RAUW in case Cond folds to a constant in the CFG
Summary: [JumpThread] Do RAUW in case Cond folds to a constant in the CFG

Reviewers: sanjoy

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32407

llvm-svn: 301804
2017-05-01 15:34:17 +00:00
Amara Emerson
7b62022bef Generalize the specialized flag-carrying SDNodes by moving flags into SDNode.
This removes BinaryWithFlagsSDNode, and flags are now all passed by value.

Differential Revision: https://reviews.llvm.org/D32527

llvm-svn: 301803
2017-05-01 15:17:51 +00:00
Sanjay Patel
0c2a55ce06 [InstCombine] add multi-use variants for DeMorgan folds; NFC
llvm-svn: 301802
2017-05-01 14:52:17 +00:00
Sanjay Patel
be71a4fff5 [InstCombine] use FileCheck and auto-generate checks; NFC
llvm-svn: 301801
2017-05-01 14:20:30 +00:00
Sanjay Patel
388b962dee [InstCombine] consolidate more DeMorgan tests; NFC
llvm-svn: 301800
2017-05-01 14:10:59 +00:00
Michael Zuckerman
253ee43364 Fix test for altmacro
llvm-svn: 301799
2017-05-01 14:00:54 +00:00
Michael Zuckerman
db35bad707 [LLVM][inline-asm] Altmacro absolute expression '%' feature
In this patch, I introduce a new alt macro feature.
This feature adds meaning for the % when using it as a prefix to the calling macro arguments.

In the altmacro mode, the percent sign '%' before an absolute expression convert the expression first to a string. 
As described in the https://sourceware.org/binutils/docs-2.27/as/Altmacro.html
"Expression results as strings
You can write `%expr' to evaluate the expression expr and use the result as a string."

expression assumptions:

1. '%' can only evaluate an absolute expression.
2. Altmacro '%' must be the first character of the evaluated expression.
3. If no '%' is located before the expression, a regular module operation is expected.
4. The result of Absolute Expressions can be only integer.

Differential Revision: https://reviews.llvm.org/D32526

llvm-svn: 301797
2017-05-01 13:20:12 +00:00
Dylan McKay
01c4c20127 [AVR] Implement non-constant bit rotations
This lets us do bit rotations of variable amount.

llvm-svn: 301794
2017-05-01 09:48:55 +00:00
Igor Breger
787cab08b6 [GlobalISel][X86] rename test file. NFC.
llvm-svn: 301793
2017-05-01 08:11:02 +00:00
Igor Breger
f336ff3552 [GlobalISel][X86] Prioritize Tablegen-erated instruction selection. NFC
Summary:
Prioritizes Tablegen-erated instruction selection over C++ instruction selection.
Remove G_ADD/G_SUB C++ selection - implemented by Tablegen.

Reviewers: dsanders, zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32677

llvm-svn: 301792
2017-05-01 07:06:08 +00:00
Craig Topper
bb0ab7ebb2 [X86] Add tests for opportunities to improve known bits for CTTZ and CTLZ.
llvm-svn: 301791
2017-05-01 06:33:17 +00:00
Igor Breger
0237041efc [GlobalISel][X86] G_SEXT/G_ZEXT support.
Reviewers: zvi, guyblank

Reviewed By: zvi

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32591

llvm-svn: 301790
2017-05-01 06:30:16 +00:00
Igor Breger
6df010ccd3 [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.
Summary: [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.

Reviewers: zvi, guyblank

Reviewed By: zvi, guyblank

Subscribers: dberris, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D32217

llvm-svn: 301788
2017-05-01 06:08:32 +00:00
Dylan McKay
49f7c1dfc3 [AVR] Fix a bug so that we now emit R_AVR_16 fixups with the correct offset
Before this, the LDS/STS instructions would have their opcodes
overwritten while linking.

llvm-svn: 301782
2017-04-30 23:33:52 +00:00
Sanjay Patel
6847ec5b33 [DAGCombiner] shrink/widen a vselect to match its condition operand size (PR14657)
We discussed shrinking/widening of selects in IR in D26556, and I'll try to get back to that
patch eventually. But I'm hoping that this transform is less iffy in the DAG where we can check
legality of the select that we want to produce.

A few things to note:

1. We can't wait until after legalization and do this generically because (at least in the x86
   tests from PR14657), we'll have PACKSS and bitcasts in the pattern.
2. This might benefit more of the SSE codegen if we lifted the legal-or-custom requirement, but
   that requires a closer look to make sure we don't end up worse.
3. There's a 'vblendv' opportunity that we're missing that results in andn/and/or in some cases. 
   That should be fixed next.
4. I'm assuming that AVX1 offers the worst of all worlds wrt uneven ISA support with multiple 
   legal vector sizes, but if there are other targets like that, we should add more tests.
5. There's a codegen miracle in the multi-BB tests from PR14657 (the gcc auto-vectorization tests):
   despite IR that is terrible for the target, this patch allows us to generate the optimal loop
   code because something post-ISEL is hoisting the splat extends above the vector loops.

Differential Revision: https://reviews.llvm.org/D32620

llvm-svn: 301781
2017-04-30 22:44:51 +00:00