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193377 Commits

Author SHA1 Message Date
Juneyoung Lee
6ce69c69c6 [ExpandMemCmp] Correctly set alignment of generated loads
Summary:
This is a part of the series of efforts for correcting alignment of memory operations.
(Another related bugs: https://bugs.llvm.org/show_bug.cgi?id=44388 , https://bugs.llvm.org/show_bug.cgi?id=44543 )

This fixes https://bugs.llvm.org/show_bug.cgi?id=43880 by giving default alignment of loads to 1.

The test CodeGen/AArch64/bcmp-inline-small.ll should have been changed; it was introduced by https://reviews.llvm.org/D64805 . I talked with @evandro, and confirmed that the test is okay to be changed.
Other two tests from PowerPC needed changes as well, but fixes were straightforward.

Reviewers: courbet

Reviewed By: courbet

Subscribers: nlopes, gchatelet, wuzish, nemanjai, kristof.beyls, hiraditya, steven.zhang, danielkiss, llvm-commits, evandro

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76113
2020-03-16 22:39:48 +09:00
Juneyoung Lee
74ad14994d Add tests to ExpandMemCmp/X86/memcmp.ll before submitting D76113 2020-03-16 22:19:37 +09:00
Guillaume Chatelet
dc9c3115ae Disable memcpy-inline-fails.ll for windows 2020-03-16 14:10:08 +01:00
Georgii Rymar
4865955302 [yaml2obj][test] - Fix comments in ELF/program-header-address.yaml test. NFC.
This addresses post-commit comments suggested by James Henderson for D76131.
2020-03-16 16:07:10 +03:00
Sam Parker
9fd9b146eb [NFC][TTI] Remove static_casts
Introduce a variable for 'this' instead of calling static_cast
multiple times in TargetTransformInfoImpl.h
2020-03-16 13:01:43 +00:00
Simon Pilgrim
3463efbca6 [X86] X86::isConstantSplat - enable partial undef bit handling by default.
We currently only ever use this for lowering constant uniform values (shift/rotate by immediate) so we can safely enable it by default (it treats the undef bits as zero when extracting constants).

This is necessary for an upcoming patch that will use SimplifyDemandedBits more aggressively on funnel shift amounts and causes regressions in vXi64 constant without it.
2020-03-16 12:56:24 +00:00
Simon Pilgrim
8b6b4c77d6 [X86] LowerRotate - use X86::isConstantSplat to detect constant splat rotation amounts.
Avoid code duplication and matches what we do for the similar LowerFunnelShift and LowerScalarImmediateShift methods.
2020-03-16 12:56:23 +00:00
Sam Parker
59335a3b3a [NFC][TTI] Use switch in getCastInstrCost
Introduce a switch statement for trunc, bitcast, addrspacecast and
zext in BasicTTIImpl.
2020-03-16 12:52:08 +00:00
Oliver Stannard
9dc888738b Disable llvm-objdump --debug-vars tests on Windows
These tests passed in my Windows 10 VM, but are failing on Windows bots
with errors which look related to unicode encodings. Disable the tests
on Windows for now.
2020-03-16 12:50:01 +00:00
Jonas Paulsson
3e697060c0 [SystemZ] Avoid scalarization of [SU]INT_TO_FP ISD-nodes.
The type legalizer will scalarize vector conversions from integer to floating
point if the source element size is less than that of the result.

This is avoided now by inserting a zero/sign-extension of the source vector
before type legalization.

Review: Ulrich Weigand

Differential revision: https://reviews.llvm.org/D75978
2020-03-16 13:07:42 +01:00
Oliver Stannard
84d5d3fdf6 Don't run PowerPC objdump tests when PowerPC backend not built 2020-03-16 12:00:33 +00:00
Martin Storsjö
b30ceaa669 [llvm-objdump] Add llvm_unreachable to silence GCC warning. NFC.
GCC 7 warned about control reaching the end of the non-void function,
despite all 7 LineChar values being handled in the switch.
2020-03-16 13:34:50 +02:00
Oliver Stannard
66a9d0c4b6 Don't run ARM objdump tests when ARM backend not built 2020-03-16 11:24:19 +00:00
David Stenberg
fb2db17ed1 [DebugInfo] Handle generic type DW_OP_convert ops in dsymutil
Summary:
This is a preparatory change for allowing LLVM to emit DW_OP_convert
operations converting to the generic type.

If DW_OP_convert's operand is 0, it converts the top of the stack to the
generic type, as specified by DWARFv5 section 2.5.1.6:

"[...] takes one operand, which is an unsigned LEB128 integer that
 represents the offset of a debugging information entry in the current
 compilation unit, or value 0 which represents the generic type."

This adds support for such operations to dsymutil.

Reviewers: aprantl, markus, friss, JDevlieghere

Reviewed By: aprantl, JDevlieghere

Subscribers: hiraditya, llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D76142
2020-03-16 12:16:37 +01:00
Oliver Stannard
548bf9dd60 [llvm-objdump] Add entry_value and stack_value opcodes
Add the DW_OP_entry_value and DW_OP_stack_value opcodes to the DWARF
expression printer.

Differential revision: https://reviews.llvm.org/D74843
2020-03-16 10:54:41 +00:00
Oliver Stannard
864164dbfc [llvm-objdump] Add simple memory expressions to variable display
Add the DW_OP_breg0..DW_OP_breg31 and DW_OP_bregx opcodes to the DWARF
expression printer.

Differential revision: https://reviews.llvm.org/D74841
2020-03-16 10:54:41 +00:00
Oliver Stannard
52f5dcd954 [DebugInfo] Add unit test for compact expression printer
Add a unit test for the compact DWARF expression printer which will be
used by the llvm-objdump --debug-vars option.

Differential revision: https://reviews.llvm.org/D75250
2020-03-16 10:54:41 +00:00
Oliver Stannard
786528ee37 [llvm-objdump] Display locations of variables alongside disassembly
This adds the --debug-vars option to llvm-objdump, which prints
locations (registers/memory) of source-level variables alongside the
disassembly based on DWARF info. A vertical line is printed for each
live-range, with a label at the top giving the variable name and
location, and the position and length of the line indicating the program
counter range in which it is valid.

Currently, this only works for object files, not executables or shared
libraries.

Differential revision: https://reviews.llvm.org/D70720
2020-03-16 10:54:40 +00:00
David Stenberg
ff84dc1e98 [DebugInfo] Handle generic type DW_OP_convert ops in llvm-dwarfdump
Summary:
This is a preparatory change for allowing LLVM to emit DW_OP_convert
operations converting to the generic type.

If DW_OP_convert's operand is 0, it converts the top of stack to the
generic type, as specified by DWARFv5 section 2.5.1.6:

"[...] takes one operand, which is an unsigned LEB128 integer that
 represents the offset of a debugging information entry in the current
 compilation unit, or value 0 which represents the generic type."

This adds support for such operations to llvm-dwarfdump.

Reviewers: aprantl, markus, jdoerfert, jhenderson

Reviewed By: aprantl

Subscribers: hiraditya, llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D76141
2020-03-16 11:24:01 +01:00
Shengchen Kan
5a9e18541c [NFC][MC] Rename alignBranches* to emitInstruction*
alignBranches is X86 specific, change the name in a
more general one since other target can do some state
chang before and after emitting the instruction.
2020-03-16 17:13:14 +08:00
Rui Ueyama
b701b89489 Implement CET Shadow Stack (Intel Controlflow Enforcement Technology) support on Windows
Patch by Petr Penzin.

Windows support for CET is limited to shadow stack, which is enabled
by setting a PE bit in the linker.

Docs:

MSVC linker flag:
https://docs.microsoft.com/en-us/cpp/build/reference/cetcompat?view=vs-2019

IMAGE_DLLCHARACTERISTICS_EX_CET_COMPAT PE bit:
https://docs.microsoft.com/en-us/windows/win32/debug/pe-format#extended-dll-characteristics

Differential Revision: https://reviews.llvm.org/D70606
2020-03-16 17:51:32 +09:00
Georgii Rymar
976af69052 [obj2yaml][test] - Simplify call-graph-profile-section.yaml. NFCI.
Use yaml2obj -D to simplify.
We started to use it for other tests recently.
2020-03-16 11:47:10 +03:00
Shengchen Kan
aab930a36f [NFC][X86] Simplify test cases for branch align 2020-03-16 16:30:29 +08:00
Dylan McKay
55e4a70bc1 [AVR] Add a release note about the AVR backend becoming an official backend
AVR has been enabled by default since
c480c584a0b7de675dddb2616122fc218cd72c0e, the tests have been stable for
a couple days now, revert extremely unlikely.
2020-03-16 20:07:59 +13:00
Simon Atanasyan
88b8fc6b38 [MIPS] Implement PUL.PS and PUU.PS instructions
Patch by Michael Roe.

Differential Revision: https://reviews.llvm.org/D75812
2020-03-16 09:39:47 +03:00
Serguei Katkov
26f4c85f40 [Verifier] Remove invalid verifier check
According to LangRef for unordered atomic memory transfer intrinsics
"The first three arguments are the same as they are in the @llvm.memcpy intrinsic, with the added constraint that
 len is required to be a positive integer multiple of the element_size. If len is not a positive integer multiple
 of element_size, then the behaviour of the intrinsic is undefined."

So the len is not multiple of element size is just an undefined behavior and verifier should not complain about that
as undefined behavior is allowed in LLVM IR.

This change removes the verifier check for this condition

Reviewers: reames
Reviewed By: reames
Subscribers: dantrushin, hiraditya, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D76116
2020-03-16 12:00:08 +07:00
Juneyoung Lee
3cd755e246 [CodeGenPrepare] Freeze condition when transforming select to br
Summary:
This is a simple fix for CodeGenPrepare that freezes branch condition when transforming select to branch.
If it is not frozen, instsimplify or the later pipeline can potentially exploit undefined behavior.

The diff shows optimized form becase D75859 and D76048 already made a few changes to CodeGenPrepare for optimizing freeze(cmp).

Reviewers: jdoerfert, spatel, lebedev.ri, efriedma

Reviewed By: lebedev.ri

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76179
2020-03-16 12:46:20 +09:00
Juneyoung Lee
3086134f9d Revert "[CodeGenPrepare] Freeze condition when transforming select to br"
This reverts commit 10aa7ea951e22dbd7f2ebdeb6410cfbc8a251eb1.
2020-03-16 12:45:54 +09:00
Philip Reames
78335a9d01 Support prefix padding for alignment purposes (Relaxable instructions only)
Now that D75203 has landed and baked for a few days, extend the basic approach to prefix padding as well. The patch itself is fairly straight forward.

For the moment, this patch adds the functional support and some basic testing there of, but defaults to not enabling prefix padding. I want to be able to phrase a separate patch which adds the target specific reasoning and test it cleanly. I haven't decided whether I want to common it with the nop logic or not.

Differential Revision: https://reviews.llvm.org/D75300
2020-03-15 19:53:41 -07:00
QingShan Zhang
f3c97faa61 [NFC][Test] Add three tests to verify the behavior of a*b-c*d if there is multi-uses 2020-03-16 01:58:49 +00:00
Fangrui Song
6f891c7868 [llvm-objdump] Require long options to use double-dash --long-option
As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html
2020-03-15 18:01:11 -07:00
Fangrui Song
1c1cc1c5ed [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html

Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option
A subsequent change will reject -long-option.
2020-03-15 17:46:23 -07:00
Craig Topper
73637f3eca [X86] Add a non-zero cost for truncating v32i16->v32i8 on avx512bw. 2020-03-15 17:18:46 -07:00
Fangrui Song
4d911a83fc [llvm-objdump][test] Change llvm-objdump tests to use double dash options 2020-03-15 16:01:26 -07:00
Lang Hames
82ffd8566c Revert "[ORC] Enable JITEventListeners in the RTDyldObjectLinkingLayer."
This reverts commit 98f2bb4461072347dcca7d2b1b9571b3a6525801.

Reverting while I investigate bot failures.
2020-03-15 15:35:08 -07:00
Nico Weber
170e86cebd [gn build] don't repeat arm header targets twice. no behavior change. 2020-03-15 18:20:26 -04:00
Fangrui Song
5976c5ffee [llvm-objdump][test] Move {AArch64,ARM}/* to ELF/ARM/ or MachO/ARM/ and {AMDGPU,Hexagon,Mips,powerPC}/ to ELF/ 2020-03-15 15:18:33 -07:00
Lang Hames
64ff6abf1f [ORC] Enable JITEventListeners in the RTDyldObjectLinkingLayer.
Enable use of ExecutionEngine JITEventListeners in RTDyldObjectLinkingLayer.
This allows existing MCJIT clients to more easily migrate to LLJIT / ORCv2.

Example usage in llvm/examples/OrcV2Examples/LLJITWithGDBRegistrationListener.

Differential Revision: https://reviews.llvm.org/D75838
2020-03-15 15:14:46 -07:00
Fangrui Song
4c369de5ac [llvm-objdump][test] Move {AArch64,X86}/macho-* to MachO/ 2020-03-15 15:05:12 -07:00
Matt Arsenault
2eee092a44 AMDGPU/GlobalISel: Remove -global-isel-abort=0 from some tests 2020-03-15 17:22:34 -04:00
Matt Arsenault
4de7840ce4 AMDGPU/GlobalISel: Add more tests for G_SADDE/G_SSUBE
These don't work, but add baseline tests.
2020-03-15 16:54:40 -04:00
LLVM GN Syncbot
4a2e703c98 [gn build] Port 5087ace6519 2020-03-15 20:28:52 +00:00
Nico Weber
f328f34845 [gn build] (manually) port 5087ace6519 more 2020-03-15 16:28:19 -04:00
Nico Weber
157bc53787 [gn build] (manually) port 5087ace6519 2020-03-15 16:06:37 -04:00
Matt Arsenault
c83cc5a2ca AMDGPU/GlobalISel: Add baseline test for mul 2020-03-15 14:53:51 -04:00
Matt Arsenault
5adf08b532 AMDGPU/GlobalISel: Add baseline test for mul 2020-03-15 14:50:36 -04:00
Simon Pilgrim
6119b31c69 [PowerPC] Regenerate rotate tests 2020-03-15 18:29:00 +00:00
Simon Pilgrim
5714811f21 [Thumb2] Regenerate rotate tests 2020-03-15 18:28:54 +00:00
Simon Pilgrim
9c73084e30 [SystemZ] Regenerate rotate/shift tests 2020-03-15 16:42:46 +00:00
Benjamin Kramer
5324f53f82 [AVR] Make helper functions static. NFC. 2020-03-15 16:50:15 +01:00