Evan Cheng
7ac8120105
Fix fuitos encoding.
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llvm-svn: 59344
2008-11-15 00:40:57 +00:00
Evan Cheng
626e85dfc2
Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings.
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llvm-svn: 59314
2008-11-14 20:09:11 +00:00
Evan Cheng
f7c1da41a1
Handle the rest of pseudo instructions.
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llvm-svn: 59275
2008-11-13 23:36:57 +00:00
Evan Cheng
feb7615798
Lazy compilation callback save / restore VFP registers.
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llvm-svn: 59274
2008-11-13 23:28:54 +00:00
Evan Cheng
4c8297e12b
Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's.
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llvm-svn: 59258
2008-11-13 19:22:28 +00:00
Evan Cheng
997eb67c20
fsub{d|s} encoding bugs.
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llvm-svn: 59234
2008-11-13 07:59:48 +00:00
Evan Cheng
d67d6c4571
Missed a break statement.
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llvm-svn: 59231
2008-11-13 07:46:59 +00:00
Evan Cheng
3c0113820b
Fix pre- and post-indexed load / store encoding bugs.
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llvm-svn: 59230
2008-11-13 07:34:59 +00:00
Evan Cheng
4768468ec1
Remove the incorrect assertion. We don't have enough information before relocation to set U bit.
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llvm-svn: 59170
2008-11-12 21:37:59 +00:00
Evan Cheng
9cb6f40f8f
Address mode immediate offset has already been divided by 4.
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llvm-svn: 59117
2008-11-12 08:21:12 +00:00
Evan Cheng
80d0d5cfa8
Fix a VFP binary arithmetic instruction encoding bug.
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llvm-svn: 59116
2008-11-12 08:14:21 +00:00
Evan Cheng
a4dc0e304e
Fix address mode 3 immediate offset mode encoding.
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llvm-svn: 59109
2008-11-12 07:34:37 +00:00
Evan Cheng
7fef8cfe75
Consolidate formats; fix FCMPED etc. encodings.
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llvm-svn: 59107
2008-11-12 07:18:38 +00:00
Evan Cheng
0966883093
Fix VFP conversion instruction encodings.
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llvm-svn: 59104
2008-11-12 06:41:41 +00:00
Evan Cheng
39d8bf295d
Fix encoding of single-precision VFP registers.
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llvm-svn: 59102
2008-11-12 02:19:38 +00:00
Evan Cheng
cc9323ac73
VFP fld / fst immediate field is multiplied by 4.
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llvm-svn: 59100
2008-11-12 01:02:24 +00:00
Evan Cheng
8b7fefc126
Fix FMDRR encoding.
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llvm-svn: 59088
2008-11-11 22:46:12 +00:00
Evan Cheng
95bad0db94
Handle floating point constpool_entry's.
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llvm-svn: 59087
2008-11-11 22:19:31 +00:00
Evan Cheng
35f1477c5a
Encode VFP load / store instructions.
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llvm-svn: 59084
2008-11-11 21:48:44 +00:00
Evan Cheng
91e4ef91c5
Encode VFP conversion instructions.
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llvm-svn: 59074
2008-11-11 19:40:26 +00:00
Evan Cheng
3c62bb7471
Encode VFP arithmetic instructions.
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llvm-svn: 59016
2008-11-11 02:11:05 +00:00
Evan Cheng
bc61b6009b
Correct PIC function stub codegen.
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llvm-svn: 59006
2008-11-10 23:14:47 +00:00
Evan Cheng
080c1a9fac
Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used.
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llvm-svn: 58949
2008-11-10 01:08:07 +00:00
Anton Korobeynikov
a4933e408d
Temporary revert my last commit: it seems it's triggering some subtle bug in backend
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and breaks llvm-gcc
llvm-svn: 58926
2008-11-08 23:05:05 +00:00
Anton Korobeynikov
e3b9284fa8
Factor out offset printing code into generic AsmPrinter.
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FIXME: it seems, that most of targets don't support
offsets wrt CPI/GlobalAddress', was it intentional?
llvm-svn: 58917
2008-11-08 17:21:38 +00:00
Evan Cheng
e5b6b3f81f
Moved InvalidateInstructionCache to ARMJITInfo::emitFunctionStub which knows size of stub.
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llvm-svn: 58899
2008-11-08 08:16:49 +00:00
Evan Cheng
3d9c134136
Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr.
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llvm-svn: 58897
2008-11-08 08:02:53 +00:00
Evan Cheng
cfa57662d1
Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated.
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llvm-svn: 58896
2008-11-08 07:38:22 +00:00
Evan Cheng
f2ebaa6a64
Fix relocation for calls to external symbols.
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llvm-svn: 58893
2008-11-08 07:22:33 +00:00
Evan Cheng
064befa37b
Skip over two-address use operands.
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llvm-svn: 58883
2008-11-08 01:44:13 +00:00
Evan Cheng
bc946b09aa
Handle ARM machine constantpool entry with non-lazy ptr.
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llvm-svn: 58882
2008-11-08 01:31:27 +00:00
Evan Cheng
2ea87890bb
Use ARMFunctionInfo to track number of constpool entries and jumptables.
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llvm-svn: 58877
2008-11-08 00:51:41 +00:00
Evan Cheng
bf8a1ef40f
More code clean up.
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llvm-svn: 58872
2008-11-07 22:57:53 +00:00
Evan Cheng
3e00dcfebb
Get PIC jump table working.
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llvm-svn: 58869
2008-11-07 22:30:53 +00:00
Dan Gohman
1418c52e1a
Flush the raw_ostream after emitting the assembly for a function.
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This is a temporary fix for the -print-emitted-asm option, where
errs() is used as the stream, in the case where other code is
using stderr without using errs()' buffer. Hopefully soon we'll
fix errs() to be non-buffered instead. Patch by Preston Gurd.
llvm-svn: 58859
2008-11-07 19:49:17 +00:00
Evan Cheng
21df9f3b4f
Jump table JIT support. Work in progress.
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llvm-svn: 58836
2008-11-07 09:06:08 +00:00
Evan Cheng
88726d85eb
Encode misc arithmetic instructions.
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llvm-svn: 58828
2008-11-07 01:41:35 +00:00
Evan Cheng
3bcb71912f
Encode extend instructions; more clean up.
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llvm-svn: 58818
2008-11-06 22:15:19 +00:00
Evan Cheng
af54e4ed18
- Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm.
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- Consolidate instruction formats.
- Other clean up.
llvm-svn: 58808
2008-11-06 17:48:05 +00:00
Evan Cheng
aa24d19533
Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug.
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llvm-svn: 58800
2008-11-06 08:47:38 +00:00
Evan Cheng
078361bddc
Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.
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llvm-svn: 58793
2008-11-06 03:35:07 +00:00
Evan Cheng
058721d10b
Fix so_imm encoding bug; add support for MOVi2pieces.
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llvm-svn: 58790
2008-11-06 02:25:39 +00:00
Evan Cheng
ca6759021b
Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls.
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llvm-svn: 58789
2008-11-06 01:21:28 +00:00
Evan Cheng
ce97712aa6
Encode pic load / store instructions; fix some encoding bugs.
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llvm-svn: 58780
2008-11-05 23:22:34 +00:00
Evan Cheng
9970c31dcf
Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions.
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llvm-svn: 58764
2008-11-05 18:35:52 +00:00
Dan Gohman
cd4b68bee9
Eliminate the ISel priority queue, which used the topological order for a
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priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
llvm-svn: 58748
2008-11-05 04:14:16 +00:00
Evan Cheng
59112bc108
Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.
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llvm-svn: 58725
2008-11-04 22:19:55 +00:00
Evan Cheng
45496b349f
Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes.
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llvm-svn: 58714
2008-11-04 19:57:48 +00:00
Evan Cheng
d63b7563b7
Debug output tweak.
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llvm-svn: 58708
2008-11-04 17:58:53 +00:00
Evan Cheng
088f7c51a4
LDM_RET restores pc, do not set 's' bit which would restore CPSR from SPSR.
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llvm-svn: 58707
2008-11-04 17:57:07 +00:00