RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-28 14:32:51 +01:00
Code Issues Projects Releases Wiki Activity
49,589 Commits 4 Branches 5 Tags 704 MiB
76ed822935
Commit Graph

1300 Commits

Author SHA1 Message Date
Evan Cheng
cb1704f904 t2BR_JT is mov pc, it's 2 byte long, not 4. 
llvm-svn: 77744
 2009-07-31 22:22:22 +00:00
Evan Cheng
88a27caaaf Thumb2 movcc need .w suffix. 
llvm-svn: 77743
 2009-07-31 22:21:55 +00:00
Chris Lattner
75b7692e66 switch off of 'Section' onto MCSection. We're not properly using 
MCSection subclasses yet, but this is a step in the right direction.

llvm-svn: 77708
 2009-07-31 18:48:30 +00:00
Evan Cheng
0c9705feed Until we have a "ALIGN" pseudo instruction, have asm printer emitted a .align 
to ensure the instruction that follows a TBB (when the number of table entries
is odd) is 2-byte aligned.
Patch by Sandeep Patel.

llvm-svn: 77705
 2009-07-31 18:35:56 +00:00
Evan Cheng
038a564156 - Teach TBB / TBH offset limits are 510 and 131070 respectively since the offset 
is scaled by two.
- Teach GetInstSizeInBytes about TBB and TBH.

llvm-svn: 77701
 2009-07-31 18:28:05 +00:00
Chris Lattner
c156a00641 refactor section construction in TLOF to be through an explicit 
initialize method, which can be called when an MCContext is available.

llvm-svn: 77687
 2009-07-31 17:42:42 +00:00
Evan Cheng
c9f31ae969 When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot. 
llvm-svn: 77642
 2009-07-30 23:29:25 +00:00
David Goodwin
ef70179502 Remove redundant match for frame index from imm8 addrmode, it is handled by the imm12 addrmode. 
llvm-svn: 77632
 2009-07-30 22:45:52 +00:00
David Goodwin
62efc71b9f Darwin assembler now recognizes "orn", so remove workaround. 
llvm-svn: 77627
 2009-07-30 21:51:41 +00:00
David Goodwin
d29f81da16 Darwin assembler now supports "rrx", so remove workaround. 
llvm-svn: 77625
 2009-07-30 21:38:40 +00:00
David Goodwin
2eaffa79af Cleanup and include code selection for some frame index cases. 
llvm-svn: 77622
 2009-07-30 18:56:48 +00:00
David Goodwin
30429aef93 Add missing D* register clobbers for Thumb-2 call. 
llvm-svn: 77611
 2009-07-30 18:01:09 +00:00
Chris Lattner
edb8650e80 add a random codegen deficiency. 
llvm-svn: 77598
 2009-07-30 16:08:58 +00:00
Daniel Dunbar
4d07efb3c4 Switch obvious clients to Twine instead of utostr (when they were already using 
a Twine, e.g., for names).
 - I am a little ambivalent about this; we don't want the string conversion of
   utostr, but using overload '+' mixed with string and integer arguments is
   sketchy. On the other hand, this particular usage is something of an idiom.

llvm-svn: 77579
 2009-07-30 04:20:37 +00:00
Bob Wilson
8624e45518 Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs. 
llvm-svn: 77557
 2009-07-30 00:31:25 +00:00
Evan Cheng
31ac181755 tbb / tbh instructions only branch forward, not backwards. 
llvm-svn: 77522
 2009-07-29 23:20:20 +00:00
Evan Cheng
fabbd6219a Add VFP3 D registers to the DPR register class. 
llvm-svn: 77521
 2009-07-29 23:03:41 +00:00
Evan Cheng
90a1ca6e17 Make sure Thumb2 uses the right call instructions. 
llvm-svn: 77507
 2009-07-29 21:26:42 +00:00
Chris Lattner
18af1b233a Give getPointerRegClass() a "kind" value so that targets can 
support multiple different pointer register classes.

llvm-svn: 77501
 2009-07-29 20:31:52 +00:00
Evan Cheng
c8d3891c87 - Fix an obvious copy and paste error. 
- Darwin Thumb2 call clobbers r9.

llvm-svn: 77500
 2009-07-29 20:10:36 +00:00
Bob Wilson
355e0b70e0 Change Neon VLDn intrinsics to return multiple values instead of really 
wide vectors.  Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct.  Adjust tests accordingly.

llvm-svn: 77468
 2009-07-29 16:39:22 +00:00
Chris Lattner
5c3e1e0d0c pass the mangler down into the various SectionForGlobal methods. 
No functionality change.

llvm-svn: 77432
 2009-07-29 05:09:30 +00:00
Evan Cheng
fc846dd401 Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte / halfword. 
llvm-svn: 77422
 2009-07-29 02:18:14 +00:00
David Goodwin
65028e2427 Thumb-2: fix typo that caused incorrect stack elimination for VFP operations and very large stack frames. 
llvm-svn: 77401
 2009-07-28 23:52:33 +00:00
Devang Patel
cb23671431 Rename MDNode.h header. It defines MDnode and other metadata classes. 
New name is Metadata.h.

llvm-svn: 77370
 2009-07-28 21:49:47 +00:00
Evan Cheng
cf483eb0c0 In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is until more optimization goes in). 
llvm-svn: 77364
 2009-07-28 20:53:24 +00:00
David Goodwin
0c9e96bf09 Remove support for ORN to workaround <rdar://problem/7096522>. 
llvm-svn: 77363
 2009-07-28 20:51:25 +00:00
Chris Lattner
8972d46576 more simplifications and cleanup. :) 
llvm-svn: 77350
 2009-07-28 18:48:43 +00:00
David Goodwin
dbc23ece04 Add workaround for <rdar://problem/7098328>. 
llvm-svn: 77340
 2009-07-28 18:15:38 +00:00
Chris Lattner
c74586940a the apple "ld_classic" linker doesn't support .literal16 in 32-bit 
mode, and "ld64" (the default linker) falls back to it in -static
mode.

llvm-svn: 77334
 2009-07-28 17:50:28 +00:00
David Goodwin
e94d490b89 Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag. 
llvm-svn: 77329
 2009-07-28 17:06:49 +00:00
Evan Cheng
05555a7d31 tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. 
llvm-svn: 77305
 2009-07-28 07:38:35 +00:00
Evan Cheng
93c1b56fe9 Code clean up. No functionality changes. 
llvm-svn: 77301
 2009-07-28 06:24:12 +00:00
Evan Cheng
b740190d2e - More refactoring. This gets rid of all of the getOpcode calls. 
- This change also makes it possible to switch between ARM / Thumb on a
  per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
  using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.

llvm-svn: 77300
 2009-07-28 05:48:47 +00:00
Chris Lattner
55461787cc Rip all of the global variable lowering logic out of TargetAsmInfo. Since 
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.

Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.

This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
   pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
   CStringSection_.  Factor the code better.
5. fixes some bugs in string lowering on ELF targets.

llvm-svn: 77294
 2009-07-28 03:13:23 +00:00
David Goodwin
0bcb94eeff ORN does not require (and can not have) the ".w" suffix. "Orthogonality" is a dirty word at ARM. 
llvm-svn: 77275
 2009-07-27 23:34:12 +00:00
David Goodwin
6ff3fd8021 Remove TPat. No patterns depend on just isThumb(). Must use either T1Pat (isThumb1Only()) or T2Pat (is Thumb2). 
llvm-svn: 77242
 2009-07-27 19:59:26 +00:00
Chris Lattner
4ff7e1300f remove dead code. 
llvm-svn: 77233
 2009-07-27 19:00:33 +00:00
Evan Cheng
718ab76a04 More DCE. 
llvm-svn: 77231
 2009-07-27 18:48:45 +00:00
Evan Cheng
a702481089 convertToThreeAddress can't handle Thumb2 instructions (which don't have same address mode as ARM instructions). 
llvm-svn: 77230
 2009-07-27 18:44:00 +00:00
Evan Cheng
fa630cca3f Get rid of more dead code. 
llvm-svn: 77227
 2009-07-27 18:38:54 +00:00
Evan Cheng
55e369a447 Cosmetic change. 
llvm-svn: 77222
 2009-07-27 18:31:40 +00:00
Evan Cheng
03307125f5 Clean up. 
llvm-svn: 77221
 2009-07-27 18:25:24 +00:00
Evan Cheng
a773ae7a39 Get rid of some more getOpcode calls. 
This also fixes potential problems in ARMBaseInstrInfo routines not recognizing thumb1 instructions when 32-bit and 16-bit instructions mix.

llvm-svn: 77218
 2009-07-27 18:20:05 +00:00
David Goodwin
bbab77cdda Thumb-2 does not have RSC. 
llvm-svn: 77201
 2009-07-27 16:39:05 +00:00
David Goodwin
471e9f5b8d Add ".w" suffix for wide thumb-2 instructions. 
llvm-svn: 77199
 2009-07-27 16:31:55 +00:00
Chris Lattner
cd7d963b75 Eliminate getNamed/getUnnamedSection, adding a new and unified getOrCreateSection 
instead.

llvm-svn: 77186
 2009-07-27 06:17:14 +00:00
Chris Lattner
a2b00bdd7a Eliminate SectionFlags, just embed a SectionKind into Section 
instead and drive things based off of that.

llvm-svn: 77184
 2009-07-27 05:32:16 +00:00
Evan Cheng
657ef082f0 If CPSR is modified but the def is dead, then it's ok to fold the load / store. 
llvm-svn: 77182
 2009-07-27 04:18:04 +00:00
Evan Cheng
674c4d47b9 Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate more getOpcode calls. 
llvm-svn: 77181
 2009-07-27 03:14:20 +00:00