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Commit Graph

146275 Commits

Author SHA1 Message Date
Simon Pilgrim
1e8a4166d4 [SelectionDAG] Support BUILD_VECTOR implicit truncation in SelectionDAG::ComputeNumSignBits (PR32273)
llvm-svn: 297852
2017-03-15 16:22:24 +00:00
Nemanja Ivanovic
962a1447c8 [PowerPC][Altivec] Add mfvrd and mffprd extended mnemonic
mfvrd and mffprd are both alias to mfvrsd.
This patch enables correct parsing of the aliases, but we still emit a mfvrsd.

Committing on behalf of brunoalr (Bruno Rosa).

Differential Revision: https://reviews.llvm.org/D29177

llvm-svn: 297849
2017-03-15 16:04:53 +00:00
Simon Pilgrim
c44b14a962 [SelectionDAG][AArch64] Add test case showing incorrect SelectionDAG::ComputeNumSignBits BUILD_VECTOR handling
Reduced from a mixture of PR32273 and David Green's test cases showing SelectionDAG::ComputeNumSignBits not correctly handling BUILD_VECTOR implicit truncation of inputs.

llvm-svn: 297847
2017-03-15 15:40:34 +00:00
Sanjay Patel
093a8cf070 Cyle -> Cycle; NFCI
llvm-svn: 297846
2017-03-15 15:37:42 +00:00
Eric Liu
bbeb8c5ca1 Revert "Refactor SimplifyCFG:canSinkInstructions [NFC]"
This reverts commit r297839, which breaks Transforms/SimplifyCFG/sink-common-code.ll

llvm-svn: 297845
2017-03-15 15:29:42 +00:00
Artyom Skrobov
b932a0510e Revert "[Thumb1] Fix the bug when adding/subtracting -2147483648"
This reverts r297820 which apparently fails on A15 hosts.

llvm-svn: 297842
2017-03-15 14:50:43 +00:00
Simon Pilgrim
2fe92b56b2 Reverted unintended commit
llvm-svn: 297841
2017-03-15 14:47:30 +00:00
Simon Pilgrim
eebd5318fe Fix Wint-in-bool-context warning (PR32248)
llvm-svn: 297840
2017-03-15 14:38:19 +00:00
Aditya Kumar
ae54c30635 Refactor SimplifyCFG:canSinkInstructions [NFC]
llvm-svn: 297839
2017-03-15 14:26:45 +00:00
Sam Parker
c4e6bb3a81 Reverting r297821 due to breaking lld test.
llvm-svn: 297838
2017-03-15 14:06:42 +00:00
Sanjay Patel
6273dc989d [Target] fix typo; NFC
llvm-svn: 297836
2017-03-15 14:01:28 +00:00
Eric Liu
3dd1c214f7 Add 'REQUIRES: asserts' to pr32278.ll introduced in r297822
llvm-svn: 297835
2017-03-15 13:37:20 +00:00
Simon Pilgrim
32c78b03ee [X86][SSE] Fixed shuffle MOVSS/MOVSD combining of all zeroable inputs
Turns out it can happen, so the assertion was too harsh

Found during fuzz testing

llvm-svn: 297833
2017-03-15 13:16:46 +00:00
Petar Jovanovic
51463c570e [Mips] Add support to match more patterns for DEXT and CINS
This patch adds support for recognizing more patterns to match to DEXT and
CINS instructions.
It finds cases where multiple instructions could be replaced with a single
DEXT or CINS instruction.

For example, for the following:

define i64 @dext_and32(i64 zeroext %a) {
entry:

 %and = and i64 %a, 4294967295
 ret i64 %and
}

instead of generating:

 0000000000000088 <dext_and32>:

 88:   64010001        daddiu  at,zero,1
 8c:   0001083c        dsll32  at,at,0x0
 90:   6421ffff        daddiu  at,at,-1
 94:   03e00008        jr      ra
 98:   00811024        and     v0,a0,at
 9c:   00000000        nop

the following gets generated:

 0000000000000068 <dext_and32>:

 68:   03e00008        jr      ra
 6c:   7c82f803        dext    v0,a0,0x0,0x20

Cases that are covered:

DEXT:

 1. and $src, mask where mask > 0xffff
 2. zext $src zero extend from i32 to i64

CINS:

 1. and (shl $src, pos), mask
 2. shl (and $src, mask), pos
 3. zext (shl $src, pos) zero extend from i32 to i64

Patch by Violeta Vukobrat.

Differential Revision: https://reviews.llvm.org/D30464

llvm-svn: 297832
2017-03-15 13:10:08 +00:00
Simon Pilgrim
92e8a65b1a Align cost model columns. NFCI.
llvm-svn: 297824
2017-03-15 11:57:42 +00:00
Zvi Rackover
794a789fb4 Fix malformed XFAIL in previous commit
llvm-svn: 297823
2017-03-15 11:44:14 +00:00
Zvi Rackover
7a5c766f41 [DAGCombine] Add reproducer for pr32278
llvm-svn: 297822
2017-03-15 11:34:51 +00:00
Sam Parker
bedd35b4be [ARM] Fix for branch label disassembly for Thumb
Different MCInstrAnalysis classes for arm and thumb mode, each with
their own evaluateBranch implementation. I added a test case and
fixed the coff-relocations test to use '<label>:' rather than
'<label>' in the CHECK-LABEL entries, since the ones without the
colon would match branch targets. Might be worth noticing that
llvm-objdump does not lookup the relocation and thus assigns it a
target depending on the encoded immediate which #0, so it thinks it
branches to the next instruction.

Committed on behalf of Andre Vieira (avieira).

Differential Revision: https://reviews.llvm.org/D30943

llvm-svn: 297821
2017-03-15 10:21:23 +00:00
Artyom Skrobov
08f7705936 [Thumb1] Fix the bug when adding/subtracting -2147483648
Differential Revision: https://reviews.llvm.org/D30829

llvm-svn: 297820
2017-03-15 10:19:16 +00:00
Nuno Lopes
482fb76dae fix gcc -Wmisleading-indentation [NFC]
llvm-svn: 297816
2017-03-15 09:33:33 +00:00
Eric Liu
ab7d9b9eef [Support][CommandLine] Make it possible to get error messages from ParseCommandLineOptions when ignoring errors.
Summary:
Previously, ParseCommandLineOptions returns false and ignores error messages
when IgnoreErrors. It would be useful to also return error messages if users
decide to check parsing result instead of having the program exit on error.

Reviewers: chandlerc, mehdi_amini, rnk

Reviewed By: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30893

llvm-svn: 297810
2017-03-15 08:41:00 +00:00
Sam Parker
1c17803a4b [ARM] Enable SMLAL[B|T] isel
Enable the selection of the 64-bit signed multiply accumulate
instructions which operate on 16-bit operands. These are enabled for
ARMv5TE onwards for ARM and for V6T2 and other DSP enabled Thumb
architectures.

Differential Revision: https://reviews.llvm.org/D30044

llvm-svn: 297809
2017-03-15 08:27:11 +00:00
Taewook Oh
da4e0b3fd7 NFC: Reformats comments according to the coding guildelines.
llvm-svn: 297808
2017-03-15 06:29:23 +00:00
Michal Gorny
93101b7e3e [llvm-config] Add minimal sanity tests for path options
Add minimal tests that check whether path options do not fail and output
directories looking like expected. Requested in
https://reviews.llvm.org/rL291218.

Differential Revision: https://reviews.llvm.org/D28533

llvm-svn: 297807
2017-03-15 05:57:29 +00:00
Taewook Oh
f68f2e5fe0 [BranchFolding] Merge debug locations from common tail instead of removing
Summary: D25742 improved the precision of debug locations for PGO by removing debug locations from common tail when tail-merging. However, if identical insturctions that are merged into a common tail have the same debug locations, there's no need to remove them. This patch creates a merged debug location of identical instructions across SameTails and assign it to the instruction in the common tail, so that the debug locations are maintained if they are same across identical instructions.

Reviewers: aprantl, probinson, MatzeB, rob.lougher

Reviewed By: aprantl

Subscribers: andreadb, llvm-commits

Differential Revision: https://reviews.llvm.org/D30226

llvm-svn: 297805
2017-03-15 05:44:59 +00:00
Peter Collingbourne
9f57d9fa95 Ensure that prefix data is preserved with subsections-via-symbols
On MachO platforms that use subsections-via-symbols dead code stripping will
drop prefix data. Unfortunately there is no great way to convey the relationship
between a function and its prefix data to the linker. We are forced to use a bit
of a hack: we give the prefix data it’s own symbol, and mark the actual function
entry an .alt_entry.

Patch by Moritz Angermann!

Differential Revision: https://reviews.llvm.org/D30770

llvm-svn: 297804
2017-03-15 04:18:16 +00:00
Kostya Serebryany
488199d6cf [libFuzzer] remove even more stale code
llvm-svn: 297797
2017-03-15 00:39:06 +00:00
Kostya Serebryany
5b7352b9bb [libFuzzer] simplify code a bit
llvm-svn: 297796
2017-03-15 00:34:25 +00:00
Francis Visoiu Mistrih
3f5b505ccb [MachineFunction] Fix documentation. NFC
MachineFunction::getBlockNumber -> MachineFunction::getNumber.

llvm-svn: 297795
2017-03-14 23:58:57 +00:00
Volkan Keles
66f8f93f4b [GlobalISel] IRTranslator: Return the scalar for <1 x Ty> constant vectors
Summary:
<1 x Ty> is not a legal vector type in LLT, we shouldn’t build G_MERGE_VALUES
instruction for them.

Reviewers: qcolombet, aditya_nandakumar, dsanders, t.p.northover, ab, javed.absar

Reviewed By: qcolombet

Subscribers: dberris, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D30948

llvm-svn: 297792
2017-03-14 23:45:06 +00:00
Fiona Glaser
25df2c0b8f MemCpyOptimizer: don't create new addrspace casts
This isn't safe on all targets, and since we don't have a way
to know it's safe, avoid doing it for now.

llvm-svn: 297788
2017-03-14 22:37:38 +00:00
Daniel Sanders
2660ef4b73 [globalisel] LLVM_BUILD_GLOBAL_ISEL=OFF should prevent GlobalISel instruction selector from being declared.
llvm-svn: 297786
2017-03-14 22:09:29 +00:00
Kostya Serebryany
ffd7bbf928 [libFuzzer] remove more stale code
llvm-svn: 297785
2017-03-14 21:47:52 +00:00
Kostya Serebryany
3421df1bbe [libFuzzer] don't clear Counters in TracePC::CollectFeatures since they will be cleared anyway in ResetMaps
llvm-svn: 297783
2017-03-14 21:40:53 +00:00
Daniel Sanders
e196d2ab43 [globalisel][tblgen] Add support for ComplexPatterns
Summary:
Adds a new kind of MachineOperand: MO_Placeholder.
This operand must not appear in the MIR and only exists as a way of
creating an 'uninitialized' operand until a matcher function overwrites it.

Depends on D30046, D29712

Reviewers: t.p.northover, ab, rovka, aditya_nandakumar, javed.absar, qcolombet

Reviewed By: qcolombet

Subscribers: dberris, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D30089

llvm-svn: 297782
2017-03-14 21:32:08 +00:00
Kostya Serebryany
6845637d3c [libFuzzer] remove stale code
llvm-svn: 297781
2017-03-14 21:30:14 +00:00
Simon Pilgrim
553a3a2a4a [SelectionDAG] Add a signed integer absolute ISD node
Reduced version of D26357 - based on the discussion on llvm-dev about canonicalization of UMIN/UMAX/SMIN/SMAX as well as ABS I've reduced that patch to just the ABS ISD node (with x86/sse support) to improve basic combines and lowering.

ARM/AArch64, Hexagon, PowerPC and NVPTX all have similar instructions allowing us to make this a generic opcode and move away from the hard coded tablegen patterns which makes it tricky to match more complex patterns.

At the moment this patch doesn't attempt legalization as we only create an ABS node if its legal/custom.

Differential Revision: https://reviews.llvm.org/D29639

llvm-svn: 297780
2017-03-14 21:26:58 +00:00
Derek Schuff
f7c3e9132b [WebAssembly] Use LEB encoding for value types
Previously we were using the encoded LEB hex values
for the value types.  This change uses the decoded
negative value and the LEB encoder to write them out.

Differential Revision: https://reviews.llvm.org/D30847

Patch by Sam Clegg

llvm-svn: 297777
2017-03-14 20:23:22 +00:00
Rafael Espindola
208332c2a4 Archives require a symbol table on Solaris, even if empty.
On Solaris ld (and some other tools that use the underlying utility
libraries, such as elfdump) chokes on an archive library that has no
symbol table. The Solaris tools always create one, even if it's empty.

That bug has been fixed in the latest development line, and can
probably be backported to a supported release, but it would be nice if
LLVM's archiver could emit the empty symbol table, too.

Patch by Danek Duvall!

llvm-svn: 297773
2017-03-14 19:57:13 +00:00
Evgeniy Stepanov
2292b1bf92 Fix asm printing of associated sections.
Make MCSectionELF::AssociatedSection be a link to a symbol, because
that's how it works in the assembly, and use it in the asm printer.

llvm-svn: 297769
2017-03-14 19:28:51 +00:00
Eli Friedman
12c7517fb8 [ARM] Replace some C++ selection code with TableGen patterns. NFC.
Differential Revision: https://reviews.llvm.org/D30794

llvm-svn: 297768
2017-03-14 18:43:37 +00:00
Juergen Ributzka
7fb2de4316 [Support] Make the SystemZ bot happy by using make_error_code.
This should fix the last issue on the SystemZ bot related to the broken symlink
test.

llvm-svn: 297767
2017-03-14 18:37:44 +00:00
Sanjay Patel
de78e1aaa3 [DAG] vector div/rem with any zero element in divisor is undef
This is the backend counterpart to:
https://reviews.llvm.org/rL297390
https://reviews.llvm.org/rL297409
and follow-up to:
https://reviews.llvm.org/rL297384

It surprised me that we need to duplicate the check in FoldConstantArithmetic and FoldConstantVectorArithmetic, 
but one or the other doesn't catch all of the test cases. There is an existing code comment about merging those 
someday.

Differential Revision: https://reviews.llvm.org/D30826

llvm-svn: 297762
2017-03-14 18:06:28 +00:00
Dehao Chen
55d461dd66 SamplePGO ThinLTO ICP fix for local functions.
Summary:
In SamplePGO, if the profile is collected from non-LTO binary, and used to drive ThinLTO, the indirect call promotion may fail because ThinLTO adjusts local function names to avoid conflicts. There are two places of where the mismatch can happen:

1. thin-link prepends SourceFileName to front of FuncName to build the GUID (GlobalValue::getGlobalIdentifier). Unlike instrumentation FDO, SamplePGO does not use the PGOFuncName scheme and therefore the indirect call target profile data contains a hash of the OriginalName.
2. backend compiler promotes some local functions to global and appends .llvm.{$ModuleHash} to the end of the FuncName to derive PromotedFunctionName

This patch tries at the best effort to find the GUID from the original local function name (in profile), and use that in ICP promotion, and in SamplePGO matching that happens in the backend after importing/inlining:

1. in thin-link, it builds the map from OriginalName to GUID so that when thin-link reads in indirect call target profile (represented by OriginalName), it knows which GUID to import.
2. in backend compiler, if sample profile reader cannot find a profile match for PromotedFunctionName, it will try to find if there is a match for OriginalFunctionName.
3. in backend compiler, we build symbol table entry for OriginalFunctionName and pointer to the same symbol of PromotedFunctionName, so that ICP can find the correct target to promote.

Reviewers: mehdi_amini, tejohnson

Reviewed By: tejohnson

Subscribers: llvm-commits, Prazek

Differential Revision: https://reviews.llvm.org/D30754

llvm-svn: 297757
2017-03-14 17:33:01 +00:00
Sanjay Patel
0ee737e73e [InstCombine] improve readability; NFCI
llvm-svn: 297755
2017-03-14 17:27:27 +00:00
Sanjay Patel
6c68ac572b [InstCombine] consolidate rem tests and update checks; NFC
llvm-svn: 297747
2017-03-14 16:27:46 +00:00
Sanjay Patel
72c8a832f1 [InstCombine] regenerate checks; NFC
llvm-svn: 297746
2017-03-14 16:16:40 +00:00
Krzysztof Parzyszek
ec4b4310e8 [Hexagon] Fix a condition in HexagonEarlyIfConv.cpp
This fixes llvm.org/PR32265.

llvm-svn: 297745
2017-03-14 15:21:33 +00:00
Artyom Skrobov
22fe5e2fec Fix typo in comment
llvm-svn: 297742
2017-03-14 14:13:19 +00:00
Simon Pilgrim
542f4cdc97 [X86] Add extra BITREVERSE tests
Test on 32-bit and 64-bit targets.

Add bitreverse tests for i64, i32 and i16

llvm-svn: 297741
2017-03-14 14:03:16 +00:00