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117109 Commits

Author SHA1 Message Date
Elena Demikhovsky
7d3b86db52 AVX-512: Added VBROADCASTF64X4, VBROADCASTF64X2, VBROADCASTI32X8, and other instructions from this set
Added encoding tests.

llvm-svn: 237557
2015-05-18 06:42:57 +00:00
Hal Finkel
d380588a20 [PowerPC] Add extra r2 read deps on @toc@l relocations
If some commits are happy, and some commits are sad, this is a sad commit. It
is sad because it restricts instruction scheduling to work around a binutils
linker bug, and moreover, one that may never be fixed. On 2012-05-21, GCC was
updated not to produce code triggering this bug, and now we'll do the same...

When resolving an address using the ELF ABI TOC pointer, two relocations are
generally required: one for the high part and one for the low part. Only
the high part generally explicitly depends on r2 (the TOC pointer). And, so,
we might produce code like this:

.Ltmp526:
        addis 3, 2, .LC12@toc@ha
.Ltmp1628:
        std 2, 40(1)
        ld 5, 0(27)
        ld 2, 8(27)
        ld 11, 16(27)
        ld 3, .LC12@toc@l(3)
        rldicl 4, 4, 0, 32
        mtctr 5
        bctrl
        ld 2, 40(1)

And there is nothing wrong with this code, as such, but there is a linker bug
in binutils (https://sourceware.org/bugzilla/show_bug.cgi?id=18414) that will
misoptimize this code sequence to this:
        nop
        std     r2,40(r1)
        ld      r5,0(r27)
        ld      r2,8(r27)
        ld      r11,16(r27)
        ld      r3,-32472(r2)
        clrldi  r4,r4,32
        mtctr   r5
        bctrl
        ld      r2,40(r1)
because the linker does not know (and does not check) that the value in r2
changed in between the instruction using the .LC12@toc@ha (TOC-relative)
relocation and the instruction using the .LC12@toc@l(3) relocation.
Because it finds these instructions using the relocations (and not by
scanning the instructions), it has been asserted that there is no good way
to detect the change of r2 in between. As a result, this bug may never be
fixed (i.e. it may become part of the definition of the ABI). GCC was
updated to add extra dependencies on r2 to instructions using the @toc@l
relocations to avoid this problem, and we'll do the same here.

This is done as a separate pass because:
 1. These extra r2 dependencies are not really properties of the
    instructions, but rather due to a linker bug, and maybe one day we'll be
    able to get rid of them when targeting linkers without this bug (and,
    thus, keeping the logic centralized here will make that
    straightforward).
 2. There are ISel-level peephole optimizations that propagate the @toc@l
    relocations to some user instructions, and so the exta dependencies do
    not apply only to a fixed set of instructions (without undesirable
    definition replication).

The test case was reduced with the help of bugpoint, with minimal cleaning. I'm
looking forward to our upcoming MI serialization support, and with that, much
better tests can be created.

llvm-svn: 237556
2015-05-18 06:25:59 +00:00
Andrew Trick
f15a68f7f8 MachineScheduler debug output clarity.
llvm-svn: 237545
2015-05-17 23:40:31 +00:00
Andrew Trick
7604c704ed RegisterPressureTracker: reword stale comments.
llvm-svn: 237544
2015-05-17 23:40:27 +00:00
James Molloy
928c38a114 Reapply r237520 with another fix for infinite looping
SimplifyDemandedBits was "simplifying" a constant by removing just sign bits.
This caused a canonicalization race between different parts of instcombine.

Fix and regression test added - third time lucky?

llvm-svn: 237539
2015-05-17 08:27:27 +00:00
Elena Demikhovsky
e802d572b1 AVX-512: fixed extended load to 512-bit register
llvm-svn: 237537
2015-05-17 08:08:06 +00:00
Elena Demikhovsky
1e28397b5a AVX-512: fixed a bug in mask operations - (i1 1) pattern
Filling k-reg with all-ones value was wrong,
(i1 1) should switch on only one bit in mask register

llvm-svn: 237536
2015-05-17 07:28:51 +00:00
Logan Chien
5bf41f4c70 Code cleanup: Reindent Fuzzer::MutateAndTestOne.
llvm-svn: 237533
2015-05-17 02:44:31 +00:00
James Molloy
56795ba031 Revert commits r237521 and r237520.
The AArch64 LNT bot is unhappy - I've found that the problem is in
SimpliftDemandedBits, but that's going to require another code review
so reverting in the meantime.

llvm-svn: 237528
2015-05-16 21:27:14 +00:00
Benjamin Kramer
d5ff0e888f Move Pass into anonymous namespace. NFC.
llvm-svn: 237526
2015-05-16 16:16:35 +00:00
Benjamin Kramer
541b0eac9b [WinEH] Push unique_ptr through the Action interface.
This was the source of many leaks in the past, this should fix them once and
for all.

llvm-svn: 237524
2015-05-16 15:40:03 +00:00
Benjamin Kramer
fe2f4f4565 DenseMap: Remove poisoning of unused memory.
DenseMap has great support for catching invalidated iterators now so we can get
rid of this crude hack. Use after frees are covered by asan.

llvm-svn: 237523
2015-05-16 14:19:54 +00:00
Benjamin Kramer
7651010ca6 MC: Lower the default alignment of MCContext's operator new to 8
This is more than sufficient for all MC types.

llvm-svn: 237522
2015-05-16 13:54:08 +00:00
James Molloy
e351ab828e Update to r237520 - swap order of CHECK-NEXT lines.
... I'd copied the check-next lines from a previous test so they were
slightly wrong, and had managed to test the wrong source tree. D'oh!

llvm-svn: 237521
2015-05-16 13:26:25 +00:00
James Molloy
c45c32fb55 Reapply r237453 with a fix for the test timeouts.
The test timeouts were due to instcombine fighting itself. Regression test added.
Original log message:

Canonicalize min/max expressions correctly.

This patch introduces a canonical form for min/max idioms where one operand
is extended or truncated. This often happens when the other operand is a
constant. For example:

  %1 = icmp slt i32 %a, i32 0
    %2 = sext i32 %a to i64
      %3 = select i1 %1, i64 %2, i64 0

Would now be canonicalized into:

  %1 = icmp slt i32 %a, i32 0
    %2 = select i1 %1, i32 %a, i32 0
      %3 = sext i32 %2 to i64

This builds upon a patch posted by David Majenemer
(https://www.marc.info/?l=llvm-commits&m=143008038714141&w=2). That pass
passively stopped instcombine from ruining canonical patterns. This
patch additionally actively makes instcombine canonicalize too.

Canonicalization of expressions involving a change in type from int->fp
or fp->int are not yet implemented.

llvm-svn: 237520
2015-05-16 13:10:45 +00:00
Daniel Sanders
5bf4979cf3 [x86] Distinguish the 'o', 'v', 'X', and 'i' inline assembly memory constraints.
Summary:
But still handle them the same way since I don't know how they differ on
this target.

Of these, 'o' and 'v' are not tested but were already implemented.

I'm not sure why 'i' is required for X86 since it's supposed to be an
immediate constraint rather than a memory constraint. A test asserts
without it so I've included it for now.

No functional change intended.

Reviewers: nadav

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8254

llvm-svn: 237517
2015-05-16 12:09:54 +00:00
Renato Golin
c87f190902 Improve check on git-svnrevert, better error message
When the commit is not in the tree at all, find-rev returns 0
and prints an empty string. We need to catch that problem too,
when trying to revert.

Adding a list of possible problems, so that you can easily and
quickly correct without having to edit the script again.

llvm-svn: 237516
2015-05-16 10:23:48 +00:00
Craig Topper
93e883ed9f [TableGen] Change 'car' to 'head' and 'cdr' to 'tail' in assert comments. These were the old names for these operations long ago. NFC
llvm-svn: 237514
2015-05-16 05:42:13 +00:00
Craig Topper
26394d81cd [TableGen] Remove !! that I can't really explain why I wrote. Also remove some unnecessary curly braces from the same area.
llvm-svn: 237513
2015-05-16 05:42:11 +00:00
Craig Topper
c4dbeb5c42 Correct indentation. NFC
llvm-svn: 237512
2015-05-16 05:42:08 +00:00
Craig Topper
f26873fcc2 [TableGen] Restructure a loop to make it exit early instead of skipping a portion of the body based on what will also be the terminating condition. NFC
llvm-svn: 237511
2015-05-16 05:42:03 +00:00
Matthias Braun
ab56bae9c6 MachineSink: Collect registers before clearing their killflags.
Currently whenever we sink any instruction, we do clearKillFlags for
every use of every use operand for that instruction, apparently there
are a lot of duplication, therefore compile time penalties.

This patch collect all the interested registers first, do clearKillFlags
for it all together at once at the end, so we only need to do
clearKillFlags once for one register, duplication is avoided.

Patch by Lawrence Hu!

Differential Revision: http://reviews.llvm.org/D9719

llvm-svn: 237510
2015-05-16 03:11:07 +00:00
Ahmed Bougacha
3c51eef04b [MemCpyOpt] Turn memcpy from just-memset'd source into memset.
There's no point in copying around constants, so, when all else fails,
we can still transform memcpy of memset into two independent memsets.

To quote the example, we can turn:
  memset(dst1, c, dst1_size);
  memcpy(dst2, dst1, dst2_size);
into:
  memset(dst1, c, dst1_size);
  memset(dst2, c, dst2_size);
When dst2_size <= dst1_size.

Like r235232 for copy constructors, this can occur in move constructors.

Differential Revision: http://reviews.llvm.org/D9682

llvm-svn: 237506
2015-05-16 01:32:26 +00:00
Ahmed Bougacha
e22a2b5807 [MemCpyOpt] Remove dead argument. NFC.
llvm-svn: 237503
2015-05-16 01:23:47 +00:00
Duncan P. N. Exon Smith
d7b04389e5 MC: Use MCSymbol in RelAndSymbol, NFC
Switch from `MCSymbolData` to `MCSymbol`.

llvm-svn: 237502
2015-05-16 01:14:19 +00:00
Ahmed Bougacha
2a1aad7de8 Remove dead code in testcase. NFC.
llvm-svn: 237501
2015-05-16 01:10:40 +00:00
Bill Schmidt
d115a77d30 [PPC64] Add vector pack/unpack support from ISA 2.07
This patch adds support for the following new instructions in the
Power ISA 2.07:

  vpksdss
  vpksdus
  vpkudus
  vpkudum
  vupkhsw
  vupklsw

These instructions are available through the vec_packs, vec_packsu,
vec_unpackh, and vec_unpackl built-in interfaces.  These are
lane-sensitive instructions, so the built-ins have different
implementations for big- and little-endian, and the instructions must
be marked as killing the vector swap optimization for now.

The first three instructions perform saturating pack operations.  The
fourth performs a modulo pack operation, which means it can be
represented with a vector shuffle, and conversely the appropriate
vector shuffles may cause this instruction to be generated.  The other
instructions are only generated via built-in support for now.

Appropriate tests have been added.

There is a companion patch to clang for the rest of this support.

llvm-svn: 237499
2015-05-16 01:02:12 +00:00
Duncan P. N. Exon Smith
1882033972 MC: Use MCSymbol in MCObject::IsSymbolRefDifferenceFullyResolvedImpl()
Transition one API from `MCSymbolData` to `MCSymbol`.  The function
needs both, and the backpointer from `MCSymbolData` to `MCSymbol` is
going away.

llvm-svn: 237498
2015-05-16 01:01:55 +00:00
Duncan P. N. Exon Smith
d0247fc520 MC: Change MCFragment::Atom to an MCSymbol, NFC
Change `MCFragment::Atom` from an `MCSymbolData` to an `MCSymbol`,
moving in the direction of removing the back-pointer.

llvm-svn: 237497
2015-05-16 00:48:58 +00:00
Duncan P. N. Exon Smith
595a292f14 MC: Change MCAssembler::Symbols to store MCSymbol, NFC
Instead of storing a list of the `MCSymbolData` in use, store the
`MCSymbol`s.  Churning in the direction of removing the back pointer
from `MCSymbolData`.

llvm-svn: 237496
2015-05-16 00:35:24 +00:00
Filipe Cabecinhas
e8eb389930 [BitcodeReader] Don't allow INSERTVAL/EXTRACTVAL with 0 indices
This would trigger an assertion later.

Bug found with AFL fuzz.

llvm-svn: 237494
2015-05-16 00:33:12 +00:00
Duncan P. N. Exon Smith
f1ff871884 MC: Merge MCSymbol and MCSymbolData
Turn `MCSymbolData` into a field inside of `MCSymbol`.  Keep all the old
API alive for now, so that consumers can be updated in a later commit.
This means we still temporarily need the back pointer from
`MCSymbolData` to `MCSymbol`, but I'll remove it in a follow-up.

This optimizes for object emission over assembly emission.  By removing
the `DenseMap` in `MCAssembler`, llc memory usage drops from around 1040
MB to 1001 MB (3.8%).

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 237490
2015-05-16 00:03:06 +00:00
Duncan P. N. Exon Smith
91375c4f5f MC: Move MCSymbolData to MCSymbol.h, NFC
Prepare for always including symbol data in MCSymbol.

llvm-svn: 237489
2015-05-16 00:03:00 +00:00
Filipe Cabecinhas
593bbe43fe Remove redundant checks. NFC
llvm-svn: 237488
2015-05-15 23:57:13 +00:00
Duncan P. N. Exon Smith
ee727303c0 MC: Change MCAssembler::Symbols to a vector
Instead of an intrusive double-linked linked list, use a
`std::vector<>`.  This saves a pointer per symbol and simplifies
`MCSymbolData`.  Otherwise, no functionality change here.

While I measured a memory drop from around 1047MB to 1040MB (0.6%) --
and this is a decent cleanup in its own right -- it's primarily a
preparation patch for merging `MCSymbol` and `MCSymbolData`.  I'll post
an updated patch for that to the list in a moment.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 237487
2015-05-15 22:56:01 +00:00
Duncan P. N. Exon Smith
4bc561dde1 MC: Reduce MCAssembler::Symbols API exposure, NFC
Stop exposing the storage for `MCAssembler::Symbols`, and have
`MCAssembler` add symbols directly to its list instead of using a hook
in `MCSymbolData`.  This opens up room for a follow-up commit to switch
from a linked list to a vector.

llvm-svn: 237486
2015-05-15 22:33:34 +00:00
Pete Cooper
043506dd8f Remove MCAssembler.h include from MCStreamer.h and fix users of MCStreamer.h
llvm-svn: 237483
2015-05-15 22:19:42 +00:00
Pete Cooper
8d13c88def Remove 3 includes from MCInstrDesc.h and explicitly include them where needed
llvm-svn: 237481
2015-05-15 21:58:42 +00:00
Pete Cooper
2ad0d485cc Move some methods to a new MCInstrDesc.cpp file to allow includes to be trimmed. NFC.
MCInstrDesc.h includes things like MCInst.h which i can now remove after this.  That will be a future commit.

Reviewed by Jim Grosbach.

llvm-svn: 237478
2015-05-15 21:29:43 +00:00
David Majnemer
a1fa49368b [RuntimeDyld] Use isInt to assert that a relocation didn't overflow
isInt is a little easier to read, let's use that more consistently.
Incidentally, this also silences a warning for shifting a negative
number.

This fixes PR23532.

llvm-svn: 237476
2015-05-15 20:32:25 +00:00
David Majnemer
eec8124e55 [X86] Use a better sentinel offset for the FrameAddr index
Other pieces of CodeGen want to negate frame object offsets to account
for architectures where the stack grows down.  Our object is a pseudo
object so it's offset doesn't matter.  However, we shouldn't choose an
offset which results in undefined behavior if you negate it.

llvm-svn: 237474
2015-05-15 20:08:27 +00:00
Jim Grosbach
0c6b91deee MC: MCCodeGenInfo naming update. NFC.
s/InitMCCodeGenInfo/initMCCodeGenInfo/

llvm-svn: 237471
2015-05-15 19:13:31 +00:00
Jim Grosbach
06d3c91b51 MC: clang-format. NFC.
llvm-svn: 237470
2015-05-15 19:13:20 +00:00
Jim Grosbach
eb68de6ea2 MC: Update MCCodeEmitter naming. NFC.
s/EncodeInstruction/encodeInstruction/

llvm-svn: 237469
2015-05-15 19:13:16 +00:00
Jim Grosbach
6eeec2791d MC: Update MCFixup naming. NFC.
s/MCFixup::Create/MCFixup::create/

llvm-svn: 237468
2015-05-15 19:13:05 +00:00
Jingyue Wu
e40608ff17 [NFC] remove an extra new line
llvm-svn: 237462
2015-05-15 18:32:21 +00:00
Eric Christopher
46b34828c6 While in GlobalValue fix the function(s) that don't follow the
naming convention and update users.

llvm-svn: 237461
2015-05-15 18:20:14 +00:00
Jingyue Wu
d795ba5ad9 Add a speculative execution pass
Summary:
This is a pass for speculative execution of instructions for simple if-then (triangle) control flow. It's aimed at GPUs, but could perhaps be used in other contexts. Enabling this pass gives us a 1.0% geomean improvement on Google benchmark suites, with one benchmark improving 33%.

Credit goes to Jingyue Wu for writing an earlier version of this pass.

Patched by Bjarke Roune. 

Test Plan:
This patch adds a set of tests in test/Transforms/SpeculativeExecution/spec.ll
The pass is controlled by a flag which defaults to having the pass not run.

Reviewers: eliben, dberlin, meheff, jingyue, hfinkel

Reviewed By: jingyue, hfinkel

Subscribers: majnemer, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D9360

llvm-svn: 237459
2015-05-15 17:54:48 +00:00
James Molloy
d400196c9a Revert "Canonicalize min/max expressions correctly."
This reverts r237453 - it was causing timeouts on some bots. Reverting
while I investigate (it's probably InstCombine fighting itself...)

llvm-svn: 237458
2015-05-15 17:45:09 +00:00
James Molloy
c16bd5523f [SDAGBuilder] Make the AArch64 builder happier.
I intended this loop to only unwrap SplitVector actions, but it
was more broad than that, such as unwrapping WidenVector actions,
which makes operations seem legal when they're not.

llvm-svn: 237457
2015-05-15 17:41:29 +00:00