Lang Hames
7d83af4ed0
Fix the order of the operands in the llvm.fma intrinsic patterns for ARM,
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<rdar://problem/11325085>.
llvm-svn: 155724
2012-04-27 18:51:24 +00:00
Jim Grosbach
66edf44403
Tidy up. 80 columns, whitespace, et. al.
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llvm-svn: 155399
2012-04-23 22:04:10 +00:00
Jim Grosbach
c935649d5c
ARM some VFP tblgen'erated two-operand aliases.
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llvm-svn: 155178
2012-04-20 00:15:00 +00:00
Evan Cheng
f138fb4599
Add more fused mul+add/sub patterns. rdar://10139676
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llvm-svn: 154484
2012-04-11 06:59:47 +00:00
Evan Cheng
f9baff015d
Clean up ARM fused multiply + add/sub support some more: rename some isel
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predicates.
Also remove NEON2 since it's not really useful and it is confusing. If
NEON + VFP4 implies NEON2 but NEON2 doesn't imply NEON + VFP4, what does it
really mean?
rdar://10139676
llvm-svn: 154480
2012-04-11 05:33:07 +00:00
Evan Cheng
b5291aea18
Match (fneg (fma) to vfnma. rdar://10139676
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llvm-svn: 154469
2012-04-11 01:21:25 +00:00
Evan Cheng
f9617f7f54
Handle llvm.fma.* intrinsics. rdar://10914096
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llvm-svn: 154439
2012-04-10 21:40:28 +00:00
Jim Grosbach
99aef428f3
ARM divided syntax fmrx/fmxr mnemonics.
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llvm-svn: 152946
2012-03-16 21:06:13 +00:00
Jim Grosbach
77151885af
ARM vmrs system registers mvfr0 and mvfr1 handling.
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rdar://11058464
llvm-svn: 152881
2012-03-16 00:27:18 +00:00
Jim Grosbach
3812c82b92
ARM case-insensitive checking for APSR_nzcv.
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rdar://11056591
llvm-svn: 152846
2012-03-15 21:34:14 +00:00
Jim Grosbach
04f671dced
ARM aliases for pre-unified syntax fcmpz[sd] mnemonics.
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rdar://11056647
llvm-svn: 152834
2012-03-15 20:48:18 +00:00
Kristof Beyls
5f7d669c67
Fix VCVT decoding (between floating-point and fixed-point, Floating-point). Patch by Richard Barton.
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llvm-svn: 152814
2012-03-15 17:50:29 +00:00
Lang Hames
a49054ac9c
Split fpscr into two registers: FPSCR and FPSCR_NZCV.
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The fpscr register contains both flags (set by FP operations/comparisons) and
control bits. The control bits (FPSCR) should be reserved, since they're always
available and needn't be defined before use. The flag bits (FPSCR_NZCV) should
like to be unreserved so they can be hoisted by MachineCSE. This fixes PR12165.
llvm-svn: 152076
2012-03-06 00:19:55 +00:00
Jim Grosbach
91314c2db6
ARM vpush/vpop assembler mnemonics accept an optional size suffix.
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rdar://10988114
llvm-svn: 152068
2012-03-05 23:16:31 +00:00
Sebastian Pop
e6eeed8151
updated patch for the ARM fused multiply add/sub
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In this update:
- I assumed neon2 does not imply vfpv4, but neon and vfpv4 imply neon2.
- I kept setting .fpu=neon-vfpv4 code attribute because that is what the
assembler understands.
Patch by Ana Pazos <apazos@codeaurora.org>
llvm-svn: 152036
2012-03-05 17:39:52 +00:00
Jia Liu
b077b6085d
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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llvm-svn: 150878
2012-02-18 12:03:15 +00:00
Anton Korobeynikov
76b0745f6c
Add fused multiple+add instructions from VFPv4.
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Patch by Ana Pazos!
llvm-svn: 148658
2012-01-22 12:07:33 +00:00
Jim Grosbach
a678ad9ecc
ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).
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rdar://10558523
llvm-svn: 147189
2011-12-22 22:19:05 +00:00
Jim Grosbach
5824007e4d
Remove some bogus comments.
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llvm-svn: 147169
2011-12-22 19:45:01 +00:00
Jim Grosbach
970c4cab9e
ARM pre-UAL aliases. fcmp[sd].
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llvm-svn: 147158
2011-12-22 19:20:45 +00:00
Jim Grosbach
7d31680e2d
ARM VFP optional data type on VMOV GPR<-->SPR.
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llvm-svn: 147104
2011-12-21 23:24:15 +00:00
Jim Grosbach
f9910809c5
ARM VFP pre-UAL mnemonic aliases for fmul[sd].
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llvm-svn: 146892
2011-12-19 19:43:50 +00:00
Jim Grosbach
6e9471925b
ARM VFP pre-UAL mnemonic aliases for fcpy[sd] and fdiv[sd].
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llvm-svn: 146887
2011-12-19 19:02:41 +00:00
Jim Grosbach
dfec87fe2f
ARM NEON two-operand aliases for VQDMULH.
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llvm-svn: 146514
2011-12-13 20:40:37 +00:00
Jim Grosbach
1738a66371
ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
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llvm-svn: 146508
2011-12-13 20:13:48 +00:00
Jim Grosbach
9e5ef02adb
ARM add more 'gas' compatibility aliases for NEON instructions.
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llvm-svn: 146507
2011-12-13 20:08:32 +00:00
Jim Grosbach
ece09e5e6b
ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
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llvm-svn: 146300
2011-12-10 00:01:02 +00:00
Jim Grosbach
2356c1f141
ARM add some pre-UAL VFP mnemonics for convenience when porting old code.
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llvm-svn: 146296
2011-12-09 23:34:09 +00:00
Jim Grosbach
5f3c519248
ARM convenience aliases for VSQRT.
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llvm-svn: 146201
2011-12-08 22:51:25 +00:00
Jim Grosbach
597cb99d62
ARM VFP support 'fmrs/fmsr' aliases for 'vldr'
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llvm-svn: 146116
2011-12-08 00:52:55 +00:00
Jim Grosbach
fa73a483a9
ARM VFP support 'flds/fldd' aliases for 'vldr'
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llvm-svn: 146115
2011-12-08 00:49:29 +00:00
Jim Grosbach
a740cc6bc9
ARM tidy up and remove no longer needed InstAlias definitions.
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The TokenAlias handling of data type suffices renders these unnecessary.
llvm-svn: 146010
2011-12-07 01:50:36 +00:00
Jim Grosbach
d573473cb8
ARM VFP assembly parsing for VADD and VSUB two-operand forms.
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llvm-svn: 144710
2011-11-15 22:15:10 +00:00
Jim Grosbach
3c205132ff
ARM size suffix on VFP single-precision 'vmov' is optional.
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rdar://10435114
llvm-svn: 144698
2011-11-15 21:18:35 +00:00
Jim Grosbach
8987b277cb
ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns.
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Yet more of rdar://10435076.
llvm-svn: 144691
2011-11-15 20:29:42 +00:00
Jim Grosbach
f0690cd90c
ARM assembly parsing for two-operand form of 'mul' instruction.
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rdar://10449856.
llvm-svn: 144689
2011-11-15 20:14:51 +00:00
Jim Grosbach
4a2f107b04
ARM VLDR/VSTR instructions don't need a size suffix.
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Canonicallize on the non-suffixed form, but continue to accept assembly that
has any correctly sized type suffix.
llvm-svn: 144583
2011-11-14 23:03:21 +00:00
Jim Grosbach
009733c9e4
ARM assembly parsing type suffix options for VLDR/VSTR.
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rdar://10435076
llvm-svn: 144575
2011-11-14 22:28:39 +00:00
Jim Grosbach
13b7ab7527
ARM optional size suffix for VLDR/VSTR syntax.
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llvm-svn: 144427
2011-11-11 23:34:43 +00:00
Jim Grosbach
f38874e79e
ARM assembly parsing and encoding for VMOV immediate.
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llvm-svn: 141046
2011-10-03 23:38:36 +00:00
Jim Grosbach
21a9f8f50f
ARM assembly parsing and encoding for VMRS/FMSTAT.
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llvm-svn: 141025
2011-10-03 21:12:43 +00:00
Jim Grosbach
d94ffffc87
ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.
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Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.
rdar://10211428
llvm-svn: 140834
2011-09-30 00:50:06 +00:00
Owen Anderson
4bd28c69c4
Add missing encoding information for some of the GPR<->FP register moves.
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llvm-svn: 138780
2011-08-29 23:15:25 +00:00
Owen Anderson
a2231fad2e
Provide operand encoding information for half-precision VCVT instructions. Found by randomized testing.
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llvm-svn: 138273
2011-08-22 21:34:00 +00:00
Owen Anderson
39d3f234f7
Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming majority of decoder crashes detected by randomized testing.
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llvm-svn: 138269
2011-08-22 20:27:12 +00:00
Owen Anderson
48156a8b45
Fix the broken encodings for the VFP vmov.f32 and vmov.f64 instructions, as well as the comments that explain them incorrectly.
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llvm-svn: 136707
2011-08-02 18:30:00 +00:00
Owen Anderson
c68f12ff30
Add a target-indepedent entry to MCInstrDesc to describe the encoded size of an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits.
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llvm-svn: 135106
2011-07-13 23:22:26 +00:00
Cameron Zwarich
10c7a9fd7b
The VMLA instruction and its friends are not actually fused; they're plain old
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multiply-accumulate instructions with separate rounding steps.
llvm-svn: 134609
2011-07-07 08:28:52 +00:00
Jim Grosbach
7157b0228f
ARM assembler support for vpush/vpop.
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Add aliases for the vpush/vpop mnemonics to the VFP load/store multiple
writeback instructions w/ SP as the base pointer.
rdar://9683231
llvm-svn: 133932
2011-06-27 20:00:07 +00:00
Jim Grosbach
eff8e5d153
Clean up a few 80 column violations.
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llvm-svn: 132946
2011-06-13 22:54:22 +00:00