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Commit Graph

8878 Commits

Author SHA1 Message Date
Brendon Cahoon
3a664dba6e Reland "[AMDGPU] Add gfx1013 target"
This reverts commit 211e584fa2a4c032e4d573e7cdbffd622aad0a8f.

Fixed a use-after-free error that caused the sanitizers to fail.
2021-06-08 21:15:35 -04:00
Brendon Cahoon
8238dc695f Revert "[AMDGPU] Add gfx1013 target"
This reverts commit ea10a86984ea73fcec3b12d22404a15f2f59b219.

A sanitizer buildbot reports an error.
2021-06-08 16:29:41 -04:00
Brendon Cahoon
c9fa68e102 [AMDGPU] Add gfx1013 target
Differential Revision: https://reviews.llvm.org/D103663
2021-06-08 12:49:49 -04:00
Arthur Eubanks
4cc1a31398 Revert "[TargetLowering] Only inspect attributes in the arguments for ArgListEntry"
Needs to be discussed more.

This reverts commit 255a5c1baa6020c009934b4fa342f9f6dbbcc46
This reverts commit df2056ff3730316f376f29d9986c9913b95ceb1
This reverts commit faff79b7ca144e505da6bc74aa2b2f7cffbbf23
This reverts commit d2a9020785c6e02afebc876aa2778fa64c5cafd
2021-06-07 16:07:44 -07:00
Krzysztof Parzyszek
a4d9276f53 [docs] Set Phabricator as the tool for pre-commit reviews
Differential Revision: https://reviews.llvm.org/D103811
2021-06-07 11:50:52 -05:00
Arthur Eubanks
b01ec7e228 [TargetLowering] Only inspect attributes in the arguments for ArgListEntry
Parameter attributes are considered part of the function [1], and like
mismatched calling conventions [2], we can't have the verifier check for
mismatched parameter attributes.

Issues can be diagnosed with D103412.

[1] https://llvm.org/docs/LangRef.html#parameter-attributes
[2] https://llvm.org/docs/FAQ.html#why-does-instcombine-simplifycfg-turn-a-call-to-a-function-with-a-mismatched-calling-convention-into-unreachable-why-not-make-the-verifier-reject-it

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D101806
2021-06-03 15:52:01 -07:00
Fangrui Song
dd23a07d05 [docs] Update llvm-cov gcov
Mention some new options.

Remove outdated information about -g and -O0. -g0 works. -O1/-O2/-O3 work.
2021-06-03 12:36:27 -07:00
cynecx
be221f0b41 [LangRef] update according to unwinding support in inline asm
https://reviews.llvm.org/D95745 introduced a new `unwind` keyword for inline assembler expressions. Inline asms marked with the `unwind` keyword allows stack unwinding from inline assembly because the compiler emits unwinding information ("around" the inline asm) as it would for calls/invokes. Unwinding the stack from within non-unwind inline asm may cause UB.

Reviewed By: Amanieu

Differential Revision: https://reviews.llvm.org/D102642
2021-05-31 09:01:46 +01:00
Arthur Eubanks
f9c1930dea Revert "[TargetLowering] Only inspect attributes in the arguments for ArgListEntry"
This reverts commit 1c7f32334d4becc725b9025fd32291a0e5729acd.

Some code still needs to properly set parameter ABI attributes, see
D101806.
2021-05-29 23:08:15 -07:00
Tim Northover
859ff3505c SwiftTailCC: teach verifier musttail rules applicable to this CC.
SwiftTailCC has a different set of requirements than the C calling convention
for a tail call. The exact argument sequence doesn't have to match, but fewer
ABI-affecting attributes are allowed.

Also make sure the musttail diagnostic triggers if a musttail call isn't
actually a tail call.
2021-05-28 11:12:00 +01:00
Fangrui Song
06613cf382 [docs] llvm-objdump: Mention -M no-aliases is supported on AArch64 2021-05-26 23:57:32 -07:00
Yevgeny Rouban
0a4cf978a7 [RS4GC] Introduce intrinsics to get base ptr and offset
There can be a need for some optimizations to get (base, offset)
for any GC pointer. The base can be calculated by generating
needed instructions as it is done by the
RewriteStatepointsForGC::findBasePointer() function. The offset
can be calculated in the same way. Though to not expose the base
calculation and to make the offset calculation as simple as
ptrtoint(derived_ptr) - ptrtoint(base_ptr), which is illegal
outside RS4GC, this patch introduces 2 intrinsics:

 @llvm.experimental.gc.get.pointer.base(%derived_ptr)
 @llvm.experimental.gc.get.pointer.offset(%derived_ptr)

These intrinsics are inlined by RS4GC along with generation of
statepoint sequences.

With these new intrinsics the GC parseable lowering for atomic
memcpy intrinsics (6ec2c5e402a724ba99bce82a9cac7a3006d660f4)
could be implemented as a separate pass.

Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D100445
2021-05-27 09:14:14 +07:00
naromero77
863822a0e1 [flang][docs] Initial documentation for the Fortran LLVM Test Suite.
Describes how to run the Fortran LLVM Test Suite, specifically the external SPEC CPU 2017 Fortran tests.

Reviewed By: rovka

Differential Revision: https://reviews.llvm.org/D102877
2021-05-26 15:59:55 -05:00
pooja2299
e5cec4b7a2 [Docs] Updated the content of getting started documentation under llvm/lib/MC
Wrote about llvm/lib/MC subproject on https://llvm.org/docs/GettingStarted.html page.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D101047
2021-05-26 16:25:26 +05:30
Martin Storsjö
77c89471fd [docs] [CMake] Change recommendations for how to use LLVM_DEFINITIONS
LLVM_DEFINITIONS is a string variable containing a list of arguments
to pass to the compiler. When CMake's add_definitions is passed a
string variable, this is interpreted as one argument. To make it
behave properly, the string variable needs to be split into a list.

Despite the fact that add_definitions isn't supposed to be used like
the LLVM docs recommended, it worked fine in practice in many cases.
If the first argument in LLVM_DEFINITIONS is of the form -DFOO=42
instead of plain -DFOO, the rest of the string is treated as value
to this define. I.e. if LLVM_DEFINITIONS consists of `-DFOO=42 -DBAR`,
CMake ended up passing `-DFOO="42 -DBAR"` to the compiler.

See https://gitlab.kitware.com/cmake/cmakissues/22162
for discussion on the matter.

Changing LLVM_DEFINITIONS to be a list variable would possibly be
more disruptive; instead keep the variable defined as before but
change the recommendation for how to use it. Then projects using it
can gradually be updated to follow the new recommendation.

Differential Revision: https://reviews.llvm.org/D103044
2021-05-25 22:56:51 +03:00
Arthur Eubanks
c0b1fddf31 [docs] Explain address spaces a bit more in opaque pointers doc
Reviewed By: theraven

Differential Revision: https://reviews.llvm.org/D102523
2021-05-25 12:35:43 -07:00
Marco Elver
b835b9cf36 [SanitizeCoverage] Add support for NoSanitizeCoverage function attribute
We really ought to support no_sanitize("coverage") in line with other
sanitizers. This came up again in discussions on the Linux-kernel
mailing lists, because we currently do workarounds using objtool to
remove coverage instrumentation. Since that support is only on x86, to
continue support coverage instrumentation on other architectures, we
must support selectively disabling coverage instrumentation via function
attributes.

Unfortunately, for SanitizeCoverage, it has not been implemented as a
sanitizer via fsanitize= and associated options in Sanitizers.def, but
rolls its own option fsanitize-coverage. This meant that we never got
"automatic" no_sanitize attribute support.

Implement no_sanitize attribute support by special-casing the string
"coverage" in the NoSanitizeAttr implementation. To keep the feature as
unintrusive to existing IR generation as possible, define a new negative
function attribute NoSanitizeCoverage to propagate the information
through to the instrumentation pass.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=49035

Reviewed By: vitalybuka, morehouse

Differential Revision: https://reviews.llvm.org/D102772
2021-05-25 12:57:14 +02:00
Roman Lebedev
5d534d8259 [llvm-exegesis] Loop unrolling for loop snippet repetitor mode
I really needed this, like, factually, yesterday,
when verifying dependency breaking idioms for AMD Zen 3 scheduler model.

Consider the following example:
```
$ ./bin/llvm-exegesis --mode=inverse_throughput --snippets-file=/tmp/snippet.s --num-repetitions=1000000 --repetition-mode=duplicate
Check generated assembly with: /usr/bin/objdump -d /tmp/snippet-4a7e50.o
---
mode:            inverse_throughput
key:
  instructions:
    - 'VPXORYrr YMM0 YMM0 YMM0'
  config:          ''
  register_initial_values: []
cpu_name:        znver3
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 1000000
measurements:
  - { key: inverse_throughput, value: 0.31025, per_snippet_value: 0.31025 }
error:           ''
info:            ''
assembled_snippet: C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C5FDEFC0C3
...

```
What does it tell us?
So wait, it can only execute ~3 x86 AVX YMM PXOR zero-idioms per cycle?
That doesn't seem right. That's even less than there are pipes supporting this type of op.

Now, second example:
```
$ ./bin/llvm-exegesis --mode=inverse_throughput --snippets-file=/tmp/snippet.s --num-repetitions=1000000 --repetition-mode=loop
Check generated assembly with: /usr/bin/objdump -d /tmp/snippet-2418b5.o
---
mode:            inverse_throughput
key:
  instructions:
    - 'VPXORYrr YMM0 YMM0 YMM0'
  config:          ''
  register_initial_values: []
cpu_name:        znver3
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 1000000
measurements:
  - { key: inverse_throughput, value: 1.00011, per_snippet_value: 1.00011 }
error:           ''
info:            ''
assembled_snippet: 49B80800000000000000C5FDEFC0C5FDEFC04983C0FF75F2C3
...
```
Now that's just worse. Due to the looping, the throughput completely plummeted,
and now we can only do a single instruction/cycle!?

That's not great.
And final example:
```
$ ./bin/llvm-exegesis --mode=inverse_throughput --snippets-file=/tmp/snippet.s --num-repetitions=1000000 --repetition-mode=loop --loop-body-size=1000
Check generated assembly with: /usr/bin/objdump -d /tmp/snippet-c402e2.o
---
mode:            inverse_throughput
key:
  instructions:
    - 'VPXORYrr YMM0 YMM0 YMM0'
  config:          ''
  register_initial_values: []
cpu_name:        znver3
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 1000000
measurements:
  - { key: inverse_throughput, value: 0.167087, per_snippet_value: 0.167087 }
error:           ''
info:            ''
assembled_snippet: 49B80800000000000000C5FDEFC0C5FDEFC04983C0FF75F2C3
...
```

So if we merge the previous two approaches, do duplicate this single-instruction snippet 1000x
(loop-body-size/instruction count in snippet), and run a loop with 1000 iterations
over that duplicated/unrolled snippet, the measured throughput goes through the roof,
up to 5.9 instructions/cycle, which finally tells us that this idiom is zero-cycle!

Reviewed By: courbet

Differential Revision: https://reviews.llvm.org/D102522
2021-05-25 12:08:27 +03:00
Tony Tye
39f986d2c4 [NFC][AMDGPU] Add documentation for AMD Instinct MI100 accelerator
Add link to documentation for "AMD Instinct MI100 Instruction Set
Architecture" to AMDGPUUsage.rst.

Reviewed By: kzhuravl, rampitec, dp

Differential Revision: https://reviews.llvm.org/D102859
2021-05-21 16:51:13 +00:00
Tony Tye
8dfab88553 [NFC][AMDGPU] Mark C code in AMDGPUUsage.rst
Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D102910
2021-05-21 10:08:05 +00:00
Andy Wingo
107b591be0 [IR][Verifier] Relax restriction on alloca address spaces
In the WebAssembly target, we would like to allow alloca in two address
spaces.  The alloca instruction already has an address space argument,
but the verifier asserts that the address space of an alloca is the
default alloca address space from the datalayout.  This patch removes
this restriction.  Targets that would like to impose additional
restrictions should do so via target-specific verification passes.

Differential Revision: https://reviews.llvm.org/D101045
2021-05-21 11:52:45 +02:00
Djordje Todorovic
88aa158bd7 Recommit: "[Debugify][Original DI] Test dbg var loc preservation""
[Debugify][Original DI] Test dbg var loc preservation

    This is an improvement of [0]. This adds checking of
    original llvm.dbg.values()/declares() instructions in
    optimizations.

    We have picked a real issue that has been found with
    this (actually, picked one variable location missing
    from [1] and resolved the issue), and the result is
    the fix for that -- D100844.

    Before applying the D100844, using the options from [0]
    (but with this patch applied) on the compilation of GDB 7.11,
    the final HTML report for the debug-info issues can be found
    at [1] (please scroll down, and look for
    "Summary of Variable Location Bugs"). After applying
    the D100844, the numbers has improved a bit -- please take
    a look into [2].

    [0] https://llvm.org/docs/HowToUpdateDebugInfo.html#\
        test-original-debug-info-preservation-in-optimizations
    [1] https://djolertrk.github.io/di-check-before-adce-fix/
    [2] https://djolertrk.github.io/di-check-after-adce-fix/

    Differential Revision: https://reviews.llvm.org/D100845

The Unit test was failing because the pass from the test that
modifies the IR, in its runOnFunction() didn't return 'true',
so the expensive-check configuration triggered an assertion.
2021-05-21 02:04:29 -07:00
Djordje Todorovic
b69d892627 Revert "[Debugify][Original DI] Test dbg var loc preservation"
This reverts commit 76f375f3d9d6902820ffc21200e454926748c678.

This will be pushed again, after investigating a test failure:
https://lab.llvm.org/buildbot/#/builders/16/builds/11254
2021-05-20 07:11:35 -07:00
Djordje Todorovic
8ece18da90 [Debugify][Original DI] Test dbg var loc preservation
This is an improvement of [0]. This adds checking of
original llvm.dbg.values()/declares() instructions in
optimizations.

We have picked a real issue that has been found with
this (actually, picked one variable location missing
from [1] and resolved the issue), and the result is
the fix for that -- D100844.

Before applying the D100844, using the options from [0]
(but with this patch applied) on the compilation of GDB 7.11,
the final HTML report for the debug-info issues can be found
at [1] (please scroll down, and look for
"Summary of Variable Location Bugs"). After applying
the D100844, the numbers has improved a bit -- please take
a look into [2].

[0] https://llvm.org/docs/HowToUpdateDebugInfo.html\
[1] https://djolertrk.github.io/di-check-before-adce-fix/
[2] https://djolertrk.github.io/di-check-after-adce-fix/

Differential Revision: https://reviews.llvm.org/D100845
2021-05-20 06:42:02 -07:00
Ahmed Bougacha
50227f56b6 [docs] Describe reporting security issues on the chromium tracker.
To track security issues, we're starting with the chromium bug tracker
(using the llvm project there).

We considered using Github Security Advisories.  However, they are
currently intended as a way for project owners to publicize their
security advisories, and aren't well-suited to reporting issues.

This also moves the issue-reporting paragraph to the beginning of the
document, in part to make it more discoverable, in part to allow the
anchor-linking to actually display the paragraph at the top of the page.

Note that this doesn't update the concrete list of security-sensitive
areas, which is still an open item.  When we do, we may want to move the
list of security-sensitive areas next to the issue-reporting paragraph
as well, as it seems like relevant information needed in the reporting
process.

Finally, when describing the discission medium, this splits the topics
discussed into two: the concrete security issues, discussed in the
issue tracker, and the logistics of the group, in our mailing list,
as patches on public lists, and in the monthly sync-up call.

While there, add a SECURITY.md page linking to the relevant paragraph.

Differential Revision: https://reviews.llvm.org/D100873
2021-05-19 15:21:50 -07:00
Vitaly Buka
d474f1c2ce [libfuzzer] Update doc mentioning removed flags. 2021-05-18 22:40:42 -07:00
Alex Orlov
fb84758743 [symbolizer] Added StartAddress for the resolved function.
In many cases it is helpful to know at what address the resolved function starts.
This patch adds a new StartAddress member to the DILineInfo structure.

Reviewed By: jhenderson, dblaikie

Differential Revision: https://reviews.llvm.org/D102316
2021-05-19 02:38:13 +04:00
Arthur Eubanks
d51b2ca5b9 [docs] Fix broken docs after 1c7f32334 2021-05-18 14:38:12 -07:00
Arthur Eubanks
b8775b2a78 [TargetLowering] Only inspect attributes in the arguments for ArgListEntry
Parameter attributes are considered part of the function [1], and like
mismatched calling conventions [2], we can't have the verifier check for
mismatched parameter attributes.

This is a reland after fixing MSan issues in D102667.

[1] https://llvm.org/docs/LangRef.html#parameter-attributes
[2] https://llvm.org/docs/FAQ.html#why-does-instcombine-simplifycfg-turn-a-call-to-a-function-with-a-mismatched-calling-convention-into-unreachable-why-not-make-the-verifier-reject-it

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D101806
2021-05-18 14:30:22 -07:00
Konstantin Zhuravlyov
17a1c72316 AMDGPU/Docs: Remove reserved MACH 0x3E (it is no longer reserved), sort MACHs by value 2021-05-18 16:57:56 -04:00
Ten Tzen
9ff115e8b2 [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 1
This patch is the Part-1 (FE Clang) implementation of HW Exception handling.

This new feature adds the support of Hardware Exception for Microsoft Windows
SEH (Structured Exception Handling).
This is the first step of this project; only X86_64 target is enabled in this patch.

Compiler options:
For clang-cl.exe, the option is -EHa, the same as MSVC.
For clang.exe, the extra option is -fasync-exceptions,
plus -triple x86_64-windows -fexceptions and -fcxx-exceptions as usual.

NOTE:: Without the -EHa or -fasync-exceptions, this patch is a NO-DIFF change.

The rules for C code:
For C-code, one way (MSVC approach) to achieve SEH -EHa semantic is to follow
three rules:
* First, no exception can move in or out of _try region., i.e., no "potential
  faulty instruction can be moved across _try boundary.
* Second, the order of exceptions for instructions 'directly' under a _try
  must be preserved (not applied to those in callees).
* Finally, global states (local/global/heap variables) that can be read
  outside of _try region must be updated in memory (not just in register)
  before the subsequent exception occurs.

The impact to C++ code:
Although SEH is a feature for C code, -EHa does have a profound effect on C++
side. When a C++ function (in the same compilation unit with option -EHa ) is
called by a SEH C function, a hardware exception occurs in C++ code can also
be handled properly by an upstream SEH _try-handler or a C++ catch(...).
As such, when that happens in the middle of an object's life scope, the dtor
must be invoked the same way as C++ Synchronous Exception during unwinding
process.

Design:
A natural way to achieve the rules above in LLVM today is to allow an EH edge
added on memory/computation instruction (previous iload/istore idea) so that
exception path is modeled in Flow graph preciously. However, tracking every
single memory instruction and potential faulty instruction can create many
Invokes, complicate flow graph and possibly result in negative performance
impact for downstream optimization and code generation. Making all
optimizations be aware of the new semantic is also substantial.

This design does not intend to model exception path at instruction level.
Instead, the proposed design tracks and reports EH state at BLOCK-level to
reduce the complexity of flow graph and minimize the performance-impact on CPP
code under -EHa option.

One key element of this design is the ability to compute State number at
block-level. Our algorithm is based on the following rationales:

A _try scope is always a SEME (Single Entry Multiple Exits) region as jumping
into a _try is not allowed. The single entry must start with a seh_try_begin()
invoke with a correct State number that is the initial state of the SEME.
Through control-flow, state number is propagated into all blocks. Side exits
marked by seh_try_end() will unwind to parent state based on existing
SEHUnwindMap[].
Note side exits can ONLY jump into parent scopes (lower state number).
Thus, when a block succeeds various states from its predecessors, the lowest
State triumphs others.  If some exits flow to unreachable, propagation on those
paths terminate, not affecting remaining blocks.
For CPP code, object lifetime region is usually a SEME as SEH _try.
However there is one rare exception: jumping into a lifetime that has Dtor but
has no Ctor is warned, but allowed:

Warning: jump bypasses variable with a non-trivial destructor

In that case, the region is actually a MEME (multiple entry multiple exits).
Our solution is to inject a eha_scope_begin() invoke in the side entry block to
ensure a correct State.

Implementation:
Part-1: Clang implementation described below.

Two intrinsic are created to track CPP object scopes; eha_scope_begin() and eha_scope_end().
_scope_begin() is immediately added after ctor() is called and EHStack is pushed.
So it must be an invoke, not a call. With that it's also guaranteed an
EH-cleanup-pad is created regardless whether there exists a call in this scope.
_scope_end is added before dtor(). These two intrinsics make the computation of
Block-State possible in downstream code gen pass, even in the presence of
ctor/dtor inlining.

Two intrinsic, seh_try_begin() and seh_try_end(), are added for C-code to mark
_try boundary and to prevent from exceptions being moved across _try boundary.
All memory instructions inside a _try are considered as 'volatile' to assure
2nd and 3rd rules for C-code above. This is a little sub-optimized. But it's
acceptable as the amount of code directly under _try is very small.

Part-2 (will be in Part-2 patch): LLVM implementation described below.

For both C++ & C-code, the state of each block is computed at the same place in
BE (WinEHPreparing pass) where all other EH tables/maps are calculated.
In addition to _scope_begin & _scope_end, the computation of block state also
rely on the existing State tracking code (UnwindMap and InvokeStateMap).

For both C++ & C-code, the state of each block with potential trap instruction
is marked and reported in DAG Instruction Selection pass, the same place where
the state for -EHsc (synchronous exceptions) is done.
If the first instruction in a reported block scope can trap, a Nop is injected
before this instruction. This nop is needed to accommodate LLVM Windows EH
implementation, in which the address in IPToState table is offset by +1.
(note the purpose of that is to ensure the return address of a call is in the
same scope as the call address.

The handler for catch(...) for -EHa must handle HW exception. So it is
'adjective' flag is reset (it cannot be IsStdDotDot (0x40) that only catches
C++ exceptions).
Suppress push/popTerminate() scope (from noexcept/noTHrow) so that HW
exceptions can be passed through.

Original llvm-dev [RFC] discussions can be found in these two threads below:
https://lists.llvm.org/pipermail/llvm-dev/2020-March/140541.html
https://lists.llvm.org/pipermail/llvm-dev/2020-April/141338.html

Differential Revision: https://reviews.llvm.org/D80344/new/
2021-05-17 22:42:17 -07:00
Alex Zinenko
01e701738c [llvm][doc] fix header for read/write_register intrinsics in LangRef
Mutli-line headers are not allowed in RST, reformat the header to be a
single wide line.
2021-05-17 18:38:16 +02:00
Tim Northover
fc5daa6083 IR/AArch64/X86: add "swifttailcc" calling convention.
Swift's new concurrency features are going to require guaranteed tail calls so
that they don't consume excessive amounts of stack space. This would normally
mean "tailcc", but there are also Swift-specific ABI desires that don't
naturally go along with "tailcc" so this adds another calling convention that's
the combination of "swiftcc" and "tailcc".

Support is added for AArch64 and X86 for now.
2021-05-17 10:48:34 +01:00
Arthur Eubanks
99d811bdc5 Revert "[TargetLowering] Only inspect attributes in the arguments for ArgListEntry"
This reverts commit 16748bd2fb1fe10d7d097961f1988327338f3f9f.

Causes https://crbug.com/1209013
2021-05-16 22:02:10 -07:00
Stanislav Mekhanoshin
af64ca04f5 [AMDGPU] Add support for architected flat scratch
Add support for the readonly flat Scratch register initialized
by the SPI.

Differential Revision: https://reviews.llvm.org/D102432
2021-05-14 10:53:48 -07:00
Dmitry Preobrazhensky
cb8494eadb [AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes:
- added description of GFX90A;
- minor bugfixing and improvements.
2021-05-14 16:13:30 +03:00
Tim Northover
5661b7eb80 IR+AArch64: add a "swiftasync" argument attribute.
This extends any frame record created in the function to include that
parameter, passed in X22.

The new record looks like [X22, FP, LR] in memory, and FP is stored with 0b0001
in bits 63:60 (CodeGen assumes they are 0b0000 in normal operation). The effect
of this is that tools walking the stack should expect to see one of three
values there:

  * 0b0000 => a normal, non-extended record with just [FP, LR]
  * 0b0001 => the extended record [X22, FP, LR]
  * 0b1111 => kernel space, and a non-extended record.

All other values are currently reserved.

If compiling for arm64e this context pointer is address-discriminated with the
discriminator 0xc31a and the DB (process-specific) key.

There is also an "i8** @llvm.swift.async.context.addr()" intrinsic providing
front-ends access to this slot (and forcing its creation initialized to nullptr
if necessary).
2021-05-14 11:43:58 +01:00
Pooja Yadav
5296db8df0 [docs] Added llvm/cmake section
Added information about the cmake inside llvm.

Reviewed By: xgupta, jroelofs

Differential Revision: https://reviews.llvm.org/D101925
2021-05-14 14:10:56 +05:30
Arthur Eubanks
1b32fba3b3 [IR] Introduce the opaque pointer type
The opaque pointer type is essentially just a normal pointer type with a
null pointee type.

This also adds support for the opaque pointer type to the bitcode
reader/writer, as well as to textual IR.

To avoid confusion with existing pointer types, we disallow creating a
pointer to an opaque pointer.

Opaque pointer types should not be widely used at this point since many
parts of LLVM still do not support them. The next steps are to add some
very simple use cases of opaque pointers to make sure they work, then
start pretending that all pointers are opaque pointers and see what
breaks.

https://lists.llvm.org/pipermail/llvm-dev/2021-May/150359.html

Reviewed By: dblaikie, dexonsmith, pcc

Differential Revision: https://reviews.llvm.org/D101704
2021-05-13 15:22:27 -07:00
Arthur Eubanks
88e8f8e83e [docs] Add page on opaque pointer types
Reviewed By: dblaikie, dexonsmith

Differential Revision: https://reviews.llvm.org/D102292
2021-05-13 15:10:27 -07:00
Martin Storsjö
b2438b1473 [llvm-nm] Support the -V option, print that the tool is compatible with GNU nm
This unlocks some codepaths in libtool.

Differential Revision: https://reviews.llvm.org/D102321
2021-05-13 22:36:25 +03:00
Aakanksha Patil
e5759b8eca [AMDGPU] Add gfx1034 target
Differential Revision: https://reviews.llvm.org/D102306
2021-05-13 14:25:18 -04:00
Krzysztof Parzyszek
78ddcf78f9 Fix section title underlining in the release notes 2021-05-13 08:37:06 -05:00
Krzysztof Parzyszek
5562e5f41c Add entry about Hexagon V68 support to the release notes 2021-05-13 08:28:55 -05:00
Shoaib Meenai
011d3c9d37 [cmake] Add support for multiple distributions
LLVM's build system contains support for configuring a distribution, but
it can often be useful to be able to configure multiple distributions
(e.g. if you want separate distributions for the tools and the
libraries). Add this support to the build system, along with
documentation and usage examples.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D89177
2021-05-12 11:13:18 -07:00
Tony Tye
c65c7c3cfc [NFC][AMDGPU] Correct product name for gfx908
The product name for gfx908 is "AMD Instinct MI100 Accelerator".

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D102209
2021-05-11 15:17:04 +00:00
Alex Orlov
4e9da478f3 * Add support for JSON output style to llvm-symbolizer
This patch adds JSON output style to llvm-symbolizer to better support CLI automation by providing a machine readable output.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D96883
2021-05-11 13:10:54 +04:00
Arthur Eubanks
3be78fa191 [TargetLowering] Only inspect attributes in the arguments for ArgListEntry
Parameter attributes are considered part of the function [1], and like
mismatched calling conventions [2], we can't have the verifier check for
mismatched parameter attributes.

[1] https://llvm.org/docs/LangRef.html#parameter-attributes
[2] https://llvm.org/docs/FAQ.html#why-does-instcombine-simplifycfg-turn-a-call-to-a-function-with-a-mismatched-calling-convention-into-unreachable-why-not-make-the-verifier-reject-it

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D101806
2021-05-10 12:35:11 -07:00
gbreynoo
68f9c832a8 [llvm-symbolizer] Update Command Guide
The option --use-symbol-table is now a noop and does not appear in the
help text, however it still appears in the command guide. This change
removes it from the command guide and updates the description of
--output-style .

Differential Revision: https://reviews.llvm.org/D102078
2021-05-10 17:21:34 +01:00
Fraser Cormack
8994b24c78 [LangRef][VP] Fix typos in VP sdiv/udiv examples 2021-05-06 16:37:18 +01:00
Matt Arsenault
2e74ccd44a GlobalISel: Update documentation 2021-05-05 17:35:02 -04:00
Pooja Yadav
dfdd7885ea [docs] Update the llvm/example section
Added details about the llvm/example section.

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D101284
2021-05-05 21:33:14 +05:30
Sushma Unnibhavi
53774cc7a7 [DOCS] Added example for G_EXTRACT and G_INSERT
Reviewed By: xgupta, gargaroff

Differential Revision: https://reviews.llvm.org/D101227
2021-05-05 15:47:35 +05:30
Fangrui Song
49266e7300 [llvm-objdump] Add -M {att,intel} & deprecate --x86-asm-syntax={att,intel}
The internal `cl::opt` option --x86-asm-syntax sets the AsmParser and AsmWriter
dialect. The option is used by llc and llvm-mc tests to set the AsmWriter dialect.

This patch adds -M {att,intel} as GNU objdump compatible aliases (PR43413).

Note: the dialect is initialized when the MCAsmInfo is constructed.
`MCInstPrinter::applyTargetSpecificCLOption` is called too late and its MCAsmInfo
reference is const, so changing the `cl::opt` in
`MCInstPrinter::applyTargetSpecificCLOption` is not an option, at least without
large amount of refactoring.

Reviewed By: hoy, jhenderson, thakis

Differential Revision: https://reviews.llvm.org/D101695
2021-05-05 00:20:41 -07:00
Alina Sbirlea
f3aac64c1f Add cal entry for MemorySSA syncs. 2021-05-04 12:56:06 -07:00
Alina Sbirlea
91efc4eb34 Add monthly MemorySSA sync. 2021-05-04 11:23:36 -07:00
Arthur Eubanks
d13aef09f1 [docs] Fix some wording 2021-05-04 10:21:38 -07:00
gbreynoo
5291a705c1 [llvm-objdump] Remove --cfg option from command guide
The llvm-objdump command guide has the option --cfg which was removed
from the tool by 888320e9fa5eb33194c066f68d50f1e73c5fff5e in 2014. This
change updates the command guide to reflect this.

Differential Revision: https://reviews.llvm.org/D101648
2021-05-04 16:42:13 +01:00
Fraser Cormack
1c9a07e9b0 [LangRef] Fix a typo in the vector-type memory layout section 2021-05-04 15:40:53 +01:00
Arthur Eubanks
0883647021 [docs][NewPM] Add section on analyses
Reviewed By: asbirlea, ychen

Differential Revision: https://reviews.llvm.org/D100912
2021-05-03 10:15:02 -07:00
Christian Kühnel
dd38cc31c5 [doc] typo fixes
as proposed by @FlashSheridan in
https://reviews.llvm.org/rG7f9717b922d4
2021-05-03 10:59:51 +02:00
Nick Desaulniers
b45152915e [llvm-objdump] add -v alias for --version
Used by the Linux kernel's CONFIG_X86_DECODER_SELFTEST.

Link: https://github.com/ClangBuiltLinux/linux/issues/1130

Reviewed By: MaskRay, jhenderson, rupprecht

Differential Revision: https://reviews.llvm.org/D101483
2021-04-30 11:26:36 -07:00
Pooja Yadav
b5839a5bcf [docs]Added llvm/bindings section
Added information about language bindings provided by LLVM.

Reviewed By: xgupta, gandhi21299

Differential Revision: https://reviews.llvm.org/D101295
2021-04-30 19:05:22 +05:30
Jonas Devlieghere
ffe6466b17 [dsymutil] Add flag to force a static variable to keep its enclosing function
Add a flag to change dsymutil's behavior and force a static variable to
keep its enclosing function. The test shows a situation where that could
be useful. I'm not convinced this behavior makes sense as a default,
which is why it's behind a flag.

rdar://74918374

Differential revision: https://reviews.llvm.org/D101337
2021-04-28 11:33:04 -07:00
Paul C. Anagnostopoulos
545a4d4a19 [TableGen] Add the !find bang operator
!find searches a source string for a target string and returns the position.

Differential Revision: https://reviews.llvm.org/D101318
2021-04-28 09:51:00 -04:00
Ahmed Bougacha
4a04d21325 [docs] Replace Apple representative to security group.
Differential Revision: https://reviews.llvm.org/D100864
2021-04-27 11:00:49 -07:00
Christian Kühnel
6d2a6bfee4 [doc] added documentation for pre-merge testing
fixes https://github.com/google/llvm-premerge-checks/issues/275

Differential Revision: https://reviews.llvm.org/D100936
2021-04-27 16:53:16 +02:00
Pooja Yadav
b7bdf617bd [Docs] Updated LLVM_TARGETS_TO_BUILD section in GettingStarted.rst
Updated LLVM_TARGETS_TO_BUILD  under https://llvm.org/docs/GettingStarted.html#local-llvm-configuration.

Differential Revision: https://reviews.llvm.org/D101101
2021-04-24 00:31:43 +05:30
Paul C. Anagnostopoulos
3b840f40c3 [TableGen] [docs] Improve BNF for the 'multiclass' statement [NFC] 2021-04-23 12:05:52 -04:00
Paul C. Anagnostopoulos
3d33c078f3 [TableGen] [docs] Improve description of NAME in Programmer's Reference
Also use "parent class" consistently and add a note about the term.

Differential Revision: https://reviews.llvm.org/D100867
2021-04-23 09:49:17 -04:00
Thomas Preud'homme
71007d77ca [doc] Clarify constrained fcmps behavior
Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D101053
2021-04-23 11:55:20 +01:00
Fangrui Song
c83fe04e08 [IR][sanitizer] Add module flag "frame-pointer" and set it for cc1 -mframe-pointer={non-leaf,all}
The Linux kernel objtool diagnostic `call without frame pointer save/setup`
arise in multiple instrumentation passes (asan/tsan/gcov). With the mechanism
introduced in D100251, it's trivial to respect the command line
-m[no-]omit-leaf-frame-pointer/-f[no-]omit-frame-pointer, so let's do it.

Fix: https://github.com/ClangBuiltLinux/linux/issues/1236 (tsan)
Fix: https://github.com/ClangBuiltLinux/linux/issues/1238 (asan)

Also document the function attribute "frame-pointer" which is long overdue.

Differential Revision: https://reviews.llvm.org/D101016
2021-04-22 18:07:30 -07:00
Keith Smiley
82ce0102d8 llvm-objdump: add --rpaths to macho support
This prints the rpaths for the given binary

Reviewed By: kastiglione

Differential Revision: https://reviews.llvm.org/D100681
2021-04-22 16:01:10 -07:00
Evgeniy Brevnov
d5e146fe48 Wordsmith the semantics of invariant.load
Don't phrase the semantics in terms of the optimizer.  Instead have a
more straightforward execution based semantic.

Reviewed By: ebrevnov

Differential Revision: https://reviews.llvm.org/D63439
2021-04-22 10:06:13 +07:00
Christian Kühnel
a6b448f809 [NFC] fixed link in documentation 2021-04-21 10:17:03 +02:00
Christian Kühnel
271e47c106 added section on CI system
Add documentation for working with the CI systems.

This is based on the discussion in the Infrastructure Working Group:
https://github.com/ChristianKuehnel/iwg-workspace/issues/37

Differential Revision: https://reviews.llvm.org/D97389
2021-04-21 09:59:41 +02:00
David Sherwood
1ea67899d6 [Docs] Fix formatting issue for llvm.experimental.stepvector in LangRef
The llvm.experimental.stepvector section was missing the '^^^' line
underneath the intrinsic name.
2021-04-21 08:42:40 +01:00
Nico Weber
74a701ab05 [llvm-objdump] Add an llvm-otool tool
This implements an LLVM tool that's flag- and output-compatible
with macOS's `otool` -- except for bugs, but from testing with both
`otool` and `xcrun otool-classic`, llvm-otool matches vanilla
otool's behavior very well already. It's not 100% perfect, but
it's a very solid start.

This uses the same approach as llvm-objcopy: llvm-objdump uses
a different OptTable when it's invoked as llvm-otool. This
is possible thanks to D100433.

Differential Revision: https://reviews.llvm.org/D100583
2021-04-20 08:24:58 -04:00
Luo, Yuanke
c35d11aa02 [X86][AMX] Add description of x86_amx to LangRef.
Differential Revision: https://reviews.llvm.org/D100032
2021-04-20 14:29:17 +08:00
xgupta
e9c576eeca [Docs] Mention LLVM_EXPERIMENTAL_TARGETS_TO_BUILD variable in CMake.rst
Beginners might not aware of this variable and wanted to try a new experimental target.

Although this variable mention in Writing a Backend Documentation. But it becomes easy to search when listed in cmake.rst doc where most variables are listed.

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D100729
2021-04-20 09:27:57 +05:30
Paul C. Anagnostopoulos
0d02a45ced [TableGen] Add support for the 'assert' statement in multiclasses
This is step 3 of adding the 'assert' statement.

Differential Revision: https://reviews.llvm.org/D99751
2021-04-19 09:01:42 -04:00
xgupta
79c9c7433b [Docs] Correct Boehm collector weblink in GarbageCollection.rst 2021-04-18 17:30:17 +05:30
Philip Reames
d5252f4ce6 [nofree] Restrict semantics to memory visible to caller
This patch clarifies the semantics of the nofree function attribute to make clear that it provides an "as if" semantic. That is, a nofree function is guaranteed not to free memory which existed before the call, but might allocate and then deallocate that same memory within the lifetime of the callee.

This is the result of the discussion on llvm-dev under the thread "Ambiguity in the nofree function attribute".

The most important part of this change is the LangRef wording. The rest is minor comment changes to emphasize the new semantics where code was accidentally consistent, and fix one place which wasn't consistent. That one place is currently narrowly used as it is primarily part of the ongoing (and not yet enabled) deref-at-point semantics work.

Differential Revision: https://reviews.llvm.org/D100141
2021-04-16 11:38:55 -07:00
Kristof Beyls
734cc1c60a [docs] Add Pointer Authentication call info 2021-04-16 15:18:21 +02:00
Simon Moll
d32b153555 [docs] Add vector predication call
Add the syncup call to the table

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D100474
2021-04-16 10:49:34 +02:00
Juneyoung Lee
bc62ce57fa [LangRef] formatting 2021-04-16 10:41:30 +09:00
Juneyoung Lee
2f6006376d [LangRef] fix unexepcted unindent errror 2021-04-16 09:58:55 +09:00
Juneyoung Lee
4fba55a0b5 [LangRef] clarify the semantics of nocapture
This patch clarifies the semantics of nocapture attribute.

A 'Pointer Capture' subsection is added to describe the semantics of pointer capture first.

For the nocapture example with two same pointer arguments, it is consistent with the semantics that Alive2 used to run lit tests.

Reviewed By: nlopes

Differential Revision: https://reviews.llvm.org/D97924
2021-04-16 09:48:42 +09:00
Jon Roelofs
87c0b7c256 s/setGenerator/addGenerator/ in the JIT docs. NFC 2021-04-15 15:54:28 -07:00
Momchil Velikov
d98e321d12 [clang][AArch64] Correctly align HFA arguments when passed on the stack
When we pass a AArch64 Homogeneous Floating-Point
Aggregate (HFA) argument with increased alignment
requirements, for example

    struct S {
      __attribute__ ((__aligned__(16))) double v[4];
    };

Clang uses `[4 x double]` for the parameter, which is passed
on the stack at alignment 8, whereas it should be at
alignment 16, following Rule C.4 in
AAPCS (https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#642parameter-passing-rules)

Currently we don't have a way to express in LLVM IR the
alignment requirements of the function arguments. The align
attribute is applicable to pointers only, and only for some
special ways of passing arguments (e..g byval). When
implementing AAPCS32/AAPCS64, clang resorts to dubious hacks
of coercing to types, which naturally have the needed
alignment. We don't have enough types to cover all the
cases, though.

This patch introduces a new use of the stackalign attribute
to control stack slot alignment, when and if an argument is
passed in memory.

The attribute align is left as an optimizer hint - it still
applies to pointer types only and pertains to the content of
the pointer, whereas the alignment of the pointer itself is
determined by the stackalign attribute.

For byval arguments, the stackalign attribute assumes the
role, previously perfomed by align, falling back to align if
stackalign` is absent.

On the clang side, when passing arguments using the "direct"
style (cf. `ABIArgInfo::Kind`), now we can optionally
specify an alignment, which is emitted as the new
`stackalign` attribute.

Patch by Momchil Velikov and Lucas Prates.

Differential Revision: https://reviews.llvm.org/D98794
2021-04-15 22:58:14 +01:00
Paul C. Anagnostopoulos
b1e2c33e83 [TableGen] [docs] Correct a reference in the TableGen Overview document
Differential Revision: https://reviews.llvm.org/D100382
2021-04-15 09:25:09 -04:00
Kostya Kortchinsky
6d9d112a9c [docs][scudo] Update Scudo documentation
Update the Scudo document to align with the standalone version.
Add some more verbiage about the various component of the
allocator, rework a bit everything.
The build instructions have been updated.
The options and their default values have been updated, and
the `mallopt` ones have been added.

Differential Revision: https://reviews.llvm.org/D100230
2021-04-13 08:41:56 -07:00
Gulfem Savrun Yeniceri
c650eac142 [Passes] Add relative lookup table converter pass
Lookup tables generate non PIC-friendly code, which requires dynamic relocation as described in:
https://bugs.llvm.org/show_bug.cgi?id=45244

This patch adds a new pass that converts lookup tables to relative lookup tables to make them PIC-friendly.

Differential Revision: https://reviews.llvm.org/D94355
2021-04-13 01:29:41 +00:00
Kristof Beyls
d157c20ece [docs] Add Windows/COFF call info 2021-04-12 17:11:25 +02:00
Sushma Unnibhavi
86f9f72f44 Typo fix
Reviewed By: dsanders

Differential Revision: https://reviews.llvm.org/D100254
2021-04-11 12:24:27 +05:30
Sushma Unnibhavi
2e031186a6 Missing syntax highlighting for LLVM IR in Langref
Added syntax highlighting

Differential Revision: https://reviews.llvm.org/D100125
2021-04-11 12:19:58 +05:30
Paul C. Anagnostopoulos
2a3388364d [TableGen] [docs] Change title of tblgen.rst to fix man page filename 2021-04-09 09:37:56 -04:00
Konstantin Zhuravlyov
ec8823f099 AMDGPU: Add gfx90c support to code object v2 for backwards compatibility
Differential Revision: https://reviews.llvm.org/D100126
2021-04-08 16:42:43 -04:00
Paul C. Anagnostopoulos
16f0e00ff4 Revert "[TableGen] Add support for the 'assert' statement in multiclasses"
This reverts commit 3b9a15d910a8c748b1444333a4a3905a996528bc.
2021-04-08 13:58:58 -04:00
Paul C. Anagnostopoulos
282eb5170a [TableGen] Add support for the 'assert' statement in multiclasses 2021-04-08 08:36:03 -04:00
Philip Reames
b81ddb9786 [docs] Document our norms around reverts
This has come up a few times recently, and I was surprised to notice that we don't have anything in the docs.

This patch deliberately sticks to stuff that is uncontroversial in the community. Everything herein is thought to be widely agreed to by a large majority of the community.  A few things were noted and removed in review which failed this standard, if you spot anything else, please point it out.

Differential Revision: https://reviews.llvm.org/D99305
2021-04-07 21:02:19 -07:00
Tony Tye
2ebd0d6fb1 [NFC][AMDGPU] Correct indentation in AMDGPUUsage.rst
Correct indentation that results in rST syntax error.
2021-04-08 01:00:13 +00:00
Tony Tye
36036d99fe [AMDGPU] Update gfx90a memory model support
Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D100070
2021-04-07 22:17:58 +00:00
Paul C. Anagnostopoulos
8c9238aaa1 [TableGen] [docs] Correct a couple of mistakes; use 'true' and 'false' in examples
Differential Revision: https://reviews.llvm.org/D99800
2021-04-05 09:15:58 -04:00
Nikita Popov
5794a3620e [FastISel] Remove kill tracking
This is a followup to D98145: As far as I know, tracking of kill
flags in FastISel is just a compile-time optimization. However,
I'm not actually seeing any compile-time regression when removing
the tracking. This probably used to be more important in the past,
before FastRA was switched to allocate instructions in reverse
order, which means that it discovers kills as a matter of course.

As such, the kill tracking doesn't really seem to serve a purpose
anymore, and just adds additional complexity and potential for
errors. This patch removes it entirely. The primary changes are
dropping the hasTrivialKill() method and removing the kill
arguments from the emitFast methods. The rest is mechanical fixup.

Differential Revision: https://reviews.llvm.org/D98294
2021-04-03 15:50:13 +02:00
Paul C. Anagnostopoulos
f346298b33 [TableGen] [Docs] Add lldb-tblgen to command guide; add 4 guide stubs
Differential Revision: https://reviews.llvm.org/D99605
2021-04-02 09:52:16 -04:00
Tony
99c3eaf30c [NFC][AMDGPU] Add product names for gfx908 and gfx10 processors
Reviewed By: msearles

Differential Revision: https://reviews.llvm.org/D99781
2021-04-02 00:58:11 +00:00
Jon Roelofs
abd11b2935 [docs] Fix up dead clang-format links after monorepo move. NFC 2021-03-30 14:29:35 -07:00
oToToT
2752ef7d4d [Docs] Update googletest docs link.
The documentation link of Google Test on GitHub have been moved to the
top-level docs directory.
Thus, the original link is invalid now.

Reviewed By: Pavel Labath

Differential Revision: https://reviews.llvm.org/D99559
2021-03-30 23:20:23 +08:00
Krasimir Georgiev
72bca5f483 Revert "[Passes] Add relative lookup table converter pass"
This reverts commit 5178ffc7cf92527557ae16e86d0fa90d538c2a19.

Compiling `llvm-profdata` with a compiler build from this produces a
crashing binary.
2021-03-30 14:13:37 +02:00
Nuno Lopes
695aa28456 [docs] remove references to checking out svn repos 2021-03-30 10:00:31 +01:00
Tim Renouf
2d9a94e442 [AMDGPU] Update AMDGPU PAL usage documentation
Change-Id: I65f3edcfe5063551cad5aab0da1374c3a6ccd3a2
2021-03-30 08:33:18 +01:00
Gulfem Savrun Yeniceri
abf79b4a39 [Passes] Add relative lookup table converter pass
Lookup tables generate non PIC-friendly code, which requires dynamic relocation as described in:
https://bugs.llvm.org/show_bug.cgi?id=45244

This patch adds a new pass that converts lookup tables to relative lookup tables to make them PIC-friendly.

Differential Revision: https://reviews.llvm.org/D94355
2021-03-29 21:53:32 +00:00
Paul C. Anagnostopoulos
128e39dc70 [TableGen] Add support for the 'assert' statement in class definitions.
Differential Revision: https://reviews.llvm.org/D99275
2021-03-29 09:20:29 -04:00
Matt Arsenault
efe6c99b52 Reapply "OpaquePtr: Turn inalloca into a type attribute"
This reverts commit 07e46367baeca96d84b03fa215b41775f69d5989.
2021-03-29 08:55:30 -04:00
Oliver Stannard
0914bea32c Revert "Reapply "OpaquePtr: Turn inalloca into a type attribute""
Reverting because test 'Bindings/Go/go.test' is failing on most
buildbots.

This reverts commit fc9df309917e57de704f3ce4372138a8d4a23d7a.
2021-03-29 11:32:22 +01:00
Matt Arsenault
403cadc380 Reapply "OpaquePtr: Turn inalloca into a type attribute"
This reverts commit 20d5c42e0ef5d252b434bcb610b04f1cb79fe771.
2021-03-28 13:35:21 -04:00
Nico Weber
755e1b95c9 Revert "OpaquePtr: Turn inalloca into a type attribute"
This reverts commit 4fefed65637ec46c8c2edad6b07b5569ac61e9e5.
Broke check-clang everywhere.
2021-03-28 13:02:52 -04:00
Zakk Chen
56db174a0b [RISCV][Clang] Update new overloading rules for RVV intrinsics.
RVV intrinsics has new overloading rule, please see
82aac7dad4

Changed:
1. Rename `generic` to `overloaded` because the new rule is not using C11 generic.
2. Change HasGeneric to HasNoMaskedOverloaded because all masked operations
   support overloading api.
3. Add more overloaded tests due to overloading rule changed.

Differential Revision: https://reviews.llvm.org/D99189
2021-03-28 09:04:35 -07:00
Matt Arsenault
9b63996812 OpaquePtr: Turn inalloca into a type attribute
I think byval/sret and the others are close to being able to rip out
the code to support the missing type case. A lot of this code is
shared with inalloca, so catch this up to the others so that can
happen.
2021-03-28 11:12:23 -04:00
George Burgess IV
f2c39381e1 docs: Adding Google representative to the security group
This adds me as a Google representative for the LLVM security group.

This was proposed, discussed, and voted on in the differential revision
linked below; please see it for more information.

Differential Revision: https://reviews.llvm.org/D99232
2021-03-26 18:55:37 -07:00
Tony
382c4642c9 [NFC][AMDGPU] Corrections to AMD GPU initial kernel launch documentation
Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D99223
2021-03-26 02:05:45 +00:00
Amara Emerson
61b28d4f51 [GlobalISel] Add G_ROTR and G_ROTL opcodes for rotates.
Differential Revision: https://reviews.llvm.org/D99383
2021-03-25 17:23:30 -07:00
Djordje Todorovic
29c99e8499 [Debugify] Expose original debug info preservation check as CC1 option
In order to test the preservation of the original Debug Info metadata
in your projects, a front end option could be very useful, since users
usually report that a concrete entity (e.g. variable x, or function fn2())
is missing debug info. The [0] is an example of running the utility
on GDB Project.

This depends on: D82546 and D82545.

Differential Revision: https://reviews.llvm.org/D82547
2021-03-25 05:29:42 -07:00
Gulfem Savrun Yeniceri
54e2d4cdab Revert "[Passes] Add relative lookup table converter pass"
This reverts commit 5fd001a5ffbad403053c4a06bf4b2b76dc52bba8
because it broke clang-with-thin-lto-ubuntu bot.
2021-03-24 18:59:33 +00:00
Gulfem Savrun Yeniceri
93b265f8c0 [Passes] Add relative lookup table converter pass
Lookup tables generate non PIC-friendly code, which requires dynamic relocation as described in:
https://bugs.llvm.org/show_bug.cgi?id=45244

This patch adds a new pass that converts lookup tables to relative lookup tables to make them PIC-friendly.

Differential Revision: https://reviews.llvm.org/D94355
2021-03-24 17:31:18 +00:00
Vinicius Tinti
046d087d1d [llvm-objdump] Implement --prefix-strip option
The option `--prefix-strip` is only used when `--prefix` is not empty.
It removes N initial directories from absolute paths before adding the
prefix.

This matches GNU's objdump behavior.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D96679
2021-03-24 13:22:35 +00:00
Andrew Savonichev
182b0cd903 [MCA] Disable RCU for InOrderIssueStage
This is a follow-up for:
D98604 [MCA] Ensure that writes occur in-order

When instructions are aligned by the order of writes, they retire
in-order naturally. There is no need for an RCU, so it is disabled.

Differential Revision: https://reviews.llvm.org/D98628
2021-03-24 13:54:04 +03:00
Bruno Cardoso Lopes
054affa82b [CGAtomic] Lift stronger requirements on cmpxch and support acquire failure mode
- Fix `emitAtomicCmpXchgFailureSet` to support release/acquire (succ/fail) memory order.
- Remove stronger checks for cmpxch.

Effectively, this addresses http://wg21.link/p0418

Differential Revision: https://reviews.llvm.org/D98995
2021-03-23 16:45:37 -07:00
Tony
da027401bd [NFC][AMDGPU] Reserve AMD GPU ELF machine number 0x41
Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D99196
2021-03-23 17:53:02 +00:00
Fraser Cormack
7850d98674 [LangRef] Fix typos in the vector-type memory layout section
Reviewed By: bjope

Differential Revision: https://reviews.llvm.org/D99163
2021-03-23 12:28:50 +00:00
David Sherwood
42a72164a2 [IR][SVE] Add new llvm.experimental.stepvector intrinsic
This patch adds a new llvm.experimental.stepvector intrinsic,
which takes no arguments and returns a linear integer sequence of
values of the form <0, 1, ...>. It is primarily intended for
scalable vectors, although it will work for fixed width vectors
too. It is intended that later patches will make use of this
new intrinsic when vectorising induction variables, currently only
supported for fixed width. I've added a new CreateStepVector
method to the IRBuilder, which will generate a call to this
intrinsic for scalable vectors and fall back on creating a
ConstantVector for fixed width.

For scalable vectors this intrinsic is lowered to a new ISD node
called STEP_VECTOR, which takes a single constant integer argument
as the step. During lowering this argument is set to a value of 1.
The reason for this additional argument at the codegen level is
because in future patches we will introduce various generic DAG
combines such as

  mul step_vector(1), 2 -> step_vector(2)
  add step_vector(1), step_vector(1) -> step_vector(2)
  shl step_vector(1), 1 -> step_vector(2)
  etc.

that encourage a canonical format for all targets. This hopefully
means all other targets supporting scalable vectors can benefit
from this too.

I've added cost model tests for both fixed width and scalable
vectors:

  llvm/test/Analysis/CostModel/AArch64/neon-stepvector.ll
  llvm/test/Analysis/CostModel/AArch64/sve-stepvector.ll

as well as codegen lowering tests for fixed width and scalable
vectors:

  llvm/test/CodeGen/AArch64/neon-stepvector.ll
  llvm/test/CodeGen/AArch64/sve-stepvector.ll

See this thread for discussion of the intrinsic:
https://lists.llvm.org/pipermail/llvm-dev/2021-January/147943.html
2021-03-23 10:43:35 +00:00
Tony
7be40b4abf [AMDGPU] Reserve ELF code
Reserve AMD GPU ELF machine code 0x040.

Minor AMDGPUUsage format consistency change.

Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D99122
2021-03-23 04:30:38 +00:00
Gulfem Savrun Yeniceri
61bfb34ac2 Revert "[Passes] Add relative lookup table converter pass"
This reverts commit 78a65cd945d006ff02f9d24d9cc20a302ed93b08 which
caused buildbot failures.
2021-03-23 00:43:16 +00:00
Gulfem Savrun Yeniceri
947cc1dce8 [doc] Fix typo in rel lookup table converter pass
Add additonal hypens to match the title size that was introduced in 78a65cd.
2021-03-22 23:25:06 +00:00
Gulfem Savrun Yeniceri
59cc51764b [Passes] Add relative lookup table converter pass
Lookup tables generate non PIC-friendly code, which requires dynamic relocation as described in:
https://bugs.llvm.org/show_bug.cgi?id=45244

This patch adds a new pass that converts lookup tables to relative lookup tables to make them PIC-friendly.

Differential Revision: https://reviews.llvm.org/D94355
2021-03-22 22:09:02 +00:00
Bradley Smith
839304c777 [IR] Add vscale_range IR function attribute
This attribute represents the minimum and maximum values vscale can
take. For now this attribute is not hooked up to anything during
codegen, this will be added in the future when such codegen is
considered stable.

Additionally hook up the -msve-vector-bits=<x> clang option to emit this
attribute.

Differential Revision: https://reviews.llvm.org/D98030
2021-03-22 12:05:06 +00:00
Kristof Beyls
917f15dbfc [docs] GettingInvolved: split out flang and openmp meeting series
Split out the flang and openmp meeting series, as each has a separate
canonical page where the information is maintained.
As part of that, also call out the alias analysis series separately as
it doesn't seem to be relevant for just flang.

Differential Revision: https://reviews.llvm.org/D99012
2021-03-22 09:25:57 +01:00
Jessica Paquette
ae291b6dfb [GlobalISel] Add G_SBFX + G_UBFX (bitfield extraction opcodes)
There is a bunch of similar bitfield extraction code throughout *ISelDAGToDAG.

E.g, ARMISelDAGToDAG, AArch64ISelDAGToDAG, and AMDGPUISelDAGToDAG all contain
code that matches a bitfield extract from an and + right shift.

Rather than duplicating code in the same way, this adds two opcodes:

- G_UBFX (unsigned bitfield extract)
- G_SBFX (signed bitfield extract)

They work like this

```
%x = G_UBFX %y, %lsb, %width
```

Where `lsb` and `width` are

- The least-significant bit of the extraction
- The width of the extraction

This will extract `width` bits from `%y`, starting at `lsb`. G_UBFX zero-extends
the result, while G_SBFX sign-extends the result.

This should allow us to use the combiner to match the bitfield extraction
patterns rather than duplicating pattern-matching code in each target.

Differential Revision: https://reviews.llvm.org/D98464
2021-03-19 14:37:19 -07:00
Bjorn Pettersson
13603c344c [LangRef] Describe memory layout for vectors types
There are a couple of caveats when it comes to how vectors are
stored to memory, and thereby also how bitcast between vector
and integer types work, in LLVM IR. Specially in relation to
endianess. This patch is an attempt to document such things.

Reviewed By: nlopes

Differential Revision: https://reviews.llvm.org/D94964
2021-03-19 19:00:37 +01:00
Christian Kühnel
b512b2d48c propose Chocolately as package manager
Installing the Unix tools on Windows is quite painful. To make things easier,
I explained how to use a package manager or a Docker image.

Note: This still uses the GNUWin tools as explained on this page. Once we
replace these with something else, we would also need to update the
installation commands.

Differential Revision: https://reviews.llvm.org/D97387
2021-03-19 16:15:18 +01:00
Paul C. Anagnostopoulos
f8fbe9eb04 [TableGen] Improve handling of template arguments
This requires changes to TableGen files and some C++ files due to
incompatible multiclass template arguments that slipped through
before the improved handling.
2021-03-19 09:57:53 -04:00
Jeroen Dobbelaere
13605b24cd Support intrinsic overloading on unnamed types
This patch adds support for intrinsic overloading on unnamed types.

This fixes PR38117 and PR48340 and will also be needed for the Full Restrict Patches (D68484).

The main problem is that the intrinsic overloading name mangling is using 's_s' for unnamed types.
This can result in identical intrinsic mangled names for different function prototypes.

This patch changes this by adding a '.XXXXX' to the intrinsic mangled name when at least one of the types is based on an unnamed type, ensuring that we get a unique name.

Implementation details:
- The mapping is created on demand and kept in Module.
- It also checks for existing clashes and recycles potentially existing prototypes and declarations.
- Because of extra data in Module, Intrinsic::getName needs an extra Module* argument and, for speed, an optional FunctionType* argument.
- I still kept the original two-argument 'Intrinsic::getName' around which keeps the original behavior (providing the base name).
-- Main reason is that I did not want to change the LLVMIntrinsicGetName version, as I don't know how acceptable such a change is
-- The current situation already has a limitation. So that should not get worse with this patch.
- Intrinsic::getDeclaration and the verifier are now using the new version.

Other notes:
- As far as I see, this should not suffer from stability issues. The count is only added for prototypes depending on at least one anonymous struct
- The initial count starts from 0 for each intrinsic mangled name.
- In case of name clashes, existing prototypes are remembered and reused when that makes sense.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D91250
2021-03-19 14:34:25 +01:00
Kristof Beyls
9d15a1dd6c [docs] Add calendar info for SVE sync-ups 2021-03-19 10:27:34 +01:00
Kristof Beyls
1c7cdd5117 [docs] Document regular LLVM sync-ups
This documents current regular LLVM sync-ups that are happening in the
Getting Involved section.

I hope this gives a bit more visibility to regular sync-ups that are
happening in the LLVM community, documenting another way communication
in the community happens.
Of course the downside is that this is another location that sync-up
metadata needs to be maintained. That being said, the structure as
proposed means that no changes are needed once a new sync-up is added,
apart from maybe removing the entry once it becomes clear that that
particular sync-up series is completely cancelled.

Documenting a few pointers on how current sync-ups happen may also
encourage others to organize useful sync-ups on specific topics.

I've started with adding the sync-ups I'm aware of. There's a good
chance I've missed some.

If most sync-ups end up having a public google calendar, we could also
create and maintain a public google calendar that shows all events
happening in the LLVM community, including dev meetings, sync-ups,
socials, etc - assuming that would be valuable.

Differential Revision: https://reviews.llvm.org/D98797
2021-03-18 18:32:27 +01:00
Vaivaswatha Nagaraj
062bb2a6ef [Docs] Mention linking to reviews page when committing
Differential Revision: https://reviews.llvm.org/D98695
2021-03-16 23:04:22 +05:30
Fangrui Song
d3961f8ad2 [llvm-nm] Add --format=just-symbols and make --just-symbol-name its alias
https://sourceware.org/bugzilla/show_bug.cgi?id=27487 binutils will have
--format=just-symbols/-j as well.

Arbitrarily prefer `-j` to `--format=sysv`. Previously `--format=sysv -j` prints
in the sysv format while `-j` takes precedence over other formats.

Differential Revision: https://reviews.llvm.org/D98569
2021-03-16 10:07:01 -07:00
David Zarzycki
643090aa23 [lit] Sort test start times based on prior test timing data
Lit as it exists today has three hacks that allow users to run tests earlier:

1) An entire test suite can set the `is_early` boolean.
2) A very recently introduced "early_tests" feature.
3) The `--incremental` flag forces failing tests to run first.

All of these approaches have problems.

1) The `is_early` feature was until very recently undocumented. Nevertheless it still lacks testing and is a imprecise way of optimizing test starting times.
2) The `early_tests` feature requires manual updates and doesn't scale.
3) `--incremental` is undocumented, untested, and it requires modifying the *source* file system by "touching" the file. This "touch" based approach is arguably a hack because it confuses editors (because it looks like the test was modified behind the back of the editor) and "touching" the test source file doesn't work if the test suite is read only from the perspective of `lit` (via advanced filesystem/build tricks).

This patch attempts to simplify and address all of the above problems.

This patch formalizes, documents, tests, and defaults lit to recording the execution time of tests and then reordering all tests during the next execution. By reordering the tests, high core count machines run faster, sometimes significantly so.

This patch also always runs failing tests first, which is a positive user experience win for those that didn't know about the hidden `--incremental` flag.

Finally, if users want, they can _optionally_ commit the test timing data (or a subset thereof) back to the repository to accelerate bots and first-time runs of the test suite.

Reviewed By: jhenderson, yln

Differential Revision: https://reviews.llvm.org/D98179
2021-03-16 05:23:04 -04:00
Thomas Preud'homme
0911193c17 [FileCheck] Add support for hex alternate form in FileCheck
Add printf-style alternate form flag to prefix hex number with 0x when
present. This works on both empty numeric expression (e.g. variable
definition from input) and when matching a numeric expression. The
syntax is as follows:

[[#%#<precision specifier><format specifier>, ...]

where <precision specifier> and <format specifier> are optional and ...
can be a variable definition or not with an empty expression or not.

This feature was requested in https://reviews.llvm.org/D81144#2075532
for llvm/test/MC/ELF/gen-dwarf64.s

Reviewed By: jdenny

Differential Revision: https://reviews.llvm.org/D97845
2021-03-12 18:14:17 +00:00
David Green
18fc27f084 [ARM] Improve WLS lowering
Recently we improved the lowering of low overhead loops and tail
predicated loops, but concentrated first on the DLS do style loops. This
extends those improvements over to the WLS while loops, improving the
chance of lowering them successfully. To do this the lowering has to
change a little as the instructions are terminators that produce a value
- something that needs to be treated carefully.

Lowering starts at the Hardware Loop pass, inserting a new
llvm.test.start.loop.iterations that produces both an i1 to control the
loop entry and an i32 similar to the llvm.start.loop.iterations
intrinsic added for do loops. This feeds into the loop phi, properly
gluing the values together:

  %wls = call { i32, i1 } @llvm.test.start.loop.iterations.i32(i32 %div)
  %wls0 = extractvalue { i32, i1 } %wls, 0
  %wls1 = extractvalue { i32, i1 } %wls, 1
  br i1 %wls1, label %loop.ph, label %loop.exit
...
loop:
  %lsr.iv = phi i32 [ %wls0, %loop.ph ], [ %iv.next, %loop ]
  ..
  %iv.next = call i32 @llvm.loop.decrement.reg.i32(i32 %lsr.iv, i32 1)
  %cmp = icmp ne i32 %iv.next, 0
  br i1 %cmp, label %loop, label %loop.exit

The llvm.test.start.loop.iterations need to be lowered through ISel
lowering as a pair of WLS and WLSSETUP nodes, which each get converted
to t2WhileLoopSetup and t2WhileLoopStart Pseudos. This helps prevent
t2WhileLoopStart from being a terminator that produces a value,
something difficult to control at that stage in the pipeline. Instead
the t2WhileLoopSetup produces the value of LR (essentially acting as a
lr = subs rn, 0), t2WhileLoopStart consumes that lr value (the Bcc).

These are then converted into a single t2WhileLoopStartLR at the same
point as t2DoLoopStartTP and t2LoopEndDec. Otherwise we revert the loop
to prevent them from progressing further in the pipeline. The
t2WhileLoopStartLR is a single instruction that takes a GPR and produces
LR, similar to the WLS instruction.

  %1:gprlr = t2WhileLoopStartLR %0:rgpr, %bb.3
  t2B %bb.1
...
bb.2.loop:
  %2:gprlr = PHI %1:gprlr, %bb.1, %3:gprlr, %bb.2
  ...
  %3:gprlr = t2LoopEndDec %2:gprlr, %bb.2
  t2B %bb.3

The t2WhileLoopStartLR can then be treated similar to the other low
overhead loop pseudos, eventually being lowered to a WLS providing the
branches are within range.

Differential Revision: https://reviews.llvm.org/D97729
2021-03-11 17:56:19 +00:00