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18418 Commits

Author SHA1 Message Date
Owen Anderson
c07f29d206 Use ETForest instead of DominatorTree. 
llvm-svn: 36249
 2007-04-18 04:55:33 +00:00
Owen Anderson
d8bb3aca7b Use new ETForest accessor. 
llvm-svn: 36248
 2007-04-18 04:46:35 +00:00
Owen Anderson
909895b564 Use ETForest instead of DominatorTree. 
llvm-svn: 36247
 2007-04-18 04:39:32 +00:00
Chris Lattner
ea3c945817 allow SRL to simplify its operands, as it doesn't demand all bits as input. 
llvm-svn: 36245
 2007-04-18 03:06:49 +00:00
Chris Lattner
4ce8602d58 When replacing a node in SimplifyDemandedBits, if the old node used any 
single-use nodes, they will be dead soon.  Make sure to remove them before
processing other nodes.  This implements CodeGen/X86/shl_elim.ll

llvm-svn: 36244
 2007-04-18 03:05:22 +00:00
Chris Lattner
639f807048 fix a pasto 
llvm-svn: 36242
 2007-04-18 03:01:40 +00:00
Evan Cheng
1325999a14 Don't populate TryAgainList when coalescing only physical registers with virtual registers. 
llvm-svn: 36240
 2007-04-18 02:30:19 +00:00
Devang Patel
ffbee86b8e Cache DT[*SI] lookup. 
llvm-svn: 36239
 2007-04-18 01:19:55 +00:00
Chris Lattner
0ee78670b8 don't access argument list of prototypes 
llvm-svn: 36238
 2007-04-18 00:57:22 +00:00
Devang Patel
daba9f7064 Fix 
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070416/047971.html

llvm-svn: 36236
 2007-04-18 00:53:01 +00:00
Evan Cheng
eecfac47a8 Increment use count of new virtuals created during PHI elimination. 
llvm-svn: 36233
 2007-04-18 00:36:11 +00:00
Chris Lattner
af290edea7 Be more careful when inserting reused instructions. This fixes CodeGen/Generic/2007-04-17-lsr-crash.ll 
llvm-svn: 36231
 2007-04-17 23:43:50 +00:00
Evan Cheng
fe5856c4f3 Oops. Didn't mean to check in a quick hack. 
llvm-svn: 36227
 2007-04-17 23:33:39 +00:00
Chris Lattner
1677782ef0 Fix a bug in my previous patch, grabbing the shift amount width from the 
wrong operand.

llvm-svn: 36223
 2007-04-17 22:53:02 +00:00
Chris Lattner
87296c2580 dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll 
llvm-svn: 36222
 2007-04-17 22:39:58 +00:00
Chris Lattner
b55496c660 Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. 
This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        srwi r2, r3, 1
        extsh r3, r2
        blr

on PPC, instead of:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

GCC produces:
_baz:
        srwi r10,r4,24
        insrwi r10,r3,24,0
        srawi r9,r3,24
        srawi r3,r10,9
        extsh r3,r3
        blr

This implements CodeGen/PowerPC/shl_elim.ll

llvm-svn: 36221
 2007-04-17 21:14:16 +00:00
Evan Cheng
48352d7a71 Copy coalescing change to prevent a physical register from being pin to a 
long live interval that has low usage density.
1. Change order of coalescing to join physical registers with virtual
   registers first before virtual register intervals become too long.
2. Check size and usage density to determine if it's worthwhile to join.
3. If joining is aborted, assign virtual register live interval allocation
   preference field to the physical register.
4. Register allocator should try to allocate to the preferred register
   first (if available) to create identify moves that can be eliminated.

llvm-svn: 36218
 2007-04-17 20:32:26 +00:00
Evan Cheng
c5d2df366a Add a register allocation preference field; add a method to compute size of a live interval. 
llvm-svn: 36216
 2007-04-17 20:25:11 +00:00
Evan Cheng
023342b277 Change getAllocatableSet() so it returns allocatable registers for a specific register class. 
llvm-svn: 36215
 2007-04-17 20:23:34 +00:00
Evan Cheng
94e0223e55 Keep track of number of uses within the function per virtual register. 
llvm-svn: 36214
 2007-04-17 20:22:11 +00:00
Anton Korobeynikov
60de2ce283 Add comment 
llvm-svn: 36213
 2007-04-17 19:34:00 +00:00
Chris Lattner
9ad682ad80 SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits 
a chance to hack on it.  This compiles:

int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

instead of:

_baz:
        srwi r2, r4, 24
        rlwimi r2, r3, 8, 0, 23
        srwi r2, r2, 9
        extsh r3, r2
        blr

This implements CodeGen/PowerPC/sign_ext_inreg1.ll

llvm-svn: 36212
 2007-04-17 19:03:21 +00:00
Dan Gohman
a7e1f3c85b Spell doFinalization right, so that it is a proper virtual override and 
gets called.

llvm-svn: 36208
 2007-04-17 18:21:36 +00:00
Chris Lattner
8e28e7654d remove use of BasicBlock::getNext 
llvm-svn: 36205
 2007-04-17 18:09:47 +00:00
Chris Lattner
af5c203dbd add a note 
llvm-svn: 36203
 2007-04-17 18:03:00 +00:00
Chris Lattner
d503b61318 remove use of BasicBlock::getNext 
llvm-svn: 36202
 2007-04-17 17:54:12 +00:00
Chris Lattner
e4323f863a Remove use of Instruction::getNext 
llvm-svn: 36201
 2007-04-17 17:52:45 +00:00
Chris Lattner
e5d747e0be eliminate use of Instruction::getNext() 
llvm-svn: 36200
 2007-04-17 17:51:03 +00:00
Chris Lattner
7b6a5d7956 remove use of Instruction::getNext 
llvm-svn: 36199
 2007-04-17 17:47:54 +00:00
Chris Lattner
058a0c6977 eliminate use of Instruction::getPrev(). Patch by Gabor Greif in 2005. 
llvm-svn: 36198
 2007-04-17 17:38:28 +00:00
Chris Lattner
09139c7951 eliminate a use of Instruction::getPrev(), patch by Gabor Greif in 2005. 
llvm-svn: 36197
 2007-04-17 17:36:12 +00:00
Chris Lattner
c7109ece27 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file 
it is defined in.

llvm-svn: 36196
 2007-04-17 17:21:52 +00:00
Anton Korobeynikov
9bc4b792bf Implemented correct stack probing on mingw/cygwin for dynamic alloca's. 
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
 2007-04-17 09:20:00 +00:00
Chris Lattner
db7de8e497 merge several fields in GlobalValue to use the same word, move CallingConv 
field into SubclassData in Value.  This shrinks GlobalVAlue from 48->40
bytes, Function from 88->76, and GlobalVariable from 76->68.  This trims
4640 bytes off my testcase, reading a bc file without materializing any
functions.

llvm-svn: 36192
 2007-04-17 04:31:29 +00:00
Andrew Lenharth
c894d4e3ce Use this nifty Constraints thing and fix the inverted conditional moves 
llvm-svn: 36191
 2007-04-17 04:07:59 +00:00
Chris Lattner
cc56e116fe The (negative) offset from a SymbolTableListTraits-using ilist to its container 
object is always constant.  As such, evaluate it at compile time instead of storing
it as an ivar in SymbolTableListTraits.  This shrinks every SymbolTableListTraits
ilist by a word, shrinking BasicBlock from 44->40 bytes, Function from 96->88 bytes,
and Module from 60->52 bytes.

llvm-svn: 36189
 2007-04-17 04:04:14 +00:00
Chris Lattner
71a21677f4 Refactor SymbolTableListTraits to only have a single pointer in it, instead 
of two.  This shrinkifies Function by 8 bytes (104->96) and Module by 8
bytes (68->60).  On a testcase of mine, this reduces the memory used to
read a module header from 565680b to 561024, a little over 4K.

llvm-svn: 36188
 2007-04-17 03:26:42 +00:00
Chris Lattner
be225f5300 SSE4 is apparently public now. 
llvm-svn: 36185
 2007-04-17 00:02:37 +00:00
Reid Spencer
67ab398ba3 Make long line fit in 80 cols. 
llvm-svn: 36183
 2007-04-16 23:32:28 +00:00
Devang Patel
7d868316fd Fix 
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070416/047888.html

llvm-svn: 36182
 2007-04-16 23:03:45 +00:00
Reid Spencer
b640dc70f9 Fix problems in the PartSet lowering having to do with incorrect bit width. 
llvm-svn: 36180
 2007-04-16 22:21:14 +00:00
Reid Spencer
226017813d Regenerate 
llvm-svn: 36179
 2007-04-16 22:02:23 +00:00
Reid Spencer
52d73dba41 Okay, yes there *is* a getKeyLength method on ValueName. And, it should be 
used because we *do* want to allow nulls in names.

llvm-svn: 36178
 2007-04-16 22:01:57 +00:00
Jeff Cohen
279c95b9a7 In the event that some really old non-Intel or -AMD CPU is encountered... 
llvm-svn: 36177
 2007-04-16 21:59:44 +00:00
Reid Spencer
d22d480758 Implement @sext and @zext parameter attribute handling properly instead of 
forcing every small argument of every function regardless of attributes or
calling convention to be expanded.

llvm-svn: 36174
 2007-04-16 21:50:40 +00:00
Jeff Cohen
e6b60c9525 Before assuming that the original code didn't work for Athlon64, the person who 
replaced it with a FIXME should have determined what did work.  Then he would have
realized that the code was in fact correct, and would have avoided breaking it.

llvm-svn: 36173
 2007-04-16 21:48:58 +00:00
Devang Patel
af0b4b4191 Proivde getAnalysis<FPAnalysis>(Func) support. 
llvm-svn: 36159
 2007-04-16 20:56:24 +00:00
Devang Patel
4bf452b5e4 Do not assert during analysis implementation initialization. 
llvm-svn: 36158
 2007-04-16 20:44:16 +00:00
Devang Patel
814d1deba8 Print and delete on the fly pass managers. 
llvm-svn: 36157
 2007-04-16 20:39:59 +00:00
Reid Spencer
162b270bd1 Regenerate. 
llvm-svn: 36156
 2007-04-16 20:35:38 +00:00
Reid Spencer
d36a46527a Check length of string before we walk off the end of it. 
Thanks, Chris.

llvm-svn: 36155
 2007-04-16 20:31:06 +00:00
Devang Patel
3b4e226a87 Update module pass manager to support module passes that require 
function passes.

llvm-svn: 36154
 2007-04-16 20:27:05 +00:00
Devang Patel
c1010840fa Give each pass manager chance to manage lower level analysis pass, which is 
pass required by one of pass managed by the manager.

llvm-svn: 36153
 2007-04-16 20:12:57 +00:00
Anton Korobeynikov
f3e62a428a Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.

llvm-svn: 36146
 2007-04-16 18:10:23 +00:00
Reid Spencer
33f8e6461a Regenerate. 
llvm-svn: 36144
 2007-04-16 17:47:06 +00:00
Reid Spencer
09e600f773 Use a more optimal way to get the name of a function. Thanks, Chris. 
llvm-svn: 36143
 2007-04-16 17:45:50 +00:00
Reid Spencer
16f6e75cf5 Don't return 0 if the len == 5, let the assert handle that case. 
Thanks, Chris.

llvm-svn: 36139
 2007-04-16 16:56:54 +00:00
Reid Spencer
969393b105 For PR1336: 
Subtarget option names must be given in lower case in order to be
recognized. Fixes test/CodeGen/Alpha/ctlz.ll

llvm-svn: 36125
 2007-04-16 14:06:19 +00:00
Reid Spencer
4b8e900991 Fix test/CodeGen/Generic/vector-constantexpr.ll 
llvm-svn: 36123
 2007-04-16 07:08:44 +00:00
Reid Spencer
67f5aa847c Regenerate. 
llvm-svn: 36122
 2007-04-16 06:56:07 +00:00
Reid Spencer
408e427abf For PR1328: 
Use the new parameter on Function::getIntrinsicID to identify cases where
a function is being called with an "llvm." name but it isn't actually an
intrinsic. In such cases generate an error.

llvm-svn: 36121
 2007-04-16 06:55:42 +00:00
Reid Spencer
f12ab5a55b For PR1328: 
Don't assert everytime an intrinsic name isn't recognized. Instead, make
the assert optional when callin getIntrinsicID(). This allows the assembler
to handle invalid intrinsic names gracefully.

llvm-svn: 36120
 2007-04-16 06:54:34 +00:00
Reid Spencer
85f055a567 Revert last patch. It was already fixed. 
llvm-svn: 36102
 2007-04-16 02:24:41 +00:00
Reid Spencer
e411fd1f10 For PR1336: 
Fix a div-by-zero bug noticed by APInt. This fixes:
test/Transforms/IndVarsSimplify/exit_value_tests.llx

llvm-svn: 36099
 2007-04-16 01:48:37 +00:00
Owen Anderson
b371956400 Tabs -> Spaces 
llvm-svn: 36094
 2007-04-15 23:14:18 +00:00
Chris Lattner
601aa5b489 Fix PR1335 and Transforms/Inline/2007-04-15-InlineEH.ll 
llvm-svn: 36090
 2007-04-15 21:38:06 +00:00
Chris Lattner
c2762b5d83 Fix a nasty bug introduced when apint'ified. This fixes 
Transforms/IndVarsSimplify/exit_value_tests.llx

llvm-svn: 36081
 2007-04-15 19:52:49 +00:00
Owen Anderson
ea857029ea Remove ImmediateDominator analysis. The same information can be obtained from DomTree. A lot of code for 
constructing ImmediateDominator is now folded into DomTree construction.

This is part of the ongoing work for PR217.

llvm-svn: 36063
 2007-04-15 08:47:27 +00:00
Chris Lattner
798749cafe fix SimplifyLibCalls/IsDigit.ll 
llvm-svn: 36047
 2007-04-15 05:38:40 +00:00
Chris Lattner
fe00dd8315 Extend store merging to support the 'if/then' version in addition to if/then/else. 
This sinks the two stores in this example into a single store in cond_next.  In this
case, it allows elimination of the load as well:

        store double 0.000000e+00, double* @s.3060
        %tmp3 = fcmp ogt double %tmp1, 5.000000e-01             ; <i1> [#uses=1]
        br i1 %tmp3, label %cond_true, label %cond_next
cond_true:              ; preds = %entry
        store double 1.000000e+00, double* @s.3060
        br label %cond_next
cond_next:              ; preds = %entry, %cond_true
        %tmp6 = load double* @s.3060            ; <double> [#uses=1]

This implements Transforms/InstCombine/store-merge.ll:test2

llvm-svn: 36040
 2007-04-15 01:02:18 +00:00
Chris Lattner
ecd0fda993 refactor some code, no functionality change. 
llvm-svn: 36037
 2007-04-15 00:07:55 +00:00
Owen Anderson
1d837200f2 Fix some unsafe code. Also, tabs -> spaces. 
llvm-svn: 36035
 2007-04-14 23:57:00 +00:00
Owen Anderson
41582c8198 Make ETForest depend on DomTree rather than IDom. This is the first step 
in the long process that will be fixing PR 217.

llvm-svn: 36034
 2007-04-14 23:49:24 +00:00
Chris Lattner
022c2bc0c3 fix long lines 
llvm-svn: 36031
 2007-04-14 23:32:02 +00:00
Chris Lattner
6fbfbf6622 add a note 
llvm-svn: 36028
 2007-04-14 23:06:09 +00:00
Chris Lattner
9764a3cf09 Implement Transforms/InstCombine/vec_extract_elt.ll, transforming: 
define i32 @test(float %f) {
        %tmp7 = insertelement <4 x float> undef, float %f, i32 0
        %tmp17 = bitcast <4 x float> %tmp7 to <4 x i32>
        %tmp19 = extractelement <4 x i32> %tmp17, i32 0
        ret i32 %tmp19
}

into:

define i32 @test(float %f) {
        %tmp19 = bitcast float %f to i32                ; <i32> [#uses=1]
        ret i32 %tmp19
}

On PPC, this is the difference between:

_test:
        mfspr r2, 256
        oris r3, r2, 8192
        mtspr 256, r3
        stfs f1, -16(r1)
        addi r3, r1, -16
        addi r4, r1, -32
        lvx v2, 0, r3
        stvx v2, 0, r4
        lwz r3, -32(r1)
        mtspr 256, r2
        blr

and:

_test:
        stfs f1, -4(r1)
        nop
        nop
        nop
        lwz r3, -4(r1)
        blr

llvm-svn: 36025
 2007-04-14 23:02:14 +00:00
Chris Lattner
3553a131d0 Implement InstCombine/vec_demanded_elts.ll:test2. This allows us to turn 
unsigned test(float f) {
 return _mm_cvtsi128_si32( (__m128i) _mm_set_ss( f*f ));
}

into:

_test:
        movss 4(%esp), %xmm0
        mulss %xmm0, %xmm0
        movd %xmm0, %eax
        ret

instead of:

_test:
        movss 4(%esp), %xmm0
        mulss %xmm0, %xmm0
        xorps %xmm1, %xmm1
        movss %xmm0, %xmm1
        movd %xmm1, %eax
        ret

GCC gets:

_test:
        subl    $28, %esp
        movss   32(%esp), %xmm0
        mulss   %xmm0, %xmm0
        xorps   %xmm1, %xmm1
        movss   %xmm0, %xmm1
        movaps  %xmm1, %xmm0
        movd    %xmm0, 12(%esp)
        movl    12(%esp), %eax
        addl    $28, %esp
        ret

llvm-svn: 36020
 2007-04-14 22:29:23 +00:00
Chris Lattner
7928216e38 avoid copying sets and vectors around. 
llvm-svn: 36017
 2007-04-14 22:10:17 +00:00
Jeff Cohen
5a502fb622 Fix PR1329. 
llvm-svn: 36016
 2007-04-14 21:50:21 +00:00
Chris Lattner
357a11fcbb disable switch lowering using shift/and. It still breaks ppc bootstrap for 
some reason.  :(  Will investigate.

llvm-svn: 36011
 2007-04-14 19:39:41 +00:00
Chris Lattner
3cebebfdd4 avoid iterator invalidation. 
llvm-svn: 36002
 2007-04-14 18:06:52 +00:00
Jeff Cohen
6e724c5338 An even better fix. 
llvm-svn: 35998
 2007-04-14 17:18:29 +00:00
Jeff Cohen
114799eab9 Fix recent regression that broke several llvm-tests. 
llvm-svn: 35996
 2007-04-14 16:55:19 +00:00
Anton Korobeynikov
bdb4f560da Fix PR1325: Case range optimization was performed in the case it 
shouldn't. Also fix some "latent" bug on 64-bit platforms

llvm-svn: 35990
 2007-04-14 13:25:55 +00:00
Chris Lattner
6e71d21892 disable shift/and lowering to work around PR1325 for now. 
llvm-svn: 35985
 2007-04-14 02:26:56 +00:00
Chris Lattner
a283acb406 Implement a few missing xforms: printf("foo\n") -> puts. printf("x") -> putchar 
printf("") -> noop.  Still need to do the xforms for fprintf.

This implements Transforms/SimplifyLibCalls/Printf.ll

llvm-svn: 35984
 2007-04-14 01:17:48 +00:00
Chris Lattner
25f2c932b7 in addition to merging, constantmerge should also delete trivially dead globals, 
in order to clean up after simplifylibcalls.

llvm-svn: 35982
 2007-04-14 01:11:54 +00:00
Chris Lattner
6f64f54168 Implement PR1201 and test/Transforms/InstCombine/malloc-free-delete.ll 
llvm-svn: 35981
 2007-04-14 00:20:02 +00:00
Chris Lattner
b97ff21db2 use an accessor to simplify code. 
llvm-svn: 35979
 2007-04-14 00:17:39 +00:00
Chris Lattner
5ed58fc4a9 add GetElementPtrInst::hasAllZeroIndices, a long-overdue helper method. 
Writing it twice in the same day was too much for me.

llvm-svn: 35978
 2007-04-14 00:12:57 +00:00
Reid Spencer
84c2475e77 We want the number of bits needed, not the power of 2. 
llvm-svn: 35977
 2007-04-14 00:00:10 +00:00
Jeff Cohen
3ffd34cac6 Silence VC++ warning. 
llvm-svn: 35975
 2007-04-13 22:52:03 +00:00
Chris Lattner
8477dd1722 Now that codegen prepare isn't defeating me, I can finally fix what I set 
out to do! :)

This fixes a problem where LSR would insert a bunch of code into each MBB
that uses a particular subexpression (e.g. IV+base+C).  The problem is that
this code cannot be CSE'd back together if inserted into different blocks.

This patch changes LSR to attempt to insert a single copy of this code and
share it, allowing codegenprepare to duplicate the code if it can be sunk
into various addressing modes.  On CodeGen/ARM/lsr-code-insertion.ll,
for example, this gives us code like:

        add r8, r0, r5
        str r6, [r8, #+4]
..
        ble LBB1_4      @cond_next
LBB1_3: @cond_true
        str r10, [r8, #+4]
LBB1_4: @cond_next
...
LBB1_5: @cond_true55
        ldr r6, LCPI1_1
        str r6, [r8, #+4]

instead of:

        add r10, r0, r6
        str r8, [r10, #+4]
...
        ble LBB1_4      @cond_next
LBB1_3: @cond_true
        add r8, r0, r6
        str r10, [r8, #+4]
LBB1_4: @cond_next
...
LBB1_5: @cond_true55
        add r8, r0, r6
        ldr r10, LCPI1_1
        str r10, [r8, #+4]

Besides being smaller and more efficient, this makes it immediately
obvious that it is profitable to predicate LBB1_3 now :)

llvm-svn: 35972
 2007-04-13 20:42:26 +00:00
Chris Lattner
bc03b6c341 Completely rewrite addressing-mode related sinking of code. In particular, 
this fixes problems where codegenprepare would sink expressions into load/stores
that are not valid, and fixes cases where it would miss important valid ones.

This fixes several serious codesize and perf issues, particularly on targets
with complex addressing modes like arm and x86.  For example, now we compile
CodeGen/X86/isel-sink.ll to:

_test:
        movl 8(%esp), %eax
        movl 4(%esp), %ecx
        cmpl $1233, %eax
        ja LBB1_2       #F
LBB1_1: #T
        movl $4, (%ecx,%eax,4)
        movl $141, %eax
        ret
LBB1_2: #F
        movl (%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl 8(%esp), %eax
        leal (,%eax,4), %ecx
        addl 4(%esp), %ecx
        cmpl $1233, %eax
        ja LBB1_2       #F
LBB1_1: #T
        movl $4, (%ecx)
        movl $141, %eax
        ret
LBB1_2: #F
        movl (%ecx), %eax
        ret

llvm-svn: 35970
 2007-04-13 20:30:56 +00:00
Reid Spencer
6e7854339e Implement a getBitsNeeded method to determine how many bits are needed to 
represent a string in binary form by an APInt.

llvm-svn: 35968
 2007-04-13 19:19:07 +00:00
Devang Patel
d86d04983a Remove use of SlowOperationInformer. 
llvm-svn: 35967
 2007-04-13 18:58:18 +00:00
Devang Patel
d01bb17f76 Undo previous check-in. 
llvm-svn: 35966
 2007-04-13 18:35:15 +00:00
Devang Patel
bfd8480bad Hello uses LLVMSupport.a (SlowerOperationInformer) 
llvm-svn: 35965
 2007-04-13 18:28:23 +00:00
Anton Korobeynikov
5bb6590218 Fix PR1323 : we haven't updated phi nodes in good manner :) 
llvm-svn: 35963
 2007-04-13 06:53:51 +00:00
Chris Lattner
e7cab7b7a4 arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes. 
llvm-svn: 35962
 2007-04-13 06:50:55 +00:00