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44255 Commits

Author SHA1 Message Date
Rafael Espindola
7f9be9e112 Remove the MCObjectFormat class. 
llvm-svn: 122147
 2010-12-18 05:37:28 +00:00
Rafael Espindola
0b15443dd3 Add a FIXME and explain a hack. 
llvm-svn: 122144
 2010-12-18 04:19:20 +00:00
Michael J. Spencer
1bbb8752a8 Fix whitespace. 
llvm-svn: 122142
 2010-12-18 04:13:46 +00:00
Michael J. Spencer
6d64a36ced Support/PathV1: Deprecate get{Basename,Dirname,Suffix}. 
llvm-svn: 122141
 2010-12-18 04:13:36 +00:00
Rafael Espindola
b8369170e9 Fix the note. 
llvm-svn: 122139
 2010-12-18 04:01:45 +00:00
Rafael Espindola
f3aeaaa3f4 Revert 122011, 122012, 122013, 122023 adding back an important optimization. 
I added a note, but suggestions on how to add a test are really welcome.

llvm-svn: 122138
 2010-12-18 03:57:21 +00:00
Jakob Stoklund Olesen
bdf06d6c7b Apparently, operandices is not a word. 
llvm-svn: 122135
 2010-12-18 03:28:32 +00:00
Rafael Espindola
9a4bfd7755 Move some data to the TargetWriter. 
llvm-svn: 122134
 2010-12-18 03:27:34 +00:00
Jakob Stoklund Olesen
e06ded7533 Teach the inline spiller to attempt folding a load instruction into its single 
use before rematerializing the load.

This allows us to produce:

    addps	LCPI0_1(%rip), %xmm2

Instead of:

    movaps	LCPI0_1(%rip), %xmm3
    addps	%xmm3, %xmm2

Saving a register and an instruction. The standard spiller already knows how to
do this.

llvm-svn: 122133
 2010-12-18 03:04:14 +00:00
Jakob Stoklund Olesen
485b7965b3 Tweak debug spew. 
llvm-svn: 122132
 2010-12-18 03:04:11 +00:00
Bill Wendling
9b2ef1c9be r120333 changed the opcode for the Thumb1 stuff from ARM::tMOVr to 
ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting
misaligned references to the jump table from an ADR instruction.

There is a test case, but unfortunately it's sensitive to random code changes.

<rdar://problem/8782223>

llvm-svn: 122131
 2010-12-18 02:13:59 +00:00
Bill Wendling
2dde4e38c9 RemoveUnusedCPEntries can change things. Track it. 
llvm-svn: 122129
 2010-12-18 01:53:06 +00:00
Jakob Stoklund Olesen
a2f2eab8d4 Check that the register is live-in to the loop header before inserting copies in 
the loop predecessors.

The register can be live-out from a predecessor without being live-in to the
loop header if there is a critical edge from the predecessor.

llvm-svn: 122123
 2010-12-18 01:06:19 +00:00
Nick Lewycky
30eef45106 Fix GCC warning: 
lib/CodeGen/RegAllocGreedy.cpp:311: error: unused variable 'PhysReg' [-Wunused-variable]

llvm-svn: 122122
 2010-12-18 01:05:55 +00:00
Rafael Espindola
ba05bec626 Relax push instructions. 
llvm-svn: 122121
 2010-12-18 01:01:34 +00:00
Nick Lewycky
44a08d5812 Make LazyValueInfo non-recursive. 
llvm-svn: 122120
 2010-12-18 01:00:40 +00:00
Bob Wilson
5f9e78fe20 Rearrange some Neon multiclasses. No functional changes. 
llvm-svn: 122119
 2010-12-18 00:42:58 +00:00
Michael J. Spencer
bb238417bb Support/PathV1: Deprecate getLast. 
llvm-svn: 122116
 2010-12-18 00:19:10 +00:00
Owen Anderson
702d715185 Add support to CallbackVH to receive notification when a Value's use-list changes. 
llvm-svn: 122114
 2010-12-18 00:07:15 +00:00
Jakob Stoklund Olesen
2879da5e13 Pass a Banner argument to the machine code verifier both from 
createMachineVerifierPass and MachineFunction::verify.

The banner is printed before the machine code dump, just like the printer pass.

llvm-svn: 122113
 2010-12-18 00:06:56 +00:00
Bob Wilson
776d3f73eb Fix result type of Neon floating-point comparisons against zero. 
The result vector elements are always integers.  Radar 8782191.

llvm-svn: 122112
 2010-12-18 00:04:33 +00:00
Bob Wilson
c000db3584 Add some missing entries in ARMTargetLowering::getTargetNodeName. 
llvm-svn: 122111
 2010-12-18 00:04:26 +00:00
Bill Wendling
b1f6875ae3 Whitespace fixes. No functionality change. 
llvm-svn: 122110
 2010-12-17 23:27:41 +00:00
Jakob Stoklund Olesen
6498db2c8c Avoid dereferencing end() in collectInterferingVRegs() when there is no 
interference.

llvm-svn: 122108
 2010-12-17 23:16:38 +00:00
Jakob Stoklund Olesen
db4b62f32e Make the -verify-regalloc command line option available to base classes as 
RegAllocBase::VerifyEnabled.

Run the machine code verifier in a few interesting places during RegAllocGreedy.

llvm-svn: 122107
 2010-12-17 23:16:35 +00:00
Jakob Stoklund Olesen
df9e162423 Enable loop splitting in RegAllocGreedy. 
The heuristics split around the largest loop where the current register may be
allocated without interference.

llvm-svn: 122106
 2010-12-17 23:16:32 +00:00
Nate Begeman
063d88d6fb Add vector versions of some existing scalar transforms to aid codegen in matching psign & pblend operations to the IR produced by clang/gcc for their C idioms. 
llvm-svn: 122105
 2010-12-17 23:12:19 +00:00
Bill Wendling
c16f9b1ccc During local stack slot allocation, the materializeFrameBaseRegister function 
may be called. If the entry block is empty, the insertion point iterator will be
the "end()" value. Calling ->getParent() on it (among others) causes problems.

Modify materializeFrameBaseRegister to take the machine basic block and insert
the frame base register at the beginning of that block. (It's very similar to
what the code does all ready. The only difference is that it will always insert
at the beginning of the entry block instead of after a previous materialization
of the frame base register. I doubt that that matters here.)

<rdar://problem/8782198>

llvm-svn: 122104
 2010-12-17 23:09:14 +00:00
Bob Wilson
c57c2d755b Fix a DAGCombiner crash when folding binary vector operations with constant 
BUILD_VECTOR operands where the element type is not legal.  I had previously
changed this code to insert TRUNCATE operations, but that was just wrong.

llvm-svn: 122102
 2010-12-17 23:06:49 +00:00
Bob Wilson
12f2b81599 Avoid report_fatal_error in ARM's PrintAsmOperand method. 
The standard error handling in AsmPrinter::EmitInlineAsm handles this much
better, so just use it.

llvm-svn: 122100
 2010-12-17 23:06:42 +00:00
Bob Wilson
21981d44ce Remove trailing whitespace. 
llvm-svn: 122099
 2010-12-17 23:06:32 +00:00
Nate Begeman
ef5f3c0fa7 Add support for matching psign & plendvb to the x86 target 
Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts

llvm-svn: 122098
 2010-12-17 22:55:37 +00:00
Owen Anderson
900ac27338 Thumb's forced-PC-alignment requirement applies to the _total_ displacement, not just to the fragment relative 
portion.  While the fragment boundary is usually already aligned, it is possible for it not to be, which 
would lead to a non-aligned final displacement.

llvm-svn: 122091
 2010-12-17 21:49:48 +00:00
Dale Johannesen
c2c6ebd82a Add a transform to DAG Combiner. This improves the 
code for the case where 32-bit divide by constant is
turned into 64-bit multiply by constant.  8771012.

llvm-svn: 122090
 2010-12-17 21:45:49 +00:00
Michael J. Spencer
f2bf8518fb Support/Path: Deprecate PathV1::isAbsolute. 
llvm-svn: 122086
 2010-12-17 21:21:31 +00:00
Benjamin Kramer
8aca840aff PathV2: Use StringRef::substr to simplify substring creation. 
llvm-svn: 122085
 2010-12-17 20:27:37 +00:00
Jakob Stoklund Olesen
0dc90e6b1b Allow missing kill flags on an untied operand of a two-address instruction when 
the operand uses the same register as a tied operand:

  %r1 = add %r1, %r1

If add were a three-address instruction, kill flags would be required on at
least one of the uses. Since it is a two-address instruction, the tied use
operand must not have a kill flag.

This change makes the kill flag on the untied use operand optional.

llvm-svn: 122082
 2010-12-17 19:18:41 +00:00
Jim Grosbach
7ca8ed3d5d If The ARM WriteNopData() gets an unaligned byte count to pad out, fill in with 
a partial value. rdar://8782954

llvm-svn: 122078
 2010-12-17 19:03:02 +00:00
Benjamin Kramer
a7366b3f19 Missed some StringRefRefs. 
llvm-svn: 122077
 2010-12-17 18:59:09 +00:00
Jim Grosbach
9017f2d179 Add bits 31-28 to the Thumb2 encoding of TBB/TBH. 
llvm-svn: 122076
 2010-12-17 18:42:56 +00:00
Jim Grosbach
e0f65aaf8d Handle 2 and 4 byte data blob fixup values for ARM. 
llvm-svn: 122075
 2010-12-17 18:39:10 +00:00
Benjamin Kramer
89db30db3a Pass StringRefs by value, for consistency. 
llvm-svn: 122074
 2010-12-17 18:19:06 +00:00
Jakob Stoklund Olesen
f4a0c81371 Add MachineLoopRange comparators for sorting loop lists by number and by area. 
llvm-svn: 122073
 2010-12-17 18:13:52 +00:00
Owen Anderson
6acf8c9125 Reapply r121905 (automatic synthesis of @llvm.sadd.with.overflow) with a fix for a bug that manifested itself 
on the DragonEgg self-host bot.  Unfortunately, the testcase is pretty messy and doesn't reduce well due to
interactions with other parts of InstCombine.

llvm-svn: 122072
 2010-12-17 18:08:00 +00:00
Rafael Espindola
3da3498b0a Store and free the TargetObjectWriter. 
llvm-svn: 122070
 2010-12-17 18:01:31 +00:00
Rafael Espindola
b9ca29bc1c Stub out explicit MCELFObjectTargetWriter interface. 
llvm-svn: 122067
 2010-12-17 17:45:22 +00:00
Rafael Espindola
38e6fdfd1d Move createELFObjectWriter to its own header. 
llvm-svn: 122064
 2010-12-17 16:59:53 +00:00
Benjamin Kramer
39b30b18fa SimplifyCFG: Ranges can be larger than 64 bits. Fixes Release-selfhost build. 
llvm-svn: 122054
 2010-12-17 10:48:14 +00:00
Benjamin Kramer
2203fe28df Fix mismatched new[]/delete. 
llvm-svn: 122053
 2010-12-17 09:56:50 +00:00
Kalle Raiskila
68f221707a Don't feed 19 bit immediates to ILA. 
Patch (slightly modified) by Visa Putkinen.

llvm-svn: 122052
 2010-12-17 09:36:09 +00:00