Chris Lattner
49ac65543c
Change LEA to have 5 operands for its memory operand, just
...
like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.
No functionality change.
llvm-svn: 107934
2010-07-08 23:46:44 +00:00
Chris Lattner
18802e1a55
add some long-overdue enums to refer to the parts of the 5-operand
...
X86 memory operand.
llvm-svn: 107925
2010-07-08 22:41:28 +00:00
Dan Gohman
4dcc56a102
Revert 107840 107839 107813 107804 107800 107797 107791.
...
Debug info intrinsics win for now.
llvm-svn: 107850
2010-07-08 01:00:56 +00:00
Evan Cheng
22b3e8f3b1
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
...
llvm-svn: 107820
2010-07-07 22:15:37 +00:00
Dan Gohman
424cc6b616
Add X86FastISel support for return statements. This entails refactoring
...
a bunch of stuff, to allow the target-independent calling convention
logic to be employed.
llvm-svn: 107800
2010-07-07 18:32:53 +00:00
Dan Gohman
b87c534168
Simplify FastISel's constructor by giving it a FunctionLoweringInfo
...
instance, rather than pointers to all of FunctionLoweringInfo's
members.
This eliminates an NDEBUG ABI sensitivity.
llvm-svn: 107789
2010-07-07 16:29:44 +00:00
Dan Gohman
c768525273
Split the SDValue out of OutputArg so that SelectionDAG-independent
...
code can do calling-convention queries. This obviates OutputArgReg.
llvm-svn: 107786
2010-07-07 15:54:55 +00:00
Dale Johannesen
81ea05c193
Accept RIP-relative symbols with 'i' constraint, and
...
print the (%rip) only if the 'a' modifier is present.
PR 7528.
llvm-svn: 107727
2010-07-06 23:27:00 +00:00
Dan Gohman
d409104054
CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.
...
SelectBasicBlock doesn't needs its BasicBlock argument.
llvm-svn: 107712
2010-07-06 22:19:37 +00:00
Devang Patel
7ab104353b
Propagate debug loc.
...
llvm-svn: 107710
2010-07-06 22:08:15 +00:00
Dan Gohman
808f334f79
Reapply r107655 with fixes; insert the pseudo instruction into
...
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
llvm-svn: 107691
2010-07-06 20:24:04 +00:00
Dan Gohman
4d264f7e51
Revert r107655.
...
llvm-svn: 107668
2010-07-06 15:49:48 +00:00
Dan Gohman
6a73079aba
Fix a bunch of custom-inserter functions to handle the case where
...
the pseudo instruction is not at the end of the block.
llvm-svn: 107655
2010-07-06 15:18:19 +00:00
Eric Christopher
e873e9978c
Fix up -fstack-protector on linux to use the segment
...
registers. Split out testcases per architecture and os
now.
Patch from Nelson Elhage.
llvm-svn: 107640
2010-07-06 05:18:56 +00:00
Eric Christopher
f1bb5da020
Have the X86 backend use Triple instead of a string and some enums.
...
llvm-svn: 107625
2010-07-05 19:26:33 +00:00
Chris Lattner
252f82acc6
more tidying.
...
llvm-svn: 107615
2010-07-05 05:53:14 +00:00
Chris Lattner
cecaa1b061
Just rip v2f32 support completely out of the X86 backend. In
...
the example in the testcase, we now generate:
_test1: ## @test1
movss 4(%esp), %xmm0
addss 8(%esp), %xmm0
movl 12(%esp), %eax
movss %xmm0, (%eax)
ret
instead of:
_test1: ## @test1
subl $20, %esp
movl 24(%esp), %eax
movq %mm0, (%esp)
movq %mm0, 8(%esp)
movss (%esp), %xmm0
addss 12(%esp), %xmm0
movss %xmm0, (%eax)
addl $20, %esp
ret
v2f32 support did not work reliably because most of the X86
backend didn't know it was legal. It was apparently only added
to support returning source-level v2f32 values in MMX registers
in x86-32 mode. If ABI compatibility is important on this
GCC-extended-vector type for some reason, then the frontend
should generate IR that returns v2i32 instead of v2f32. However,
we generally don't try very hard to be abi compatible on gcc
extended vectors.
llvm-svn: 107601
2010-07-04 23:07:25 +00:00
Chris Lattner
b17c4f3936
fix PR7518 - terrible codegen of <2 x float>, by only marking
...
v2f32 as legal in 32-bit mode. It is just as terrible there,
but I just care about x86-64 and noone claims it is valuable
in 64-bit mode.
llvm-svn: 107600
2010-07-04 22:57:10 +00:00
Evan Cheng
47f3a2db40
Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
...
llvm-svn: 107550
2010-07-03 00:40:23 +00:00
Gabor Greif
fdaf0459be
use ArgOperand API
...
llvm-svn: 107280
2010-06-30 13:03:37 +00:00
Duncan Sands
aecd43c04e
Remove pointless and unused variables.
...
llvm-svn: 107130
2010-06-29 12:48:49 +00:00
Bill Wendling
4fe5512827
Reduce indentation via early exit. NFC.
...
llvm-svn: 107067
2010-06-28 21:08:32 +00:00
Gabor Greif
14814144af
use ArgOperand API
...
llvm-svn: 106944
2010-06-26 11:51:52 +00:00
Dale Johannesen
b1fc776fca
The hasMemory argument is irrelevant to how the argument
...
for an "i" constraint should get lowered; PR 6309. While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.
llvm-svn: 106893
2010-06-25 21:55:36 +00:00
Bill Wendling
3f9cb6828a
- Reapply r106066 now that the bzip2 build regression has been fixed.
...
- 2010-06-25-CoalescerSubRegDefDead.ll is the testcase for r106878.
llvm-svn: 106880
2010-06-25 20:48:10 +00:00
Dale Johannesen
257b602b8b
Disallow matching "i" constraint to symbol addresses when
...
address requires a register or secondary load to compute
(most PIC modes). This improves "g" constraint handling. 8015842.
The test from 2007 is attempting to test the fix for PR1761,
but since -relocation-model=static doesn't work on Darwin
x86-64, it was not testing what it was supposed to be testing
and was passing erroneously. Fixed to use Linux x86-64.
llvm-svn: 106779
2010-06-24 20:14:51 +00:00
Dan Gohman
a08a9b8a0b
Reapply r106634, now that the bug it exposed is fixed.
...
llvm-svn: 106746
2010-06-24 14:30:44 +00:00
Dan Gohman
214ba7c014
Fix a bug in the code which determines when it's safe to use the
...
bt instruction, which was exposed by r106263.
llvm-svn: 106718
2010-06-24 02:07:59 +00:00
Daniel Dunbar
be50ef88bd
Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
...
llvm-svn: 106634
2010-06-23 17:09:26 +00:00
Jim Grosbach
ef4e0249a0
The generic DAG combiner can now fold atomic fences when needed, so switch
...
to using that.
llvm-svn: 106633
2010-06-23 16:25:07 +00:00
Daniel Dunbar
e6ee7409b9
Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.
...
Conflicts:
lib/CodeGen/MachineSink.cpp
llvm-svn: 106614
2010-06-23 00:48:25 +00:00
Jim Grosbach
69e4d59ce5
fix typo
...
llvm-svn: 106574
2010-06-22 20:52:02 +00:00
Nick Lewycky
059e327790
Fix warning in no-asserts build.
...
llvm-svn: 106405
2010-06-20 20:27:42 +00:00
Dan Gohman
e9dfb84007
Change UpdateNodeOperands' operand and return value from SDValue to
...
SDNode *, since it doesn't care about the ResNo value.
llvm-svn: 106282
2010-06-18 15:30:29 +00:00
Dan Gohman
9443053ec4
Delete unused variables.
...
llvm-svn: 106280
2010-06-18 14:32:32 +00:00
Dan Gohman
0b5b93b20d
Eliminate unnecessary uses of getZExtValue().
...
llvm-svn: 106279
2010-06-18 14:22:04 +00:00
Dan Gohman
22ff84372b
isValueValidForType can be a static member function.
...
llvm-svn: 106278
2010-06-18 14:01:07 +00:00
Dan Gohman
8185674354
Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,
...
which is faster, simpler, and less surprising.
llvm-svn: 106263
2010-06-18 01:05:21 +00:00
Bill Wendling
9b8de6dcec
Create a more targeted fix for not sinking instructions into a range where it
...
will conflict with another live range. The place which creates this scenerio is
the code in X86 that lowers a select instruction by splitting the MBBs. This
eliminates the need to check from the bottom up in an MBB for live pregs.
llvm-svn: 106066
2010-06-15 23:46:31 +00:00
Eric Christopher
3d8b19a2f9
For 32-bit non-pic tlv mach-o addressing we don't need a pic base or
...
a relative address.
llvm-svn: 106064
2010-06-15 23:08:42 +00:00
Eric Christopher
5f10974e92
Ensure that mov and not lea are used to stick the address into
...
the register. While we're at it, make sure it's in the right one.
llvm-svn: 105645
2010-06-08 22:04:25 +00:00
Dale Johannesen
ae0a144c39
Fix some liveout handling related to tail calls, see comments.
...
I don't think this ever resulted in problems on x86, but it
would on ARM.
llvm-svn: 105509
2010-06-05 00:30:45 +00:00
Eric Christopher
30010cae3a
Add first pass at darwin tls compiler support.
...
llvm-svn: 105381
2010-06-03 04:07:48 +00:00
Eli Friedman
eea94d2222
Fix comment so it doesn't include comments which are irrelevant to the x86
...
backend. Add a FIXME noting what can be fixed here.
llvm-svn: 105342
2010-06-02 19:35:46 +00:00
Dan Gohman
8a72efff3e
Use comments to document non-obvious code rather than
...
mailing list archives.
llvm-svn: 105341
2010-06-02 19:13:40 +00:00
Eli Friedman
c4b5d67cdc
Don't try to custom-lower 64-bit add-with-overflow and friends on x86-32; the
...
x86 backend currently doesn't know how to handle them.
This doesn't really fix anything because LegalizeTypes doesn't know how to
handle them either. We do get a better error message, though.
llvm-svn: 105305
2010-06-02 00:27:18 +00:00
Evan Cheng
96bdf3e6f1
Fix PR7193: if sibling call address can take a register, make sure there are enough registers available by counting inreg arguments.
...
llvm-svn: 105092
2010-05-29 01:35:22 +00:00
Dale Johannesen
b54d197c10
Fix comment typos.
...
llvm-svn: 105059
2010-05-28 23:24:28 +00:00
Dale Johannesen
b5a636f86e
Mark some math lib intrinsic nodes Legal on SSE4.1.
...
No functional effect as these nodes are not generated yet.
llvm-svn: 104879
2010-05-27 20:12:41 +00:00
Dan Gohman
ba64544096
FastISel doesn't yet handle callee-pop functions.
...
To support this, move IsCalleePop from X86ISelLowering to X86Subtarget.
llvm-svn: 104866
2010-05-27 18:43:40 +00:00
Zhongxing Xu
2ae552a6c3
SRetReturnReg was set in LowerFormalArguments(). So only assert it here.
...
llvm-svn: 104691
2010-05-26 08:10:02 +00:00
Evan Cheng
241d2c434e
Implement @llvm.returnaddress. rdar://8015977.
...
llvm-svn: 104421
2010-05-22 01:47:14 +00:00
Dale Johannesen
787ace240c
Previous commit message should refer to 104308.
...
llvm-svn: 104337
2010-05-21 18:44:47 +00:00
Dale Johannesen
38109a0b04
Fix two bugs in 104348:
...
Case where MMX is disabled wasn't handled right.
MMX->MMX bitconverts are Legal.
llvm-svn: 104336
2010-05-21 18:40:15 +00:00
Dale Johannesen
d0a5fdb32f
Fix i64->f64 conversion, x86-64, -no-sse. A bit
...
tricky since there's a 3rd 64-bit type, MMX vectors.
PR 7135.
llvm-svn: 104308
2010-05-21 00:52:33 +00:00
Evan Cheng
46e08acfa5
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
...
llvm-svn: 104147
2010-05-19 20:19:50 +00:00
Dale Johannesen
cf2d4b9f91
Revert 103911; it broke a test that expects bitconvert
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<1xi64> -> i64 to work in MMX registers on hosts where -no-sse
is the default (not mine). The right thing is
to accept this and make i64->f64 conversions go through memory,
but I don't have time right now.
llvm-svn: 103914
2010-05-16 20:19:04 +00:00
Dale Johannesen
15dce10b5a
Make x86-64 64-bit bitconvert work when SSE is not available.
...
(This worked as of about 6 months ago and I didn't track down
exactly what broke it; I think this fix is appropriate.)
llvm-svn: 103911
2010-05-16 18:22:38 +00:00
Anton Korobeynikov
925a32ae37
Add support for thiscall calling convention.
...
Patch by Charles Davis and Steven Watanabe!
llvm-svn: 103902
2010-05-16 09:08:45 +00:00
Dale Johannesen
82dfdcdde7
Fix uint64->{float, double} conversion to do rounding correctly in 32-bit.
...
The implementation in LegalizeIntegerTypes to handle this as
sint64->float + appropriate power of 2 is subject to double rounding,
considered incorrect by numerics people. Use this implementation only
when it is safe. This leads to using library calls in some cases
that produced inline code before, but it's correct now.
(EVTToAPFloatSemantics belongs somewhere else, any suggestions?)
Add a correctly rounding (though not particularly fast) conversion
that uses X87 80-bit computations for x86-32.
7885399, 5901940. This shows up in gcc.c-torture/execute/ieee/rbug.c
in the gcc testsuite on some platforms.
llvm-svn: 103883
2010-05-15 18:51:12 +00:00
Bill Wendling
e346a38ed4
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
...
the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
llvm-svn: 103802
2010-05-14 21:14:32 +00:00
Dan Gohman
6517cc1dd9
Lowering of atomic instructions can result in operands being
...
used more than once. If ISel had put a kill flag on one of them,
it's not valid to transfer the kill flag to each new instance.
llvm-svn: 103799
2010-05-14 21:01:44 +00:00
Dan Gohman
fb6f4da0e0
Implement a bunch more TargetSelectionDAGInfo infrastructure.
...
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
llvm-svn: 103481
2010-05-11 17:31:57 +00:00
Dan Gohman
68f04d06c8
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
...
changes before doing phi lowering for switches.
llvm-svn: 102809
2010-05-01 00:01:06 +00:00
Dan Gohman
a78e35e7d9
Make this code less confusing. Instead of reassigning BB, just operate
...
on the original variables, so it's easier to see what is being done
to which blocks.
llvm-svn: 102759
2010-04-30 20:14:26 +00:00
Dan Gohman
c283eda8ab
Remove the -disable-16bit command-line option, which is now obsolete.
...
llvm-svn: 102730
2010-04-30 18:30:26 +00:00
Evan Cheng
9303b11e47
Another sibcall bug. If caller and callee calling conventions differ, then it's only safe to do a tail call if the results are returned in the same way.
...
llvm-svn: 102683
2010-04-30 01:12:32 +00:00
Evan Cheng
d4fe387eb8
Enable i16 to i32 promotion by default.
...
llvm-svn: 102493
2010-04-28 08:30:49 +00:00
Evan Cheng
4e5846c61e
Unbreak the build. Only form shld / shrd after legalization.
...
llvm-svn: 102488
2010-04-28 02:25:18 +00:00
Evan Cheng
b7bb090d5d
Rather than having a ton of patterns for double shift instructions, e.g. SHLD16rrCL, just perform custom dag combine to form x86 specific dag so they match to the same pattern. This also makes sure later dag combine do not cause isel to miss them (e.g. promoting i16 to i32).
...
llvm-svn: 102485
2010-04-28 01:18:01 +00:00
Stuart Hastings
0768675d1b
Tweak x86 INC/DEC generation to look for CopyToReg or SETCC. Radar 7866163.
...
llvm-svn: 102477
2010-04-28 00:35:10 +00:00
Evan Cheng
f9531c1175
SRA promotion is also not free.
...
llvm-svn: 102456
2010-04-27 19:48:31 +00:00
Evan Cheng
2be8b0e2bf
Promoting 16-bit cmp / test aren't free. Don't do it.
...
llvm-svn: 102366
2010-04-26 19:06:11 +00:00
Evan Cheng
dc0ce1eae8
- Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
...
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.
llvm-svn: 102323
2010-04-26 07:38:55 +00:00
Dale Johannesen
d27eedab6d
Stop abusing EmitInstrWithCustomInserter for target-dependent
...
form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets. Add a new hook instead.
No functional change.
llvm-svn: 102320
2010-04-25 21:33:54 +00:00
Evan Cheng
ec4cc9ce14
Avoid promoting a i16 node if it would eliminate a (store (op (load))) opportunity.
...
llvm-svn: 102237
2010-04-24 04:44:57 +00:00
Evan Cheng
9228d598ad
Fix X86ISD::CMP i16 to i32 promotion.
...
llvm-svn: 102192
2010-04-23 18:21:16 +00:00
Dan Gohman
d819e7fc95
Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
...
and into SelectionDAGBuilder and FastISel.
llvm-svn: 102123
2010-04-22 20:46:50 +00:00
Evan Cheng
da832d5c85
- It's not safe to promote rotates (at least not trivially).
...
- Some code refactoring.
llvm-svn: 102111
2010-04-22 20:19:46 +00:00
Evan Cheng
0f4671b0dd
isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.
...
llvm-svn: 101979
2010-04-21 01:47:12 +00:00
Dale Johannesen
510282d54b
Because of the EMMS problem, right now we have to support
...
user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own. This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)
llvm-svn: 101951
2010-04-20 22:34:09 +00:00
Evan Cheng
8efe9e0351
More progress on promoting i16 operations to i32 for x86. Work in progress.
...
llvm-svn: 101808
2010-04-19 19:29:22 +00:00
Dan Gohman
a0f855157e
Use const qualifiers with TargetLowering. This eliminates several
...
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
2010-04-17 15:26:15 +00:00
Dan Gohman
5c8db5ab3f
Move per-function state out of TargetLowering subclasses and into
...
MachineFunctionInfo subclasses.
llvm-svn: 101634
2010-04-17 14:41:14 +00:00
Evan Cheng
6442d111dd
More work to allow dag combiner to promote 16-bit ops to 32-bit.
...
llvm-svn: 101621
2010-04-17 06:13:15 +00:00
Eric Christopher
e78496e5f1
Revert 101465, it broke internal OpenGL testing.
...
Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.
llvm-svn: 101579
2010-04-16 23:37:20 +00:00
Dan Gohman
1119e6060b
Eliminate an unnecessary SelectionDAG dependency in getOptimalMemOpType.
...
llvm-svn: 101531
2010-04-16 20:11:05 +00:00
Gabor Greif
e7d6812008
reapply r101434
...
with a fix for self-hosting
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101465
2010-04-16 15:33:14 +00:00
Evan Cheng
d143bfe0a4
Adding support for dag combiner to promote operations for profit. This requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding.
...
x86 support is off by default. It can be enabled with -promote-16bit.
Work in progress.
llvm-svn: 101448
2010-04-16 06:14:10 +00:00
Gabor Greif
cd116e8c6a
back out r101423 and r101397, they break llvm-gcc self-host on darwin10
...
llvm-svn: 101434
2010-04-16 01:16:20 +00:00
Gabor Greif
2e18d34d80
reapply r101364, which has been backed out in r101368
...
with a fix
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101397
2010-04-15 20:51:13 +00:00
Gabor Greif
6022150477
back out r101364, as it trips the linux nightlybot on some clang C++ tests
...
llvm-svn: 101368
2010-04-15 12:46:56 +00:00
Gabor Greif
428ca23bbd
rotate CallInst operands, i.e. move callee to the back
...
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
llvm-svn: 101364
2010-04-15 10:49:53 +00:00
Dan Gohman
0e0b8cf9fd
Add const qualifiers to CodeGen's use of LLVM IR constructs.
...
llvm-svn: 101334
2010-04-15 01:51:59 +00:00
Eric Christopher
3be394d9b1
Allow lowering for palignr instructions for mmx sized vectors. Add
...
patterns to handle the lowering.
llvm-svn: 101331
2010-04-15 01:40:20 +00:00
Dan Gohman
c64d1d02a3
Factor out EH landing pad code into a separate function, and constify
...
a bunch of stuff to support it.
llvm-svn: 101273
2010-04-14 19:53:31 +00:00
Evan Cheng
3fa0b6fb03
Avoid using f64 to lower memcpy from constant string. It's cheaper to use i32 store of immediates.
...
llvm-svn: 100751
2010-04-08 07:37:57 +00:00
Chris Lattner
80b41881bc
rename llvm::llvm_report_error -> llvm::report_fatal_error
...
llvm-svn: 100709
2010-04-07 22:58:41 +00:00
John McCall
a28e38ca2f
Clean up some signedness oddities in this code noticed by clang.
...
llvm-svn: 100599
2010-04-07 01:49:15 +00:00
Chris Lattner
6f3c3f60ce
unthread MMI from FastISel
...
llvm-svn: 100416
2010-04-05 06:05:26 +00:00
Chris Lattner
1fda8b3a8b
fastisel doesn't need DwarfWriter, remove some tendricles.
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llvm-svn: 100381
2010-04-05 02:19:28 +00:00
Mon P Wang
484bbe6aa9
Reapply address space patch after fixing an issue in MemCopyOptimizer.
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Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
llvm-svn: 100304
2010-04-04 03:10:48 +00:00
Chris Lattner
58b7cca257
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
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llvm-svn: 100214
2010-04-02 20:16:16 +00:00
Evan Cheng
5d825988d0
Correctly lower memset / memcpy of undef. It should be a nop. PR6767.
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llvm-svn: 100208
2010-04-02 19:36:14 +00:00
Mon P Wang
0ccf050ca3
Revert r100191 since it breaks objc in clang
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llvm-svn: 100199
2010-04-02 18:43:02 +00:00
Mon P Wang
a01350755e
Reapply address space patch after fixing an issue in MemCopyOptimizer.
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Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
llvm-svn: 100191
2010-04-02 18:04:15 +00:00
Eric Christopher
e6ad109103
Remove FIXME - if there's a better way to do this it isn't here.
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llvm-svn: 100176
2010-04-02 04:32:37 +00:00
Chandler Carruth
db4beb9b04
Disambiguate conditional expression for newer GCCs.
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llvm-svn: 100167
2010-04-02 01:31:24 +00:00
Evan Cheng
9508456bb6
In 64-bit mode, use i64 to lower memcpy / memset instead of f64.
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llvm-svn: 100137
2010-04-01 20:27:45 +00:00
Evan Cheng
dc26010cc1
Add comments about DstAlign and SrcAlign.
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llvm-svn: 100132
2010-04-01 20:10:42 +00:00
Evan Cheng
8728924812
- Avoid using floating point stores to implement memset unless the value is zero.
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- Do not try to infer GV alignment unless its type is sized. It's not possible to infer alignment if it has opaque type.
llvm-svn: 100118
2010-04-01 18:19:11 +00:00
Evan Cheng
562bb43207
Fix sdisel memcpy, memset, memmove lowering:
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1. Makes it possible to lower with floating point loads and stores.
2. Avoid unaligned loads / stores unless it's fast.
3. Fix some memcpy lowering logic bug related to when to optimize a
load from constant string into a constant.
4. Adjust x86 memcpy lowering threshold to make it more sane.
5. Fix x86 target hook so it uses vector and floating point memory
ops more effectively.
rdar://7774704
llvm-svn: 100090
2010-04-01 06:04:33 +00:00
Bob Wilson
aae933cc81
Revert Mon Ping's change 99928, since it broke all the llvm-gcc buildbots.
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llvm-svn: 99948
2010-03-30 22:27:04 +00:00
Mon P Wang
9351ea594a
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
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e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
A update of langref will occur in a subsequent checkin.
llvm-svn: 99928
2010-03-30 20:55:56 +00:00
Chris Lattner
8e4cf6f425
Rip out the 'is temporary' nonsense from the MCContext interface to
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create symbols. It is extremely error prone and a source of a lot
of the remaining integrated assembler bugs on x86-64.
This fixes rdar://7807601.
llvm-svn: 99902
2010-03-30 18:10:53 +00:00
Eric Christopher
ef30b48453
Add FIXME for operand promotion.
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llvm-svn: 99859
2010-03-30 01:04:59 +00:00
Benjamin Kramer
9bbdbd2dba
Make isInt?? and isUint?? template specializations of the generic versions. This
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makes calls a little bit more consistent and allows easy removal of the
specializations in the future. Convert all callers to the templated functions.
llvm-svn: 99838
2010-03-29 21:13:41 +00:00
Evan Cheng
d1ee7e0ba3
Do not sibcall if stack needs to be dynamically aligned.
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llvm-svn: 99620
2010-03-26 16:26:03 +00:00
Evan Cheng
377bb993d8
Allow trivial sibcall of vararg callee when no arguments are being passed.
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llvm-svn: 99598
2010-03-26 02:13:13 +00:00
Nate Begeman
c45fc4a137
Per chris's request, add some comments.
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llvm-svn: 99434
2010-03-24 22:19:06 +00:00
Nate Begeman
820b07ed10
BUILD_VECTOR was missing out on some prime opportunities to use SSE 4.1 inserts.
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llvm-svn: 99423
2010-03-24 20:49:50 +00:00
Evan Cheng
011705c6b8
If call result is in ST0 and it is not being passed to the caller's
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caller, then it is not safe to optimize the call into a sibcall since
the call result has to be popped off the x87 stack.
llvm-svn: 99032
2010-03-20 02:58:15 +00:00
Daniel Dunbar
241d3cb048
MC: Allow modifiers in MCSymbolRefExpr, and eliminate X86MCTargetExpr.
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- Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue.
- This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol.
llvm-svn: 98592
2010-03-15 23:51:06 +00:00
Dan Gohman
db6002b964
Recognize code for doing vector gather/scatter index calculations with
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32-bit indices. Instead of shuffling each element out of the index vector,
when all indices are needed, just store the input vector to the stack and
load the elements out.
llvm-svn: 98588
2010-03-15 23:23:03 +00:00
Bill Wendling
5493cf6715
Now that the default for Darwin platforms is to place the LSDA into the TEXT
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section, remove the target-specific code that performs this.
llvm-svn: 98580
2010-03-15 21:09:38 +00:00
Bill Wendling
b8ec72ddcb
Place the LSDA into the TEXT section for x86 Darwin. If the global it's pointing
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to is local to the translation unit, we need to place fill the value of that
symbol into the non-lazy pointer.
This should conclude all Darwin changes for placing the LSDA into the TEXT
section. There is some cleanup to do. I.e., there's no longer a special need for
target-specific code here. But that can come later.
llvm-svn: 98564
2010-03-15 19:04:37 +00:00
Evan Cheng
bcd8655d1d
Avoid sibcall optimization if either caller or callee is using sret semantics.
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llvm-svn: 98561
2010-03-15 18:54:48 +00:00
Chris Lattner
c50b8b27f5
fix PR6605, X86ISD::CMP always returns i32 (EFLAGS), not
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the operand type.
llvm-svn: 98507
2010-03-14 18:44:35 +00:00
Chris Lattner
1469c1b01e
add support for pentium class CPUs which do not have cmov,
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PR4841. Patch by Craig Smith!
llvm-svn: 98496
2010-03-14 18:31:44 +00:00
Evan Cheng
7d8c39bb1c
Do not force indirect tailcall through fixed registers: eax, r11. Add support to allow loads to be folded to tail call instructions.
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llvm-svn: 98465
2010-03-14 03:48:46 +00:00
Chris Lattner
ceaa2343e7
eliminate the now-unneeded context argument of MBB::getSymbol()
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llvm-svn: 98451
2010-03-13 21:04:28 +00:00
Bill Wendling
21a9744045
Add a beta-test for placing the LSDA into the TEXT section on X86.
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llvm-svn: 98370
2010-03-12 19:20:40 +00:00
Benjamin Kramer
a06403442b
Use StringRef::substr instead of std::string::substr to avoid using a free'd
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string temporary. This should fix PR6590.
llvm-svn: 98349
2010-03-12 13:54:59 +00:00
Dan Gohman
6b1b9e37d7
Remove getWidenVectorType, which is no longer used.
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llvm-svn: 98289
2010-03-11 21:39:57 +00:00
Bill Wendling
368a68ac82
revert r98270.
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llvm-svn: 98281
2010-03-11 19:50:31 +00:00
Evan Cheng
20dbd70316
Bad bad bug. x86 force indirect tail call address into eax when it's meant to force it into a call preserved register instead. Change it to ecx for now.
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llvm-svn: 98270
2010-03-11 18:49:14 +00:00
Chris Lattner
d6d11e53ab
add support, testcases, and dox for the new GHC calling
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convention. Patch by David Terei!
llvm-svn: 98212
2010-03-11 00:22:57 +00:00
Dale Johannesen
987770c05d
Progress towards shepherding debug info through SelectionDAG.
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No functional effect yet. This is still evolving and should
not be viewed as final.
llvm-svn: 98195
2010-03-10 22:13:47 +00:00
Chris Lattner
ed0b8d36e4
set the temporary bit on MCSymbols correctly.
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llvm-svn: 98124
2010-03-10 02:25:11 +00:00
Anton Korobeynikov
74dea2d5cb
Lower dynamic stack allocation on mingw32 to separate instruction.
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We cannot use a normal call here since it has extra unmodelled side
effects (it changes stack pointer). This should fix PR5292.
llvm-svn: 97884
2010-03-06 19:32:29 +00:00
Evan Cheng
ee117a9429
Fix typo.
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llvm-svn: 97818
2010-03-05 19:55:55 +00:00
Evan Cheng
eb43cbfc75
Fix an oops in x86 sibcall optimization. If the ByVal callee argument is itself passed as a pointer, then it's obviously not safe to do a tail call.
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llvm-svn: 97797
2010-03-05 08:38:04 +00:00
Evan Cheng
04b9deff58
Rever 96389 and 96990. They are causing some miscompilation that I do not fully understand.
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llvm-svn: 97782
2010-03-05 03:08:23 +00:00
Dan Gohman
265f85f6d8
Fix recognition of 16-bit bswap for C front-ends which emit the
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clobber registers in a different order.
llvm-svn: 97741
2010-03-04 19:58:08 +00:00
Bill Wendling
5990930d72
Remove dead parameter passing.
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llvm-svn: 97536
2010-03-02 01:55:18 +00:00
Evan Cheng
c0a816fd16
Remove the optimize for code size limitation on r67917. Optimize 64-bit imul by constants into leas + shl regardless if optimizing for code size. The size saving from using imulq isn't worth it. Also, the lea and shl instructions may expose further optimization.
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llvm-svn: 97507
2010-03-01 22:00:11 +00:00
Evan Cheng
94051bc37e
Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.
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llvm-svn: 97310
2010-02-27 07:36:59 +00:00
Dan Gohman
8a2f0a6cd1
Truncate from i64 to i32 is "free" on x86-32, because it involves
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just discarding one of the registers.
llvm-svn: 97100
2010-02-25 03:04:36 +00:00
Daniel Dunbar
24c99e027e
Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
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the hopes of fixing PPC bootstrap.
llvm-svn: 97040
2010-02-24 17:05:47 +00:00
Dan Gohman
c0c6077fed
When forming SSE min and max nodes for UGE and ULE comparisons, it's
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necessary to swap the operands to handle NaN and negative zero properly.
Also, reintroduce logic for checking for NaN conditions when forming
SSE min and max instructions, fixed to take into consideration NaNs and
negative zeros. This allows forming min and max instructions in more
cases.
llvm-svn: 97025
2010-02-24 06:52:40 +00:00