1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 07:22:55 +01:00
Commit Graph

23 Commits

Author SHA1 Message Date
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work.  This change has no effect on generated code.

llvm-svn: 24563
2005-12-01 04:51:06 +00:00
Chris Lattner
2ac3fd08d2 Split RegisterClass 'Methods' into MethodProtos and MethodBodies
llvm-svn: 22929
2005-08-19 19:13:20 +00:00
Chris Lattner
47005fe346 put reg classes in namespaces
llvm-svn: 22922
2005-08-19 18:49:22 +00:00
Brian Gaeke
262fe40da0 Make this file self-contained.
llvm-svn: 18736
2004-12-10 04:46:30 +00:00
Brian Gaeke
77ddfa2495 Allocate fewer registers and tighten up alignment restrictions.
llvm-svn: 17929
2004-11-18 00:25:20 +00:00
Misha Brukman
88a1e0aba4 SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned!
llvm-svn: 16526
2004-09-27 18:22:18 +00:00
Misha Brukman
84e238e5ed Fix the copy-pasto that Brian noticed: V8 int regs are 32-bits wide, not 64.
llvm-svn: 16518
2004-09-26 21:07:43 +00:00
Misha Brukman
a59d95f2ed Use the V8/V9 shared register file description
llvm-svn: 16485
2004-09-22 21:48:50 +00:00
Chris Lattner
3cfb801817 Changes to make this work with Jason's patch. I checked this by hand, but
would appreciate if others would also look at this to make sure I didn't
botch something obvious

llvm-svn: 16312
2004-09-13 21:32:03 +00:00
Chris Lattner
484126d8f8 Convert bytes to bits in alignment
llvm-svn: 15971
2004-08-21 20:09:46 +00:00
Brian Gaeke
003a4a500c Make the double-fp pseudo registers be "NamedRegs".
llvm-svn: 14366
2004-06-24 09:23:21 +00:00
Brian Gaeke
734c654e50 The long integer pseudo-regs are history. So long, we hardly knew ye.
llvm-svn: 14364
2004-06-24 08:55:21 +00:00
Brian Gaeke
771e52d494 Add pseudo-registers and register class for 64-bit integer values.
llvm-svn: 14332
2004-06-22 20:14:41 +00:00
Brian Gaeke
ab4687b176 Mess around with allocation order. In particular, I think we ought to be
using the local & in regs first because they are not clobbered by calls.

llvm-svn: 14228
2004-06-18 08:19:08 +00:00
Chris Lattner
a58da750eb Merge my changes with brians
llvm-svn: 12736
2004-04-07 04:05:49 +00:00
Brian Gaeke
4b90f62e6d Add support for the "Y" register, used by MUL & DIV.
llvm-svn: 12734
2004-04-07 04:01:11 +00:00
Chris Lattner
a7180252e6 Avoid allocating special registers a bit more robustly
llvm-svn: 12207
2004-03-08 03:48:07 +00:00
Brian Gaeke
813f0d8512 Hack it so we do not try to allocate values to G0.
llvm-svn: 12184
2004-03-06 05:31:32 +00:00
Brian Gaeke
f8440c5a60 Double-FP pseudo-registers.
llvm-svn: 12112
2004-03-04 05:15:03 +00:00
Brian Gaeke
0d71671bcf Floating point regs
llvm-svn: 12110
2004-03-04 04:37:22 +00:00
Chris Lattner
7cb71a20ca Implement initial prolog/epilog code insertion methods.
llvm-svn: 11979
2004-02-29 05:18:30 +00:00
Chris Lattner
800f720e7b Add an instruction selector capable of selecting 'ret void'
llvm-svn: 11973
2004-02-29 00:27:00 +00:00
Chris Lattner
88268605ec Tab completion is our friend.
llvm-svn: 11957
2004-02-28 19:45:39 +00:00