1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 14:33:02 +02:00
Commit Graph

72 Commits

Author SHA1 Message Date
Chris Lattner
b35593a1c5 switch the sched unit map over to use a DenseMap instead of std::map. This
speeds up isel as a whole time by 2.6%.

llvm-svn: 33810
2007-02-03 01:34:13 +00:00
Chris Lattner
a975b95adb Eliminate static ctors from Statistics
llvm-svn: 32698
2006-12-19 22:41:21 +00:00
Bill Wendling
23b8b13c9d Removing even more <iostream> includes.
llvm-svn: 32320
2006-12-07 20:04:42 +00:00
Chris Lattner
a531ce882e Detemplatize the Statistic class. The only type it is instantiated with
is 'unsigned'.

llvm-svn: 32279
2006-12-06 17:46:33 +00:00
Evan Cheng
42cb1fd0ac Changes to use operand constraints to process two-address instructions.
llvm-svn: 31453
2006-11-04 09:44:31 +00:00
Chris Lattner
33bd5dcfb7 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
llvm-svn: 29911
2006-08-27 12:54:02 +00:00
Chris Lattner
a2eba83561 switch the SUnit pred/succ sets from being std::sets to being smallvectors.
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%).  More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.

llvm-svn: 29743
2006-08-17 00:09:56 +00:00
Jim Laskey
6d121090d3 Final polish on machine pass registries.
llvm-svn: 29471
2006-08-02 12:30:23 +00:00
Jim Laskey
f5e160063e 1. Change use of "Cache" to "Default".
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.

More to follow.

llvm-svn: 29450
2006-08-01 18:29:48 +00:00
Jim Laskey
b92b14f422 Introducing plugable register allocators and instruction schedulers.
llvm-svn: 29434
2006-08-01 14:21:23 +00:00
Andrew Lenharth
c1074954fb Reduce number of exported symbols
llvm-svn: 29220
2006-07-20 17:28:38 +00:00
Chris Lattner
de706b3e3e Shave another 27K off libllvmgcc.dylib with visibility hidden
llvm-svn: 28973
2006-06-28 22:17:39 +00:00
Evan Cheng
7e0c2d106e When a priority_queue is empty, the behavior of top() operator is
non-deterministic. Returns NULL when it's empty!

llvm-svn: 28560
2006-05-30 18:04:34 +00:00
Owen Anderson
29e4d70aed Refactor a bunch of includes so that TargetMachine.h doesn't have to include
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
2006-05-12 06:33:49 +00:00
Evan Cheng
cb2a0f392c Refactor scheduler code. Move register-reduction list scheduler to a
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.

llvm-svn: 28226
2006-05-11 23:55:42 +00:00
Evan Cheng
9f269c1bef Templatify RegReductionPriorityQueue
llvm-svn: 28212
2006-05-10 06:16:44 +00:00
Evan Cheng
1a8feb189e Add pseudo dependency to force a def&use operand to be scheduled last (unless
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".

llvm-svn: 28201
2006-05-09 07:13:34 +00:00
Jeff Cohen
953baf0494 Fix VC++ compilation error.
llvm-svn: 28117
2006-05-05 01:47:05 +00:00
Evan Cheng
ceb7645d40 Initial support for register pressure aware scheduling. The register reduction
scheduler can go into a "vertical mode" (i.e. traversing up the two-address
chain, etc.) when the register pressure is low.
This does seem to reduce the number of spills in the cases I've looked at. But
with x86, it's no guarantee the performance of the code improves.
It can be turned on with -sched-vertically option.

llvm-svn: 28108
2006-05-04 19:16:39 +00:00
Evan Cheng
2922daab4b Bottom up register pressure reduction work: clean up some hacks and enhanced
the heuristic to further reduce spills for several test cases. (Note, it may
not necessarily translate to runtime win!)

llvm-svn: 28076
2006-05-03 02:10:45 +00:00
Evan Cheng
44e851f6ec Dis-favor stores more
llvm-svn: 28035
2006-05-01 09:20:44 +00:00
Evan Cheng
494e47d755 Bottom up register-pressure reduction scheduler now pushes store operations
up the schedule. This helps code that looks like this:

loads ...
computations (first set) ...
stores (first set) ...
loads
computations (seccond set) ...
stores (seccond set) ...

Without this change, the stores and computations are more likely to
interleave:

loads ...
loads ...
computations (first set) ...
computations (second set) ...
computations (first set) ...
stores (first set) ...
computations (second set) ...
stores (stores set) ...

This can increase the number of spills if we are unlucky.

llvm-svn: 28033
2006-05-01 09:14:40 +00:00
Evan Cheng
94264c7c90 Didn't mean ScheduleDAGList.cpp to make the last checkin.
llvm-svn: 28030
2006-05-01 08:56:34 +00:00
Evan Cheng
ef706b77c4 Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions.
llvm-svn: 28029
2006-05-01 08:54:57 +00:00
Chris Lattner
a54a9d83c3 Don't advance the hazard recognizer when there are no hazards and no instructions
to be emitted.

Don't add one to the latency of a completed instruction if the latency of the
op is 0.

llvm-svn: 26718
2006-03-12 09:01:41 +00:00
Chris Lattner
aea53fc36f Chain operands aren't real uses: they don't require the full latency of the
predecessor to finish before they can start.

llvm-svn: 26717
2006-03-12 03:52:09 +00:00
Chris Lattner
7396b82585 As a pending queue data structure to keep track of instructions whose
operands have all issued, but whose results are not yet available.  This
allows us to compile:

int G;
int test(int A, int B, int* P) {
   return (G+A)*(B+1);
}

to:

_test:
        lis r2, ha16(L_G$non_lazy_ptr)
        addi r4, r4, 1
        lwz r2, lo16(L_G$non_lazy_ptr)(r2)
        lwz r2, 0(r2)
        add r2, r2, r3
        mullw r3, r2, r4
        blr

instead of this, which has a stall between the lis/lwz:

_test:
        lis r2, ha16(L_G$non_lazy_ptr)
        lwz r2, lo16(L_G$non_lazy_ptr)(r2)
        addi r4, r4, 1
        lwz r2, 0(r2)
        add r2, r2, r3
        mullw r3, r2, r4
        blr

llvm-svn: 26716
2006-03-12 00:38:57 +00:00
Chris Lattner
62eafde9c1 rename priorityqueue -> availablequeue. When a node is scheduled, remember
which cycle it lands on.

llvm-svn: 26714
2006-03-11 22:44:37 +00:00
Chris Lattner
04ada12cb7 Make CurrCycle a local var instead of an instance var
llvm-svn: 26713
2006-03-11 22:34:41 +00:00
Chris Lattner
6a9861953b Move some methods around so that BU specific code is together, TD specific code
is together, and direction independent code is together.

llvm-svn: 26712
2006-03-11 22:28:35 +00:00
Chris Lattner
40c02c01a5 merge preds/chainpreds -> preds set
merge succs/chainsuccs -> succs set

This has no functionality change, simplifies the code, and reduces the size
of sunits.

llvm-svn: 26711
2006-03-11 22:24:20 +00:00
Chris Lattner
da5f77e3cf Move some simple-sched-specific instance vars to the simple scheduler.
llvm-svn: 26690
2006-03-10 07:42:02 +00:00
Chris Lattner
89a5a946f5 Make EmitNode take a SDNode instead of a NodeInfo*
llvm-svn: 26687
2006-03-10 07:28:36 +00:00
Chris Lattner
3f870d581e Move the VRBase field from NodeInfo to being a separate, explicit, map.
llvm-svn: 26686
2006-03-10 07:25:12 +00:00
Chris Lattner
a316d82d2a no need to build groups anymore
llvm-svn: 26684
2006-03-10 07:15:58 +00:00
Chris Lattner
e23afcfd6d Create SUnits directly from the SelectionDAG.
llvm-svn: 26683
2006-03-10 07:13:32 +00:00
Chris Lattner
ed528a5652 Push PrepareNodeInfo/IdentifyGroups down the inheritance hierarchy
llvm-svn: 26682
2006-03-10 06:34:51 +00:00
Chris Lattner
920325db0a Teach the latency scheduler some new tricks. In particular, to break ties,
keep track of a sense of "mobility", i.e. how many other nodes scheduling one
node will free up.  For something like this:

float testadd(float *X, float *Y, float *Z, float *W, float *V) {
  return (*X+*Y)*(*Z+*W)+*V;
}

For example, this makes us schedule *X then *Y, not *X then *Z.  The former
allows us to issue the add, the later only lets us issue other loads.

This turns the above code from this:

_testadd:
        lfs f0, 0(r3)
        lfs f1, 0(r6)
        lfs f2, 0(r4)
        lfs f3, 0(r5)
        fadds f0, f0, f2
        fadds f1, f3, f1
        lfs f2, 0(r7)
        fmadds f1, f0, f1, f2
        blr

into this:

_testadd:
        lfs f0, 0(r6)
        lfs f1, 0(r5)
        fadds f0, f1, f0
        lfs f1, 0(r4)
        lfs f2, 0(r3)
        fadds f1, f2, f1
        lfs f2, 0(r7)
        fmadds f1, f1, f0, f2
        blr

llvm-svn: 26680
2006-03-10 05:51:05 +00:00
Chris Lattner
1bb3ae8dae add an aggregate method for reinserting scheduled nodes, add a callback for
priority impls that want to be notified when a node is scheduled

llvm-svn: 26678
2006-03-10 04:32:49 +00:00
Jeff Cohen
5002cf68b4 Fix VC++ build breakage.
llvm-svn: 26676
2006-03-10 03:57:45 +00:00
Chris Lattner
4fe39d8f9e remove temporary option
llvm-svn: 26646
2006-03-09 17:31:22 +00:00
Chris Lattner
f35a70d050 yes yes, enabled debug output is bad
llvm-svn: 26637
2006-03-09 07:39:25 +00:00
Chris Lattner
0020b50bac switch the t-d scheduler to use a really dumb and trivial critical path
latency priority function.

llvm-svn: 26636
2006-03-09 07:38:27 +00:00
Chris Lattner
074a604a1b Pull latency information for target instructions out of the latency tables. :)
Only enable this with -use-sched-latencies, I'll enable it by default with a
clean nightly tester run tonight.

PPC is the only target that provides latency info currently.

llvm-svn: 26634
2006-03-09 07:15:18 +00:00
Chris Lattner
b1f716a6d1 PriorityQueue is an instance var, use it.
llvm-svn: 26632
2006-03-09 06:48:37 +00:00
Chris Lattner
1d9c1edaa8 add some comments
llvm-svn: 26631
2006-03-09 06:37:29 +00:00
Chris Lattner
2dd7bcc95b Refactor the priority mechanism one step further: now that it is a separate
class, sever its implementation from the interface.  Now we can provide new
implementations of the same interface (priority computation) without touching
the scheduler itself.

llvm-svn: 26630
2006-03-09 06:35:14 +00:00
Chris Lattner
133ec8c3f0 Split the priority function computation and priority queue management out
of the ScheduleDAGList class into a new SchedulingPriorityQueue class.

llvm-svn: 26613
2006-03-08 05:18:27 +00:00
Chris Lattner
46a80382ce switch from an explicitly managed list of SUnits to a simple vector of sunits
llvm-svn: 26612
2006-03-08 04:54:34 +00:00
Chris Lattner
427dbaccca Shrinkify some fields, fit to 80 columns
llvm-svn: 26611
2006-03-08 04:41:06 +00:00