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Commit Graph

77372 Commits

Author SHA1 Message Date
Akira Hatanaka
856f4e30b2 Add variable IsO32 to MipsTargetLowering.
llvm-svn: 143213
2011-10-28 18:47:24 +00:00
Duncan Sands
3483c23658 A shift of a power of two is a power of two or zero.
For completeness - not spotted in the wild.

llvm-svn: 143211
2011-10-28 18:30:05 +00:00
Duncan Sands
5730fe6a31 Fold icmp ugt (udiv X, Y), X to false. Spotted by my super-optimizer
in 186.crafty.

llvm-svn: 143209
2011-10-28 18:17:44 +00:00
Owen Anderson
3dd6c949a5 Reapply r143202, with a manual decoding hook for SWP. This change inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle.
llvm-svn: 143208
2011-10-28 18:02:13 +00:00
Dan Gohman
dedcc22bcd Reapply r143177 and r143179 (reverting r143188), with scheduler
fixes: Use a separate register, instead of SP, as the
calling-convention resource, to avoid spurious conflicts with
actual uses of SP. Also, fix unscheduling of calling sequences,
which can be triggered by pseudo-two-address dependencies.

llvm-svn: 143206
2011-10-28 17:55:38 +00:00
Owen Anderson
5ccc0979a0 Revert r143202.
llvm-svn: 143203
2011-10-28 17:38:30 +00:00
Owen Anderson
5c58be2852 Specify fixed bits on CPS instructions to enable roundtripping.
llvm-svn: 143202
2011-10-28 17:29:39 +00:00
Jim Grosbach
72ab459378 Thumb2 ADD/SUB instructions encoding selection outside IT block.
Outside an IT block, "add r3, #2" should select a 32-bit wide encoding
rather than generating an error indicating the 16-bit encoding is only
legal in an IT block (outside, the 'S' suffic is required for the 16-bit
encoding).

rdar://10348481

llvm-svn: 143201
2011-10-28 16:57:07 +00:00
Jim Grosbach
188121af2e Allow register classes to match a containing class in InstAliases.
If the register class in the source alias is a subclass of the register class
of the actual instruction, the alias can still match OK since the constraints
are strictly a subset of what the instruction can actually handle.

llvm-svn: 143200
2011-10-28 16:43:40 +00:00
NAKAMURA Takumi
2ea569c7e0 test/MC/AsmParser/2011-09-06-NoNewline.s: Add explicit -mtriple=i386. It uses X86 instruction.
FIXME: Would it be reproduced without target-specific operands?
FIXME: Why run llvm-mc as the same input by 3 times?
llvm-svn: 143195
2011-10-28 14:12:30 +00:00
NAKAMURA Takumi
bcfac720a7 Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be host-endian-neutral.
Don't assume APInt::getRawData() would hold target-aware endianness nor host-compliant endianness. rawdata[0] holds most lower i64, even on big endian host.

FIXME: Add a testcase for big endian target.

FIXME: Ditto on CompileUnit::addConstantFPValue() ?
llvm-svn: 143194
2011-10-28 14:12:22 +00:00
Stepan Dyatkovskiy
d1216f47ca uint64 formatted output: replaced %llx with PRIx64 macro.
llvm-svn: 143191
2011-10-28 13:07:32 +00:00
Benjamin Kramer
66c9d07549 Use BranchProbability compare operators.
llvm-svn: 143190
2011-10-28 11:14:31 +00:00
NAKAMURA Takumi
b5df9f3cc1 test/CodeGen/X86/2010-08-10-DbgConstant.ll: Add explicit -mtriple=i686-linux. It must be for elf!
llvm-svn: 143189
2011-10-28 10:50:52 +00:00
Duncan Sands
a6507c4bcb Speculatively disable Dan's commits 143177 and 143179 to see if
it fixes the dragonegg self-host (it looks like gcc is miscompiled).
Original commit messages:
Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.

Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.

Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.

Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.

This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.

Delete #if 0 code accidentally left in.

llvm-svn: 143188
2011-10-28 09:55:57 +00:00
Nick Lewycky
5758d6af22 Always use the string pool, even when it makes the .o larger. This may help
tools that read the debug info in the .o files by making the DIE sizes more
consistent.

llvm-svn: 143186
2011-10-28 05:29:47 +00:00
Andrew Trick
77532be5e0 LFTR should avoid a type mismatch with null pointer IVs.
Fixes rdar://10359193 Indvar LinearFunctionTestReplace assertion

llvm-svn: 143183
2011-10-28 03:45:11 +00:00
Dan Gohman
fb95b6bd5e Delete #if 0 code accidentally left in.
llvm-svn: 143179
2011-10-28 01:41:21 +00:00
Dan Gohman
484df993bd Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.

Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.

Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.

Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.

This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.

llvm-svn: 143177
2011-10-28 01:29:32 +00:00
Peter Collingbourne
91824cb6ac Have llvm-config --cppflags print correct flags when in CMake build directory
Previously, if invoked from a CMake build directory, 'llvm-config
--cppflags' and friends would only print a -I flag for the build
directory's header search path, because it would assume that it was
already installed, not recognising its parent directory as being the
build directory.  Teach llvm-config about CMake build directories
so that it prints a -I for both the source and build directory's
search paths.

llvm-svn: 143171
2011-10-28 01:02:16 +00:00
Jim Grosbach
dac7815a91 ARM Allow 'q' registers in VLD/VST vector lists.
Just treat it as if the constituent D registers where specified.

rdar://10348896

llvm-svn: 143167
2011-10-28 00:06:50 +00:00
Dan Gohman
892b86e74c Remove the Alpha backend.
llvm-svn: 143164
2011-10-27 22:56:32 +00:00
Owen Anderson
f22cd77ceb Add testcase for r143162.
llvm-svn: 143163
2011-10-27 22:54:14 +00:00
Owen Anderson
d35df0aaeb Add some NEON stores to the VLD decoding hook that were accidentally omitted previously.
llvm-svn: 143162
2011-10-27 22:53:10 +00:00
Jakob Stoklund Olesen
de21509dcd Also set addrmode6 alignment when align==size.
Previously, we were only setting the alignment bits on over-aligned
loads and stores.

llvm-svn: 143160
2011-10-27 22:39:16 +00:00
Eli Friedman
bd9c6b8914 The default alias analysis is -noaa; update the docs to reflect that. Patch by Michael Ilseman.
llvm-svn: 143159
2011-10-27 22:32:13 +00:00
Jim Grosbach
67d4fb4bc0 ARM isel for vld1, opcode selection for register stride post-index pseudos.
llvm-svn: 143158
2011-10-27 22:25:42 +00:00
Jim Grosbach
ef4767e393 Delete dead code. Nothing ever instantiates this.
llvm-svn: 143153
2011-10-27 21:59:17 +00:00
Owen Anderson
c14e970962 Revert r143149, stubbing out symbolic disassembly support. The symbolic disassembly support is too MC-engrained to be useful in llvm-objdump.
llvm-svn: 143152
2011-10-27 21:55:13 +00:00
Owen Anderson
6508cba44c If we're searching for a symbol reference to pretty-print a scattered relocation address, and we don't find a symbol table entry, try section begin addresses as well.
llvm-svn: 143151
2011-10-27 21:53:50 +00:00
Owen Anderson
52982d93c4 Stub out support for symbol disassembly in llvm-objdump.
llvm-svn: 143149
2011-10-27 21:46:31 +00:00
Daniel Dunbar
ac2b6ca8cb projects/sample: Switch over to imported Makefile setup.
- This will require you to manually reconfigure the projects/sample project (by running projects/config/sample/config.status --recheck) if you haven't updated/built since the 1st part of this commit went in.

llvm-svn: 143148
2011-10-27 21:25:09 +00:00
Evan Cheng
75271d09f1 Avoid partial CPSR dependency from loop backedges. rdar://10357570
llvm-svn: 143145
2011-10-27 21:21:05 +00:00
Daniel Dunbar
9ca0ee457c tests: Rip out a bunch of now unused test code relating to use of llvm-gcc in LLVM tests.
llvm-svn: 143143
2011-10-27 20:59:26 +00:00
Daniel Dunbar
bb9f7884ae tests: Remove llvm2cpp, I'm pretty sure no one uses this.
llvm-svn: 143142
2011-10-27 20:59:21 +00:00
Daniel Dunbar
b1e6d3a421 lit: Drop some unneeded code from example tests.
- Also, cleanup site.exp files in example tests.

llvm-svn: 143141
2011-10-27 20:59:19 +00:00
Owen Anderson
9aaee13bf1 Fix pretty printing of i386 local sect diff relocations, TLV relocations, and x86_64 TLV relocations in MachO.
llvm-svn: 143140
2011-10-27 20:46:09 +00:00
Peter Collingbourne
24c42c8534 Add a pinned metadata name for fpaccuracy, and document it
llvm-svn: 143135
2011-10-27 19:19:14 +00:00
Peter Collingbourne
798811d4fd Document tbaa metadata in LangRef (documentation largely based on
comments at top of TypeBasedAliasAnalysis.cpp).

llvm-svn: 143134
2011-10-27 19:19:07 +00:00
Duncan Sands
ca325638c8 Reapply commit 143028 with a fix: the problem was casting a ConstantExpr Mul
using BinaryOperator (which only works for instructions) when it should have
been a cast to OverflowingBinaryOperator (which also works for constants).
While there, correct a few other dubious looking uses of BinaryOperator.
Thanks to Chad Rosier for the testcase.  Original commit message:
My super-optimizer noticed that we weren't folding this expression to
true: (x *nsw x) sgt 0, where x = (y | 1).  This occurs in 464.h264ref.

llvm-svn: 143125
2011-10-27 19:16:21 +00:00
Stepan Dyatkovskiy
7942165053 Fixed llvm-objdump uint64_t formatted output.
llvm-svn: 143120
2011-10-27 18:40:45 +00:00
Benjamin Kramer
3bb9d5377e 2>&1 doesn't work here, it just creates an empty file called "&1"
llvm-svn: 143117
2011-10-27 18:27:45 +00:00
Pete Cooper
cca60da8cd Changed test to check for correct load size instead of shift as the shift might change if optimised
llvm-svn: 143116
2011-10-27 18:15:58 +00:00
Jim Grosbach
ee31b72246 Trailing whitespace.
llvm-svn: 143113
2011-10-27 17:44:01 +00:00
Kevin Enderby
837c1d56a2 Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and
not depend on In32BitMode.  Use the sysexitq mnemonic for the version with the
REX.W prefix and only allow it only In64BitMode.  rdar://9738584

llvm-svn: 143112
2011-10-27 17:40:41 +00:00
Jim Grosbach
4f7964293a Thumb2 t2LDMDB[_UPD] assembly parsing to recognize .w suffix.
rdar://10348844

llvm-svn: 143110
2011-10-27 17:33:59 +00:00
Owen Anderson
997d323baa Expose relocation accessors through the libObject C API.
llvm-svn: 143109
2011-10-27 17:32:36 +00:00
Jim Grosbach
e1ec953149 Thumb2 t2MVNi assembly parsing to recognize ".w" suffix.
rdar://10348584

llvm-svn: 143108
2011-10-27 17:16:55 +00:00
Owen Anderson
ece66e91f2 Add relocation iterators to the libObject C API.
llvm-svn: 143107
2011-10-27 17:15:47 +00:00
Benjamin Kramer
ad2fb4eeb5 BlockFrequency: Use a smarter overflow check.
This trades one 64 bit div for one 64 bit mul and some arithmetic.

llvm-svn: 143106
2011-10-27 16:38:50 +00:00