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Author SHA1 Message Date
Nick Lewycky
11874a4e0a PerformSubCombine to work on integers larger than i128. Fixes a crasher. 
llvm-svn: 138354
 2011-08-23 19:01:24 +00:00
Jim Grosbach
9795206370 Thumb parsing and encoding for STRH. 
llvm-svn: 138352
 2011-08-23 18:56:20 +00:00
Caitlin Sadowski
9a011eafa9 Thread safety: Adding in an option for variadic expr* array of arguments 
llvm-svn: 138351
 2011-08-23 18:49:23 +00:00
Jim Grosbach
d507a9c6b9 Thumb parsing and encoding for STRB. 
llvm-svn: 138349
 2011-08-23 18:43:06 +00:00
Jim Grosbach
f9bc99b518 Thumb parsing and encoding for tSTRspi. 
llvm-svn: 138348
 2011-08-23 18:39:41 +00:00
Jim Grosbach
7ece5d431c Thumb parsing and encoding for STR. 
Not including tSTRspi.

llvm-svn: 138347
 2011-08-23 18:33:38 +00:00
Rafael Espindola
5ad9eaf265 Fix an example in the documentation. 
Patch by Sanjoy Das!

llvm-svn: 138346
 2011-08-23 18:26:56 +00:00
Jim Grosbach
3b20e779cd Thumb parsing and encoding for STM. 
llvm-svn: 138345
 2011-08-23 18:15:37 +00:00
Jim Grosbach
709c1644b0 Factor low reg checking into a helper function. 
llvm-svn: 138344
 2011-08-23 18:13:04 +00:00
Nadav Rotem
442df41879 Fix a typo in the test from the previous commit. 
llvm-svn: 138342
 2011-08-23 17:56:54 +00:00
Owen Anderson
3de2d7656d Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far. 
llvm-svn: 138341
 2011-08-23 17:51:38 +00:00
Nadav Rotem
d449bc9bff Address Duncan's CR request: 
1. Cleanup the tests in ConstantFolding.cpp
2. Implement isAllOnes for Constant, ConstantFP, ConstantVector

llvm-svn: 138340
 2011-08-23 17:48:43 +00:00
Owen Anderson
4ae835d7c9 Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the same instructions. 
llvm-svn: 138339
 2011-08-23 17:45:18 +00:00
Jim Grosbach
6ada94c011 Clean up Thumb load/store multiple definitions. 
There is no non-writeback store multiple instruction in Thumb1, so
don't define one. As a result load multiple is the only instantiation of
the multiclass, so refactor that away entirely.

llvm-svn: 138338
 2011-08-23 17:41:15 +00:00
Owen Anderson
9d5074746f Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing. 
llvm-svn: 138337
 2011-08-23 17:37:32 +00:00
Owen Anderson
b97912374e Port more assemble tests over to disassembly tests. 
llvm-svn: 138336
 2011-08-23 17:26:35 +00:00
Ivan Krasin
aa3c2057c5 This patch adds support of le32 pseudo-cpu that stands for generic 
32-bit little-endian CPU. Used by PNaCl and Emscripten.

llvm-svn: 138335
 2011-08-23 16:59:00 +00:00
Eric Christopher
cd47076a67 Fix fpimmm->fpimm typo. 
Patch by Micah Villmow!

llvm-svn: 138330
 2011-08-23 15:42:35 +00:00
Ivan Krasin
b2cd1f27c1 Update config.sub, config.guess and configure. 
The motivation to do that:

1. Now, llvm would use the stock config.sub. Before that we had an
uncommitted FreeBSD-related patch. Now, it has been upstreamed and
comes back. It means that it would be easier to update these files in
the next time (less magic knowledge)

2. Fix a typo for pseudo-CPUs: 32e[lb] -> [lb]e32, 64e[lb]->[lb]64.
One of these CPUs is used for PNaCl and it was not really convenient
to have a CPU that starts with a digit.

llvm-svn: 138323
 2011-08-23 06:43:49 +00:00
Craig Topper
67b22aedb4 Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712. 
llvm-svn: 138321
 2011-08-23 04:36:33 +00:00
NAKAMURA Takumi
6b729bec35 lib/Support/Windows/Windows.h: Update required IE ver. 0x0600 should be enough for Windows XP. 
llvm-svn: 138319
 2011-08-23 03:49:11 +00:00
Bruno Cardoso Lopes
8024703a16 Introduce a pass to insert vzeroupper instructions to avoid AVX to 
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

llvm-svn: 138317
 2011-08-23 01:14:17 +00:00
Jim Grosbach
455795fb04 Thumb parsing and encoding for SETEND. 
llvm-svn: 138312
 2011-08-22 23:58:02 +00:00
Jim Grosbach
d299db0857 Thumb parsing and encoding for SBC. 
llvm-svn: 138311
 2011-08-22 23:55:58 +00:00
Jim Grosbach
5ae40d73a6 Thumb parsing and encoding for RSB. 
llvm-svn: 138308
 2011-08-22 23:47:13 +00:00
Owen Anderson
33f3f4ec2a Reject invalid imod values in t2CPS instructions. 
llvm-svn: 138306
 2011-08-22 23:44:04 +00:00
Benjamin Kramer
48f01f6a77 Add an MCInstrAnalysis version of isCall. 
llvm-svn: 138305
 2011-08-22 23:41:41 +00:00
Jim Grosbach
9aa40e0f7c Thumb parsing and encoding for ROR. 
llvm-svn: 138304
 2011-08-22 23:40:51 +00:00
Jim Grosbach
c4109eef36 Thumb parsing and encoding for REV/REV16/REVSH. 
llvm-svn: 138303
 2011-08-22 23:39:25 +00:00
Bill Wendling
02e66489db Split the landing pad's edge. Then for all uses of a landingpad instruction's 
value, we insert a load of the exception object and selector object from memory,
which is where it actually resides. If it's used by a PHI node, we follow that
to where it is being used. Eventually, all landingpad instructions should have
no uses. Any PHI nodes that were associated with those landingpads should be
removed.

llvm-svn: 138302
 2011-08-22 23:38:40 +00:00
Owen Anderson
d5b7d73696 t2SMLAD is a four-register instruction, not a three-register one. 
llvm-svn: 138301
 2011-08-22 23:31:45 +00:00
Owen Anderson
c395a07c42 Correct operand naming of t2USAT16 to allow proper decoding. 
llvm-svn: 138300
 2011-08-22 23:27:47 +00:00
Jim Grosbach
a59709ec01 Revert r138278 now that r138289 has fixed the root issue. 
llvm-svn: 138299
 2011-08-22 23:25:48 +00:00
Owen Anderson
9e750147fb Match operand naming to allow correct decoding of t2LDRSH_POST. 
llvm-svn: 138298
 2011-08-22 23:22:05 +00:00
NAKAMURA Takumi
ab26f3c65b docs/ReleaseNotes.html: Mention that Windows 2000 will not be supported any more. 
llvm-svn: 138297
 2011-08-22 23:22:05 +00:00
Jim Grosbach
54234257fa Improve error checking for tPUSH and tPOP register lists. 
llvm-svn: 138295
 2011-08-22 23:17:34 +00:00
Owen Anderson
1cc1a1cb6a Match operand names to provide correct decoding for Thumb2 SMULL. 
llvm-svn: 138294
 2011-08-22 23:16:48 +00:00
Jim Grosbach
3ebeefcb5a Tidy up. Trailing whitespace. 
llvm-svn: 138293
 2011-08-22 23:13:54 +00:00
Owen Anderson
b400952853 Provide a correct decoder hook for Thumb2 shifted registers. Found by randomized testing. 
llvm-svn: 138292
 2011-08-22 23:10:16 +00:00
Ivan Krasin
47d91d86ca Add NativeClient support to Triple::ParseOS. 
llvm-svn: 138291
 2011-08-22 23:08:53 +00:00
Jim Grosbach
1f5445e9d3 Thumb parsing and encoding for PUSH. 
llvm-svn: 138290
 2011-08-22 23:05:11 +00:00
Evan Cheng
a828915f91 Follow up to Jim's r138278. This fixes commuteInstruction so it handles two-address instructions correctly. I'll let Jim add a test case. :-) 
llvm-svn: 138289
 2011-08-22 23:04:56 +00:00
Jim Grosbach
04e6944000 Fix think-o. 
llvm-svn: 138288
 2011-08-22 23:04:26 +00:00
Jim Grosbach
ec3958e68e Thumb assemmbly parsing diagnostic improvements for LDM. 
llvm-svn: 138287
 2011-08-22 23:01:07 +00:00
Jim Grosbach
059b0d9a14 Thumb assembly parsing and encoding for POP. 
llvm-svn: 138286
 2011-08-22 23:00:19 +00:00
Benjamin Kramer
bd13a6a319 X86: Add some operand types required to identify calls. 
llvm-svn: 138285
 2011-08-22 22:55:32 +00:00
Jim Grosbach
d28882c799 Temporarilly mark tMUL as not commutable. 
It's not playing nicely in the coalescer with the tied operand. Disable
commutability for now while we figure out the deeper fix.

llvm-svn: 138278
 2011-08-22 22:00:18 +00:00
Eli Friedman
e8cbd06288 Some minor wording updates and cross-linking for atomic docs. Explicitly note that we don't try to portably define what volatile in LLVM IR means. 
llvm-svn: 138274
 2011-08-22 21:35:27 +00:00
Owen Anderson
a2231fad2e Provide operand encoding information for half-precision VCVT instructions. Found by randomized testing. 
llvm-svn: 138273
 2011-08-22 21:34:00 +00:00
Bruno Cardoso Lopes
8007165688 Add support for breaking 256-bit int VETCC into two 128-bit ones, 
avoding scalarization of the compare. Reduces code from 59 to 6
instructions. Fix PR10712.

llvm-svn: 138271
 2011-08-22 20:31:04 +00:00