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Commit Graph

128241 Commits

Author SHA1 Message Date
Easwaran Raman
578ce7baf1 Metadata support for profile summary.
This adds support to convert ProfileSummary object to Metadata and create a
ProfileSummary object from metadata. This would allow attaching profile summary
information to Module allowing optimization passes to use it.

llvm-svn: 262360
2016-03-01 18:30:58 +00:00
Matt Arsenault
807567a0a9 DAGCombiner: Turn extract of bitcasted integer into truncate
This reduces the number of bitcast nodes and generally cleans up the
DAG when bitcasting between integers and vectors everywhere.

llvm-svn: 262358
2016-03-01 18:01:37 +00:00
Matt Arsenault
4b1c813bd6 Add isScalarInteger helper to EVT/MVT
llvm-svn: 262357
2016-03-01 18:01:28 +00:00
Changpeng Fang
929a348e60 AMDGPU/SI: Implement DS_PERMUTE/DS_BPERMUTE Instruction Definitions and Intrinsics
Summary:
  This patch impleemnts DS_PERMUTE/DS_BPERMUTE instruction definitions and intrinsics,
which are new since VI.

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits, arsenm

Differential Revision: http://reviews.llvm.org/D17614

llvm-svn: 262356
2016-03-01 17:51:23 +00:00
Kostya Serebryany
306353eaf8 [libFuzzer] remove FuzzerSanitizerOptions.cpp
llvm-svn: 262354
2016-03-01 17:46:32 +00:00
Michael Zuckerman
71f617e26e [LLVM][AVX512] PSRL{DI|QI} Change imm8 to int
Differential Revision: http://reviews.llvm.org/D17713

llvm-svn: 262353
2016-03-01 17:46:32 +00:00
Hans Wennborg
f725e062bd [X86] Check that attribute parameters match for tail calls (PR26590)
In the code below on 32-bit targets, x would previously get forwarded to g()
without sign-extension to 32 bits as required by the parameter attribute.

  void g(signed short);
  void f(unsigned short x) {
    g(x);
  }

llvm-svn: 262352
2016-03-01 17:45:23 +00:00
Sanjay Patel
d47daeaf1d fix documentation comments; NFC
llvm-svn: 262351
2016-03-01 17:25:35 +00:00
Petar Jovanovic
0302dd0999 Revert "calculate builtin_object_size if argument is a removable pointer"
Revert r262337 as "check-llvm ubsan" step failed on
sanitizer-x86_64-linux-fast buildbot.

llvm-svn: 262349
2016-03-01 16:50:08 +00:00
Sanjay Patel
74bcf66c0f function names start with a lowercase letter; NFC
llvm-svn: 262347
2016-03-01 16:17:48 +00:00
Nikolay Haustov
fe5ca2dc8c [AMDGPU] Remove unused disassembler code.
llvm-svn: 262346
2016-03-01 16:02:40 +00:00
Rafael Espindola
c165498992 Refactor duplicated code for linking with pthread.
llvm-svn: 262344
2016-03-01 15:54:40 +00:00
Nikolay Haustov
15d5943a07 [AMDGPU] Fix build warnings.
llvm-svn: 262338
2016-03-01 14:50:59 +00:00
Petar Jovanovic
a1fb751763 calculate builtin_object_size if argument is a removable pointer
This patch fixes calculating correct value for builtin_object_size function
when pointer is used only in builtin_object_size function call and never
after that.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D17337

llvm-svn: 262337
2016-03-01 14:39:55 +00:00
Nikolay Haustov
e2718bc744 [AMDGPU] Disassembler code refactored + error messages.
Idea behind this change is to make code shorter and as much common for all targets as possible. Let's even accept more code than is valid for a particular target, leaving it for the assembler to sort out.

64bit instructions decoding added.

Error\warning messages on unrecognized instructions operands added, InstPrinter allowed to print invalid operands helping to find invalid/unsupported code.

The change is massive and hard to compare with previous version, so it makes sense just to take a look on the new version. As a bonus, with a few TD changes following, it disassembles the majority of instructions. Currently it fully disassembles >300K binary source of some blas kernel.

Previous TODOs were saved whenever possible.

Patch by: Valery Pykhtin

Differential Revision: http://reviews.llvm.org/D17720

llvm-svn: 262332
2016-03-01 13:57:29 +00:00
Petr Pavlu
324853823b [LTO] Fix error reporting from lto_module_create_in_local_context()
Function lto_module_create_in_local_context() would previously
rely on the default LLVMContext being created for it by
LTOModule::makeLTOModule(). This context exits the program on
error and is not arranged to update sLastStringError in
tools/lto/lto.cpp.

Function lto_module_create_in_local_context() now creates an
LLVMContext by itself, sets it up correctly to its needs and then
passes it to LTOModule::createInLocalContext() which takes
ownership of the context and keeps it present for the lifetime of
the returned LTOModule.

Function LTOModule::makeLTOModule() is modified to take a
reference to LLVMContext (instead of a pointer) and no longer
creates a default context when nullptr is passed to it. Method
LTOModule::createInContext() that takes a pointer to LLVMContext
is removed because it allows to pass a nullptr to it. Instead
LTOModule::createFromBuffer() (that takes a reference to
LLVMContext) should be used.

Differential Revision: http://reviews.llvm.org/D17715

llvm-svn: 262330
2016-03-01 13:13:49 +00:00
Michael Zuckerman
c05422513f [AVX512][PSRAQ][PSRAD] Change imm8 to int.
Differential Revision: http://reviews.llvm.org/D17692

llvm-svn: 262320
2016-03-01 11:36:23 +00:00
Amjad Aboud
557cf6fe56 Disallow generating vzeroupper before return instruction (iret) in interrupt handler function.
This resolves https://llvm.org/bugs/show_bug.cgi?id=26412

Differential Revision: http://reviews.llvm.org/D17542

llvm-svn: 262319
2016-03-01 11:32:03 +00:00
Simon Atanasyan
bcec242b5a [MC][YAML] Rangify the loop. NFC
llvm-svn: 262317
2016-03-01 10:11:27 +00:00
Vasileios Kalintiris
e8b2910afd [mips] Promote the result of SETCC nodes to GPR width.
Summary:
This patch modifies the existing comparison, branch, conditional-move
and select patterns, and adds new ones where needed. Also, the updated
SLT{u,i,iu} set of instructions generate a GPR width result.

The majority of the code changes in the Mips back-end fix the wrong
assumption that the result of SETCC nodes always produce an i32 value.
The changes in the common code path account for the fact that in 64-bit
MIPS targets, i1 is promoted to i32 instead of i64.

Reviewers: dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D10970

llvm-svn: 262316
2016-03-01 10:08:01 +00:00
Nikolay Haustov
b8a1824976 [TableGen] AsmMatcher: Skip optional operands in the midle of instruction if it is not present
Previosy, if actual instruction have one of optional operands then other optional operands listed before this also should be presented.
For example instruction v_fract_f32 v0, v1, mul:2 have one optional operand - OMod and do not have optional operand clamp. Previously this was not allowed because clamp is listed before omod in AsmString:

string AsmString = "v_fract_f32$vdst, $src0_modifiers$clamp$omod";
Making this work required some hacks (both OMod and Clamp match classes have same PredicateMethod).

Now, if MatchInstructionImpl meets formal optional operand that is not presented in actual instruction it skips this formal operand and tries to match current actual operand with next formal.

Patch by: Sam Kolton

Review: http://reviews.llvm.org/D17568

[AMDGPU] Assembler: Check immediate types for several optional operands in predicate methods
With this change you should place optional operands in order specified by asm string:

clamp -> omod
offset -> glc -> slc -> tfe
Fixes for several tests.
Depends on D17568

Patch by: Sam Kolton

Review: http://reviews.llvm.org/D17644
llvm-svn: 262314
2016-03-01 08:34:43 +00:00
Nikolay Haustov
dd568e520a AsmParser: Fix nested .irp/.irpc
Count .irp/.irpc in parseMacroLikeBody similar to .rept
Update tests.

Review: http://reviews.llvm.org/D17707
llvm-svn: 262313
2016-03-01 08:18:28 +00:00
Craig Topper
ec7d7b8389 [X86] Centralize the masking of TSFlags with FormMask into a variable earlier so we can stop masking in multiple places. NFC
llvm-svn: 262312
2016-03-01 07:15:59 +00:00
Craig Topper
a90bbbbd14 [X86] Localize a temporary variable into the cases its need in. NFC
llvm-svn: 262310
2016-03-01 06:42:48 +00:00
Craig Topper
a60b62369e [X86] Be consistent about using pre/post increment/decrement in nearby code. NFC
llvm-svn: 262309
2016-03-01 06:42:46 +00:00
Craig Topper
f449a9bf2a [X86] Combine some initialization code with variable declaration and comments. NFC
llvm-svn: 262301
2016-03-01 05:42:16 +00:00
Matt Arsenault
4978a6e2f1 LegalizeDAG: Use correct ptr type when expanding unaligned load/store
This fixes regressions exposed in existing AMDGPU tests in a
future commit when all loads are custom lowered.

llvm-svn: 262299
2016-03-01 05:13:35 +00:00
Matt Arsenault
cb99e5ce0d AMDGPU: Don't emit build_pair during udivrem legalization
Technically you aren't supposed to emit these after type legalization
for some reason, and we use vector extracts of bitcasted integers
as the canonical way to do this.

llvm-svn: 262298
2016-03-01 05:06:05 +00:00
Matt Arsenault
6b8a75fa0b AMDGPU: Don't use estimated stack size when we know the real stack size
llvm-svn: 262297
2016-03-01 04:58:20 +00:00
Matt Arsenault
8238b5c22c AMDGPU: Set HasExtractBitInsn
This currently does not have the control over the bitwidth,
and there are missing optimizations to reduce the integer to
32-bit if it can be.

But in most situations we do want the sinking to occur.

llvm-svn: 262296
2016-03-01 04:58:17 +00:00
David Majnemer
f7676c3bd3 [WinEH] Allocate the registration node before the catch objects
The CatchObjOffset is relative to the end of the EH registration node
for 32-bit x86 WinEH targets.  A special sentinel value, 0, is used to
indicate that no catch object should be initialized.

This means that a catch object allocated immediately before the
registration node would be assigned a CatchObjOffset of 0, leading the
runtime to believe that a catch object should not be initialized.

To handle this, allocate the registration node prior to any other frame
object.  This will ensure that catch objects will not be allocated
before the registration node.

This fixes PR26757.

Differential Revision: http://reviews.llvm.org/D17689

llvm-svn: 262294
2016-03-01 04:30:16 +00:00
David Majnemer
54603e7ab8 [Verifier] Diagnose when unwinding out of cycles of blocks
Generally speaking, this can only happen with unreachable code.
However, neglecting to check for this condition would lead us to loop
forever.

llvm-svn: 262284
2016-03-01 01:19:05 +00:00
Adam Nemet
4834994813 [LLE] Add testcase for the fix in r262267
llvm-svn: 262280
2016-03-01 00:50:14 +00:00
Adam Nemet
a977036086 [LAA] Add missing debug output
llvm-svn: 262279
2016-03-01 00:50:08 +00:00
Sanjay Patel
aee22b5eed [x86, InstCombine] transform more x86 masked loads to LLVM intrinsics
Continuation of:
http://reviews.llvm.org/rL262269

llvm-svn: 262273
2016-02-29 23:59:00 +00:00
Adam Nemet
5ed52a9810 [LLE] Fix a comment
llvm-svn: 262270
2016-02-29 23:21:12 +00:00
Sanjay Patel
4d045a2e91 [x86, InstCombine] transform x86 AVX masked loads to LLVM intrinsics
The intended effect of this patch in conjunction with:
http://reviews.llvm.org/rL259392
http://reviews.llvm.org/rL260145

is that customers using the AVX intrinsics in C will benefit from combines when
the load mask is constant:

__m128 mload_zeros(float *f) {
  return _mm_maskload_ps(f, _mm_set1_epi32(0));
}

__m128 mload_fakeones(float *f) {
  return _mm_maskload_ps(f, _mm_set1_epi32(1));
}

__m128 mload_ones(float *f) {
  return _mm_maskload_ps(f, _mm_set1_epi32(0x80000000));
}

__m128 mload_oneset(float *f) {
  return _mm_maskload_ps(f, _mm_set_epi32(0x80000000, 0, 0, 0));
}

...so none of the above will actually generate a masked load for optimized code.

This is the masked load counterpart to:
http://reviews.llvm.org/rL262064

llvm-svn: 262269
2016-02-29 23:16:48 +00:00
David Majnemer
bfb6539d9f [Verifier] Handle more funclet edge cases
This change makes the verifier a little more paranoid.  It was possible
to trick the verifier into crashing or infinite looping.

llvm-svn: 262268
2016-02-29 22:56:36 +00:00
Adam Nemet
6307c054b4 [LLE] Fix SingleSource/Benchmarks/Polybench/stencils/jacobi-2d-imper with Polly
We can actually have dependences between accesses with different
underlying types.  Bail in this case.

A test will follow shortly.

llvm-svn: 262267
2016-02-29 22:53:59 +00:00
Eric Christopher
b615cc9f15 Simplify some boolean conditional return statements in AArch64.
http://reviews.llvm.org/D9979

Patch by Richard Thomson (and some conflict resolution by me).

llvm-svn: 262266
2016-02-29 22:50:49 +00:00
Adrian Prantl
48494ce3b7 Improve the debug output of DwarfDebug::buildLocationList().
llvm-svn: 262265
2016-02-29 22:28:22 +00:00
Adrian Prantl
a2cfd5f87f Document an anomaly in this testcase.
llvm-svn: 262264
2016-02-29 22:28:16 +00:00
Paul Robinson
7abc61f023 Reapply r262092: [FileCheck] Abort if -NOT is combined with another suffix.
Combinations of suffixes that look useful are actually ignored;
complaining about them will avoid mistakes.

Differential Revision: http://reviews.llvm.org/D17587

llvm-svn: 262263
2016-02-29 22:13:03 +00:00
Sanjoy Das
b7b456c707 [Verifier] Minor fix to error message; NFC
llvm-svn: 262262
2016-02-29 22:04:25 +00:00
Colin LeMahieu
1a01736c94 [Hexagon] As a size optimization, not lazy extending TPREL or DTPREL variants since they're usually in range.
llvm-svn: 262258
2016-02-29 21:21:56 +00:00
Colin LeMahieu
a43e17a0f6 [Hexagon] Missed member initialization causing ubsan failure.
llvm-svn: 262252
2016-02-29 20:42:25 +00:00
Adam Nemet
edfef38d92 Enable LoopLoadElimination by default
Summary:
I re-benchmarked this and results are similar to original results in
D13259:

On ARM64:
  SingleSource/Benchmarks/Polybench/linear-algebra/solvers/dynprog -59.27%
  SingleSource/Benchmarks/Polybench/stencils/adi                   -19.78%

On x86:
  SingleSource/Benchmarks/Polybench/linear-algebra/solvers/dynprog  -27.14%

And of course the original ~20% gain on SPECint_2006/456.hmmer with Loop
Distribution.

In terms of compile time, there is ~5% increase on both
SingleSource/Benchmarks/Misc/oourafft and
SingleSource/Benchmarks/Linkpack/linkpack-pc.  These are both very tiny
loop-intensive programs where SCEV computations dominates compile time.

The reason that time spent in SCEV increases has to do with the design
of the old pass manager.  If a transform pass does not preserve an
analysis we *invalidate* the analysis even if there was *no*
modification made by the transform pass.

This means that currently we don't take advantage of LLE and LV sharing
the same analysis (LAA) and unfortunately we recompute LAA *and* SCEV
for LLE.

(There should be a way to work around this limitation in the case of
SCEV and LAA since both compute things on demand and internally cache
their result.  Thus we could pretend that transform passes preserve
these analyses and manually invalidate them upon actual modification.
On the other hand the new pass manager is supposed to solve so I am not
sure if this is worthwhile.)

Reviewers: hfinkel, dberlin

Subscribers: dberlin, reames, mssimpso, aemerson, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D16300

llvm-svn: 262250
2016-02-29 20:35:11 +00:00
Adrian Prantl
bce901048a Fixup MIPS testcase after r262247 and make it a little more robust.
llvm-svn: 262249
2016-02-29 20:25:10 +00:00
Geoff Berry
0df55f3489 [AArch64] Fix isLegalAddImmediate() to return true for valid negative values.
Reviewers: t.p.northover, jmolloy

Subscribers: mcrosier, aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D17463

llvm-svn: 262248
2016-02-29 19:53:22 +00:00
Adrian Prantl
8615497ff7 Fix PR26585 by improving the promotion of DBG_VALUEs to DW_AT_locations.
When a variable is described by a single DBG_VALUE instruction we can
often use a more efficient inline DW_AT_location instead of using a
location list.

This commit makes the heuristic that decides when to apply this
optimization stricter by also verifying that the DBG_VALUE is live at the
entry of the function (instead of just checking that it is valid until
the end of the function).

<rdar://problem/24611008>

llvm-svn: 262247
2016-02-29 19:49:46 +00:00