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10 Commits

Author SHA1 Message Date
Saleem Abdulrasool
e5bf2f858c ARM: yet another round of ARM test clean ups
llvm-svn: 205586
2014-04-03 23:47:24 +00:00
Joerg Sonnenberger
2826f5b278 Enabling thumb2 mode used to force support for armv6t2. Replace this
with a temporary assertion and adjust the various test cases.

llvm-svn: 197224
2013-12-13 11:16:00 +00:00
Jakob Stoklund Olesen
b3487aa334 Remove -join-physregs from the test suite.
This option has been disabled for a while, and it is going away so I can
clean up the coalescer code.

The tests that required physreg joining to be enabled were almost all of
the form "tiny function with interference between arguments and return
value". Such functions are usually inlined in the real world.

The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly
rare.

llvm-svn: 157027
2012-05-17 23:44:19 +00:00
Evan Cheng
37ff73dfaf Improve codegen for select's:
if (x != 0) x = 1
if (x == 1) x = 1

Previous codegen looks like this:
        mov     r1, r0
        cmp     r1, #1
        mov     r0, #0
        moveq   r0, #1

The naive lowering select between two different values. It should recognize the
test is equality test so it's more a conditional move rather than a select:
        cmp     r0, #1
        movne   r0, #0

rdar://9758317

llvm-svn: 135017
2011-07-13 00:42:17 +00:00
Jakob Stoklund Olesen
780e6d1f64 Explicitly request physreg coalesing for a bunch of Thumb2 unit tests.
These tests all follow the same pattern:

	mov	r2, r0
	movs	r0, #0
	$CMP	r2, r1
	it	eq
	moveq	r0, #1
	bx	lr

The first 'mov' can be eliminated by rematerializing 'movs r0, #0' below the
test instruction:

	$CMP	r0, r1
	mov.w	r0, #0
	it	eq
	moveq	r0, #1
	bx	lr

So far, only physreg coalescing can do that. The register allocators won't yet
split live ranges just to eliminate copies. They can learn, but this particular
problem is not likely to show up in real code. It only appears because r0 is
used for both the function argument and return value.

llvm-svn: 130858
2011-05-04 19:02:07 +00:00
Jim Grosbach
f4abb1280a Convert to FileCheck
llvm-svn: 88947
2009-11-16 20:04:15 +00:00
Dan Gohman
142428ce64 Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81293
2009-09-09 00:09:15 +00:00
David Goodwin
471e9f5b8d Add ".w" suffix for wide thumb-2 instructions.
llvm-svn: 77199
2009-07-27 16:31:55 +00:00
David Goodwin
6ed9f9c9c5 Enhance tests to include shifted-register operand testing.
llvm-svn: 74490
2009-06-30 01:02:20 +00:00
David Goodwin
4f53387d26 Add Thumb-2 support for TEQ amd TST.
llvm-svn: 74468
2009-06-29 22:49:42 +00:00