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Commit Graph

119768 Commits

Author SHA1 Message Date
Pete Cooper
8f1d7fbe9e Revert "Add const to a bunch of Type* in DataLayout. NFC."
This reverts commit r243135.

Feedback from Craig Topper and David Blaikie was that we don't put const on Type as it has no mutable state.

llvm-svn: 243283
2015-07-27 17:15:28 +00:00
Pete Cooper
89fb65d96c Revert "Add const to some Type* parameters which didn't need to be mutable. NFC."
This reverts commit r243146.

Feedback from Craig Topper and David Blaikie was that we don't put const on Type as it has no mutable state.

llvm-svn: 243282
2015-07-27 17:15:24 +00:00
Silviu Baranga
c935cc9417 The tests added in r243270 require asserts to be enabled
llvm-svn: 243274
2015-07-27 15:22:49 +00:00
Silviu Baranga
ee646c53e6 Fix the tests added in r243270. Use 2>&1 instead of |&
llvm-svn: 243273
2015-07-27 15:08:55 +00:00
Bruno Cardoso Lopes
826fe2e37d [PeepholeOptimizer] Look through PHIs to find additional register sources
Reapply r242295 with fixes in the implementation.

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
instructions.
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

A:
  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

B:
  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

C:
  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0

Becomes:

A:
  psllq %mm1, %mm0
  jmp C

B:
  por %mm1, %mm0
  jmp C

C:
  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197
rdar://problem/20404526

llvm-svn: 243271
2015-07-27 14:39:46 +00:00
Silviu Baranga
18a73d3e6e [ARM/AArch64] Fix cost model for interleaved accesses
Summary:
Fix the cost of interleaved accesses for ARM/AArch64.
We were calling getTypeAllocSize and using it to check
the number of bits, when we should have called
getTypeAllocSizeInBits instead.

This would pottentially cause the vectorizer to
generate loads/stores and shuffles which cannot
be matched with an interleaved access instruction.

No performance changes are expected for now since
matching/generating interleaved accesses is still
disabled by default.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D11524

llvm-svn: 243270
2015-07-27 14:39:34 +00:00
Simon Pilgrim
c1ccf86144 [X86] Reordered lowerVectorShuffleAsBitMask before lowerVectorShuffleAsBlend. NFCI.
Allows us to show diffs for D11518 more clearly

llvm-svn: 243264
2015-07-27 12:37:19 +00:00
Marek Olsak
2ce56817b0 AMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
This is a candidate for 3.7.

llvm-svn: 243263
2015-07-27 11:37:42 +00:00
NAKAMURA Takumi
1c7fecc1fe LoopAccessAnalysis.cpp: Tweak r243239 to avoid side effects. It caused different emissions between gcc and clang.
llvm-svn: 243258
2015-07-27 01:35:30 +00:00
Sean Silva
7622b11f8c Avoid using uncommon acronym "MSROM".
llvm-svn: 243256
2015-07-27 00:46:59 +00:00
Jingyue Wu
91cf96359e Roll forward r243250
r243250 appeared to break clang/test/Analysis/dead-store.c on one of the build
slaves, but I couldn't reproduce this failure locally. Probably a false
positive as I saw this test was broken by r243246 or r243247 too but passed
later without people fixing anything.

llvm-svn: 243253
2015-07-26 19:10:03 +00:00
Jingyue Wu
61ee29a54f Revert r243250
breaks tests

llvm-svn: 243251
2015-07-26 18:30:13 +00:00
Jingyue Wu
f4362fe267 [TTI/CostModel] improve TTI::getGEPCost and use it in CostModel::getInstructionCost
Summary:
This patch updates TargetTransformInfoImplCRTPBase::getGEPCost to consider
addressing modes. It now returns TCC_Free when the GEP can be completely folded
to an addresing mode.

I started this patch as I refactored SLSR. Function isGEPFoldable looks common
and is indeed used by some WIP of mine. So I extracted that logic to getGEPCost.

Furthermore, I noticed getGEPCost wasn't directly tested anywhere. The best
testing bed seems CostModel, but its getInstructionCost method invokes
getAddressComputationCost for GEPs which provides very coarse estimation. So
this patch also makes getInstructionCost call the updated getGEPCost for GEPs.
This change inevitably breaks some tests because the cost model changes, but
nothing looks seriously wrong -- if we believe the new cost model is the right
way to go, these tests should be updated.

This patch is not perfect yet -- the comments in some tests need to be updated.
I want to know whether this is a right approach before fixing those details.

Reviewers: chandlerc, hfinkel

Subscribers: aschwaighofer, llvm-commits, aemerson

Differential Revision: http://reviews.llvm.org/D9819

llvm-svn: 243250
2015-07-26 17:28:13 +00:00
Simon Pilgrim
8afc582599 [X86][SSE] Refreshed vector bit count tests.
llvm-svn: 243249
2015-07-26 17:02:25 +00:00
Simon Pilgrim
0bb7b4548a [X86][AVX2] Refreshed avx2 conversion tests
llvm-svn: 243248
2015-07-26 17:01:16 +00:00
Tobias Grosser
db9fb1a6c9 bugpoint: make the number of trim iterations a compile-time constant
Around 10 year ago Chris limited this code to a single iteration by just
dropping a break into the loop body. We now make the number of trim iterations
a compile time constant to be able to play with it and see if this can
improve the bugpoint results. We currently use with '3' still a small and
conservative value, but this can be adjusted in the future, if needed.

I tried to look for a trivial test case, but did not succeed yet.

llvm-svn: 243247
2015-07-26 15:18:45 +00:00
Igor Breger
255a11f9b8 Implemented encoding and intrinsics of the following instructions
vunpckhps/pd, vunpcklps/pd, 
  vpunpcklbw, vpunpckhbw, vpunpcklwd, vpunpckhwd, vpunpckldq, vpunpckhdq, vpunpcklqdq, vpunpckhqdq
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11509

llvm-svn: 243246
2015-07-26 14:41:44 +00:00
Tobias Grosser
5de36d4b9d Fix typo in comment
llvm-svn: 243244
2015-07-26 11:37:05 +00:00
Davide Italiano
5ccfedafe6 [llvm-dwarfump] Don't rely on global state, part 3.
Some tools used to rely on a global static variable to keep track of the 
return value for main(). I changed llvm-cxxdump to use exit(1)
and Rafael shortly after did the same with llvm-readobj. This is
(yet) another step towards the goal.

llvm-svn: 243240
2015-07-26 05:35:59 +00:00
Adam Nemet
1745f79e9b [LAA] Begin moving the logic of generating checks out of addRuntimeCheck
Summary:
The goal is to start moving us closer to the model where
RuntimePointerChecking will compute and store the checks.  Then a client
can filter the check according to its requirements and then use the
filtered list of checks with addRuntimeCheck.

Before the patch, this is all done in addRuntimeCheck.  So the patch
starts to split up addRuntimeCheck while providing the old API under
what's more or less a wrapper now.

The new underlying addRuntimeCheck takes a collection of checks now,
expands the code for the bounds then generates the code for the checks.

I am not completely happy with making expandBounds static because now it
needs so many explicit arguments but I don't want to make the type
PointerBounds part of LAI.  This should get fixed when addRuntimeCheck
is moved to LoopVersioning where it really belongs, IMO.

Audited the assembly diff of the testsuite (including externals).  There
is a tiny bit of assembly churn that is due to the different order the
code for the bounds is expanded now
(MultiSource/Benchmarks/Prolangs-C/bison/conflicts.s and with LoopDist
on 456.hmmer/fast_algorithms.s).

Reviewers: hfinkel

Subscribers: klimek, llvm-commits

Differential Revision: http://reviews.llvm.org/D11205

llvm-svn: 243239
2015-07-26 05:32:14 +00:00
Simon Pilgrim
80ca3df4ed [InstCombine][SSE4A] Standardized references to Length/Width and Index/Start to match AMD docs. NFCI.
llvm-svn: 243226
2015-07-25 20:41:00 +00:00
Simon Pilgrim
a58dfe82c9 [InstCombine] Split off SSE4a tests.
These aren't vector demanded bits tests. More tests to follow.

llvm-svn: 243223
2015-07-25 17:14:01 +00:00
Simon Pilgrim
99e9fed5ff [X86][SSE] Added additional vector sign/zero load extension tests.
llvm-svn: 243216
2015-07-25 14:07:20 +00:00
Simon Pilgrim
a22c2d1bd4 [X86][SSE] Added additional vector sign/zero extension tests.
llvm-svn: 243212
2015-07-25 11:17:35 +00:00
Chen Li
9a4c684e0c [LoopUnswitch] Improve loop unswitch pass to find trivial unswitch conditions more effectively
Summary:
This patch improves trivial loop unswitch. 

The current trivial loop unswitch only checks if loop header's terminator contains a trivial unswitch condition. But if the loop header only has one reachable successor (due to intentionally or unintentionally missed code simplification), we should consider the successor as part of the loop header. Therefore, instead of stopping at loop header's terminator, we should keep traversing its successors within loop until reach a *real* conditional branch or switch (whose condition can not be constant folded). This change will enable a single -loop-unswitch pass to unswitch multiple trivial conditions (unswitch one trivial condition could open opportunity to unswitch another one in the same loop), while the old implementation can unswitch only one per pass. 

Reviewers: reames, broune

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11481

llvm-svn: 243203
2015-07-25 03:21:06 +00:00
Juergen Ributzka
b1788053ee [AArch64][FastISel] Always use an AND instruction when truncating to non-legal types.
When truncating to non-legal types (such as i16, i8 and i1) always use an AND
instruction to mask out the upper bits. This was only done when the source type
was an i64, but not when the source type was an i32.

This commit fixes this and adds the missing i32 truncate tests.

This fixes rdar://problem/21990703.

llvm-svn: 243198
2015-07-25 02:16:53 +00:00
Eric Christopher
e77ef518e8 Fix PPCMaterializeInt to check the size of the integer based on the
extension property we're requesting - zero or sign extended.

This fixes cases where we want to return a zero extended 32-bit -1
and not be sign extended for the entire register. Also updated the
already out of date comment with the current behavior.

llvm-svn: 243192
2015-07-25 00:48:08 +00:00
Eric Christopher
2214db93b4 PPCMaterializeInt should only take a ConstantInt so represent this in the prototype
and fix up all uses.

llvm-svn: 243191
2015-07-25 00:48:06 +00:00
Akira Hatanaka
70eb2824e6 [AArch64] Define subtarget feature "reserve-x18", which is used to decide
whether register x18 should be reserved.

This change is needed because we cannot use a backend option to set
cl::opt "aarch64-reserve-x18" when doing LTO.

Out-of-tree projects currently using cl::opt option "-aarch64-reserve-x18"
to reserve x18 should make changes to add subtarget feature "reserve-x18"
to the IR.

rdar://problem/21529937

Differential Revision: http://reviews.llvm.org/D11463

llvm-svn: 243186
2015-07-25 00:18:31 +00:00
Duncan P. N. Exon Smith
1744eb89b5 DI/Verifier: Fix argument bitrot in DILocalVariable
Add a verifier check that `DILocalVariable`s of tag
`DW_TAG_arg_variable` always have a non-zero 'arg:' field, and those of
tag `DW_TAG_auto_variable` always have a zero 'arg:' field.  These are
the only configurations that are properly understood by the backend.

(Also, fix the bad examples in LangRef and test/Assembler, and fix the
bug in Kaleidoscope Ch8.)

A large number of testcases seem to have bitrotted their way forward
from some ancient version of the debug info hierarchy that didn't have
`arg:` parameters.  If you have out-of-tree testcases that start failing
in the verifier and you don't care enough to get the `arg:` right, you
may have some luck just calling:

    sed -e 's/, arg: 0/, arg: 1/'

or some such, but I hand-updated the ones in tree.

llvm-svn: 243183
2015-07-24 23:59:25 +00:00
Alex Lorenz
810bac62a2 MIR Serialization: Serialize MachineFrameInfo's callee saved information.
This commit serializes the callee saved information from the class
'MachineFrameInfo'. This commit extends the YAML mappings for the fixed and
the ordinary stack objects and adds an optional 'callee-saved-register'
attribute. This attribute is used to serialize the callee save information.

llvm-svn: 243173
2015-07-24 22:22:50 +00:00
Lawrence Hu
a4603977bc Handle loop with negtive induction variable increment
This patch extend LoopReroll pass to hand the loops which
is similar to the following:

      while (len > 1) {
            sum4 += buf[len];
            sum4 += buf[len-1];
            len -= 2;
        }

llvm-svn: 243171
2015-07-24 22:01:49 +00:00
Pete Cooper
e35eeac710 Remove unnecessary null check. NFC.
Since both places which set this variable do so with dyn_cast, and not
dyn_cast_or_null, its impossible to get a nullptr here, so we can remove
the check.

llvm-svn: 243167
2015-07-24 21:38:01 +00:00
Pete Cooper
a8e3702859 Use make_range(rbegin(), rend()) to allow foreach loops. NFC.
Instead of the pattern

for (auto I = x.rbegin(), E = x.end(); I != E; ++I)

we can use make_range to construct the reverse range and iterate using
that instead.

llvm-svn: 243163
2015-07-24 21:13:43 +00:00
Duncan P. N. Exon Smith
44c2fb6ae2 DI: Fix unit tests after r243160
These always empty fields are gone, so don't test that they're empty.

llvm-svn: 243162
2015-07-24 21:11:06 +00:00
Duncan P. N. Exon Smith
6cd024cb07 DI: Remove unnecessary DICompositeTypeBase
Remove unnecessary and confusing common base class for `DICompositeType`
and `DISubroutineType`.

While at a high-level `DISubroutineType` is a sort of composite of other
types, it has no shared code paths, and its fields are completely
disjoint.  This relationship was left over from the old debug info
hierarchy.

llvm-svn: 243160
2015-07-24 20:56:36 +00:00
Duncan P. N. Exon Smith
4e5a043575 DI: Simplify DebugInfoFinder::processType(), NFC
Handle `DISubroutineType` up-front rather than as part of a branch for
`DICompositeTypeBase`.  The only shared code path was looking through
the base type, but `DISubroutineType` can never have a base type.

This also removes the last use of `DICompositeTypeBase`, since we can
strengthen the cast to `DICompositeType`.

llvm-svn: 243159
2015-07-24 20:56:10 +00:00
Duncan P. N. Exon Smith
ace36e4ef0 DI: Remove dead code: getDICompositeType()
llvm-svn: 243158
2015-07-24 20:46:46 +00:00
Duncan P. N. Exon Smith
c92bab5b76 AsmPrinter: Use DICompositeType in updateAcceleratorTables(), NFC
`DISubroutineType` is impossible at this `dyn_cast` site, since we're
only dealing with named types and `DISubroutineType` cannot be named.
Strengthen the `dyn_cast` to `DICompositeType`.

llvm-svn: 243157
2015-07-24 20:45:26 +00:00
Alex Lorenz
3ce3b25440 MIR Serialization: Serialize the simple virtual register allocation hints.
This commit serializes the virtual register allocations hints of type 0.
These hints specify the preferred physical registers for allocations.

llvm-svn: 243156
2015-07-24 20:35:40 +00:00
Duncan P. N. Exon Smith
3845f5fcb9 DI: Remove DIDerivedTypeBase
Remove an unnecessary (and confusing) common subclass for
`DIDerivedType` and `DICompositeType`.  These classes aren't really
related, and even in the old debug info hierarchy, there was a
long-standing FIXME to separate them.

llvm-svn: 243152
2015-07-24 20:16:36 +00:00
Duncan P. N. Exon Smith
fb96dc38ae Verifier: Sink filename check into visitMDCompositeType(), NFC
We really only want to check this for unions and classes (all the other
tags have been ruled out), so simplify the check and move it to the
right place.

llvm-svn: 243150
2015-07-24 19:57:19 +00:00
Duncan P. N. Exon Smith
5e6e476ee4 Verifier: Remove unnecessary references to DW_TAG_subroutine_type, NFC
Remove unnecessary references to `DW_TAG_subroutine_type` in
`visitDICompositeType()` and `visitDIDerivedTypeBase()`, since
`visitDISubroutineType()` doesn't call either of those (and shouldn't,
since subroutine types are really quite special).

llvm-svn: 243149
2015-07-24 19:52:18 +00:00
Duncan P. N. Exon Smith
3915e15fb1 DI: Clarify isUnsignedDIType(), NFC
Refactor `isUnsignedDIType()` to deal with `DICompositeType` explicitly.
Since `DW_TAG_subroutine_type` isn't handled here (the assertions about
tags rule it out), this allows strengthening the `dyn_cast` to
`DIDerivedType`.

Besides making the code clearer, this it removes a use of
`DIDerivedTypeBase`.

llvm-svn: 243148
2015-07-24 19:42:12 +00:00
Pete Cooper
cf8940b509 Add const to some Type* parameters which didn't need to be mutable. NFC.
We were only getting the size of the type which doesn't need to modify
the type.

llvm-svn: 243146
2015-07-24 19:19:26 +00:00
Diego Novillo
0a1bb40d4c Remove unused variable. NFC.
llvm-svn: 243145
2015-07-24 19:18:32 +00:00
Duncan P. N. Exon Smith
0a7f778d94 DI: Strengthen some dyn_casts to DIDerivedType, NFC
The surrounding code proves in both cases that these must be
`DIDerivedType` if they're `DIDerivedTypeBase`, so strengthen the
`dyn_cast`s to the more specific type.

llvm-svn: 243143
2015-07-24 19:17:20 +00:00
Jingyue Wu
344082ead8 Remove the user-count threshold when analyzing read attributes
Summary:
This threshold limited FunctionAttrs ability to prove arguments to be read-only. 
In NVPTX, a specialized instruction ld.global.nc can be used to load memory
with non-coherent texture cache. We notice that in SHOC [1] benchmark, some
function arguments are not marked with readonly because FunctionAttrs reaches
a hardcoded threshold when analysis uses.

Removing this threshold won't cause significant regression in compilation time, because the worst-case time complexity of the algorithm is still O(# of instructions) for each parameter.

Patched by Xuetian Weng.  

[1] https://github.com/vetter/shoc

Reviewers: nlewycky, jingyue, nicholas

Subscribers: nicholas, test, llvm-commits

Differential Revision: http://reviews.llvm.org/D11311

llvm-svn: 243141
2015-07-24 19:05:53 +00:00
Philip Reames
48be953065 [RewriteStatepointsForGC] Adjust naming scheme to be more stable
The names for instructions inserted were previous dependent on iteration order.  By deriving the names from the original instructions, we can avoid instability in tests without resorting to ordered traversals.  It also makes the IR mildly easier to read at large scale.

llvm-svn: 243140
2015-07-24 19:01:39 +00:00
Duncan P. N. Exon Smith
11756822c1 DI: Strengthen block-byref cast to DIDerivedType, NFC
This code is visiting the members of a block-byref, and we know those
are all `DIDerivedType`.  Strengthen the cast.

llvm-svn: 243138
2015-07-24 18:58:32 +00:00