Chris Lattner
208da25af0
Match another form of eqv
...
llvm-svn: 21413
2005-04-21 21:09:11 +00:00
Chris Lattner
8d813a7d51
Handle stores of global address as stores of immediates. Instead of:
...
test1:
movl $N, %eax
movl %eax, G
ret
emit:
test1:
movl $N, G
ret
llvm-svn: 21407
2005-04-21 19:11:03 +00:00
Chris Lattner
706775467b
Handle (store &GV -> mem) as a store immediate. This often occurs for
...
printf format strings and other stuff. Instead of generating this:
movl $l1__2E_str_1, %eax
movl %eax, (%esp)
we now emit:
movl $l1__2E_str_1, (%esp)
llvm-svn: 21406
2005-04-21 19:03:24 +00:00
Reid Spencer
19f70e2fa2
Use the actual uid/gid for defaulting the fields in the archive.
...
llvm-svn: 21405
2005-04-21 17:49:57 +00:00
Chris Lattner
357bbf90af
Fix a bug where we would not promote calls to invokes if they occured in
...
the same block as the setjmp. Thanks to Greg Pettyjohn for noticing this!
llvm-svn: 21403
2005-04-21 16:46:46 +00:00
Reid Spencer
970739e48a
Eliminate calls to system dependent function getuid by using
...
the newly implemented sys::Process::GetCurrentUserId function. Replace
similarly for getgid.
llvm-svn: 21402
2005-04-21 16:15:19 +00:00
Reid Spencer
044ec874d5
Provide an implementation of the GetCurrentUserId and GetCurrentGroupId
...
methods that were recently added to the interface.
llvm-svn: 21401
2005-04-21 16:12:57 +00:00
Chris Lattner
9d2c6a3981
add support for taking and resolving the address of free.
...
llvm-svn: 21396
2005-04-21 16:09:43 +00:00
Chris Lattner
2f96b346b4
Improve doxygen, from part of Evan's patch that didn't apply.
...
llvm-svn: 21394
2005-04-21 16:06:03 +00:00
Chris Lattner
472c891d23
Improve doxygen documentation, patch contributed by Evan Jones!
...
llvm-svn: 21393
2005-04-21 16:04:49 +00:00
Chris Lattner
87fbc1c554
Improve and elimination. On PPC, for:
...
bool %test(int %X) {
%Y = and int %X, 8
%Z = setne int %Y, 0
ret bool %Z
}
we now generate this:
rlwinm r2, r3, 0, 28, 28
srwi r3, r2, 3
instead of this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
I'll leave it to Nate to get it down to one instruction. :)
---------------------------------------------------------------------
llvm-svn: 21391
2005-04-21 06:28:15 +00:00
Chris Lattner
d0a2fda2c6
Fold (x & 8) != 0 and (x & 8) == 8 into (x & 8) >> 3.
...
This turns this PPC code:
rlwinm r2, r3, 0, 28, 28
cmpwi cr7, r2, 8
mfcr r2
rlwinm r3, r2, 31, 31, 31
into this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
Next up, nuking the extra and.
llvm-svn: 21390
2005-04-21 06:12:41 +00:00
Chris Lattner
5ad1e1ebec
Instcombine this:
...
%shortcirc_val = select bool %tmp.1, bool true, bool %tmp.4 ; <bool> [#uses=1]
%tmp.6 = cast bool %shortcirc_val to int ; <int> [#uses=1]
into this:
%shortcirc_val = or bool %tmp.1, %tmp.4 ; <bool> [#uses=1]
%tmp.6 = cast bool %shortcirc_val to int ; <int> [#uses=1]
not this:
%tmp.4.cast = cast bool %tmp.4 to int ; <int> [#uses=1]
%tmp.6 = select bool %tmp.1, int 1, int %tmp.4.cast ; <int> [#uses=1]
llvm-svn: 21389
2005-04-21 05:43:13 +00:00
Chris Lattner
6ce1b109aa
Teach simplifycfg that setcc is cheap and non-trapping, so that it can
...
convert this:
%tmp.1 = seteq int %i, 0 ; <bool> [#uses=1]
br bool %tmp.1, label %shortcirc_done, label %shortcirc_next
shortcirc_next: ; preds = %entry
%tmp.4 = seteq int %j, 0 ; <bool> [#uses=1]
br label %shortcirc_done
shortcirc_done: ; preds = %shortcirc_next, %entry
%shortcirc_val = phi bool [ %tmp.4, %shortcirc_next ], [ true, %entry ] ; <bool> [#uses=1]
to this:
%tmp.1 = seteq int %i, 0 ; <bool> [#uses=1]
%tmp.4 = seteq int %j, 0 ; <bool> [#uses=1]
%shortcirc_val = select bool %tmp.1, bool true, bool %tmp.4 ; <bool> [#uses=1]
... which is later simplified by instcombine into an or.
llvm-svn: 21388
2005-04-21 05:31:13 +00:00
Reid Spencer
4478133ab0
For Bug 543:
...
Standardize the error messages to be in "path: what failed: why" format.
Also attempt to use the correct errno to ThrowErrno in situations where
the errno value is erased by subsequent system calls.
llvm-svn: 21385
2005-04-21 02:50:10 +00:00
Reid Spencer
c3b52b74cd
For Bug 543:
...
Allow the ThrowErrno function to optionally accept an error number
parameter so that callers can specify the error number to be used.
llvm-svn: 21384
2005-04-21 02:30:32 +00:00
Misha Brukman
e096a50cb7
Remove trailing whitespace, patch by Markus Oberhumer.
...
llvm-svn: 21379
2005-04-20 16:05:03 +00:00
Misha Brukman
7f08d0bc03
Add FIXME by Markus Oberhumer from bug 545: not checking for "." in $PATH may
...
result in returning executable files that won't be runnable.
llvm-svn: 21378
2005-04-20 15:42:11 +00:00
Misha Brukman
11854af05f
Do not mark directories as `executable', we only want program files
...
Patch by Markus Oberhumer.
llvm-svn: 21377
2005-04-20 15:33:22 +00:00
Misha Brukman
4113ed635d
Ignore dangling symlinks in getDirectoryContents()
...
Thanks to Markus Oberhumer for the patch!
llvm-svn: 21370
2005-04-20 04:04:07 +00:00
Misha Brukman
1e88051ee8
Initialize fields mode, uid, and gid.
...
Patch by Markus Oberhumer. Thanks!
llvm-svn: 21369
2005-04-20 03:55:35 +00:00
Misha Brukman
e69c186935
Align comments together for consistency
...
llvm-svn: 21368
2005-04-20 03:52:59 +00:00
Chris Lattner
145f1ec0a4
Wrap some long lines.
...
Make IPSCCP strip off dead constant exprs that are using functions, making
them appear as though their address is taken. This allows us to propagate
some more pool descriptors, lowering the overhead of pool alloc.
llvm-svn: 21363
2005-04-19 19:16:19 +00:00
Chris Lattner
64b466c8b1
fix PR549
...
llvm-svn: 21360
2005-04-19 15:27:29 +00:00
Chris Lattner
6b0132b48b
Eliminate a broken transformation, fixing PR548
...
llvm-svn: 21354
2005-04-19 06:04:18 +00:00
Chris Lattner
3d4612c54c
Add completely untested support for mtcrf/mfcrf encoding
...
llvm-svn: 21353
2005-04-19 05:41:52 +00:00
Chris Lattner
e6f861f92c
switch over the rest of the formats that use RC to use isDOT
...
llvm-svn: 21352
2005-04-19 05:21:30 +00:00
Chris Lattner
082ca8fcab
Convert the XForm instrs and XSForm instruction over to use isDOT
...
llvm-svn: 21351
2005-04-19 05:15:18 +00:00
Chris Lattner
3fdfd4e009
Now that the ppc64 and vmx operands of I are always 0, forward substitute
...
them away.
llvm-svn: 21350
2005-04-19 05:05:22 +00:00
Chris Lattner
e6f7713f03
convert over bform and iform instructions
...
llvm-svn: 21349
2005-04-19 05:00:59 +00:00
Chris Lattner
3ae0832381
Convert over DForm and DSForm instructions
...
llvm-svn: 21348
2005-04-19 04:59:28 +00:00
Chris Lattner
4ecf523af4
Convert XLForm and XForm instructions over to use PPC64 when appropriate.
...
llvm-svn: 21347
2005-04-19 04:51:30 +00:00
Chris Lattner
6a2abe8591
Convert XO XS and XFX forms to use isPPC64
...
llvm-svn: 21346
2005-04-19 04:40:07 +00:00
Chris Lattner
3cfa7a24cb
Turn PPC64 and VMX into classes that can be added to instructions instead of
...
bits that must be passed up the inheritance hierarchy. Convert MForm and AForm
instructions over
llvm-svn: 21345
2005-04-19 04:32:54 +00:00
Nate Begeman
3b1c0df702
Next round of PPC CR optimizations. For the following code:
...
int %bar(float %a, float %b, float %c, float %d) {
entry:
%tmp.1 = setlt float %a, %d
%tmp.2 = setlt float %b, %d
%or = or bool %tmp.1, %tmp.2
%tmp.3 = setgt float %c, %d
%tmp.4 = or bool %or, %tmp.3
%tmp.5 = and bool %tmp.4, true
%retval = cast bool %tmp.5 to int
ret int %retval
}
We now emit:
_bar:
.LBB_bar_0: ; entry
fcmpu cr0, f1, f4
fcmpu cr1, f2, f4
cror 0, 0, 4
fcmpu cr1, f3, f4
cror 28, 0, 5
mfcr r2
rlwinm r3, r2, 29, 31, 31
blr
Instead of:
_bar:
.LBB_bar_0: ; entry
fcmpu cr7, f1, f4
mfcr r2
rlwinm r2, r2, 29, 31, 31
fcmpu cr7, f2, f4
mfcr r3
rlwinm r3, r3, 29, 31, 31
or r2, r2, r3
fcmpu cr7, f3, f4
mfcr r3
rlwinm r3, r3, 30, 31, 31
or r3, r2, r3
blr
llvm-svn: 21321
2005-04-18 07:48:09 +00:00
Chris Lattner
4d9c1d06da
silence a bogus warning
...
llvm-svn: 21320
2005-04-18 05:26:21 +00:00
Chris Lattner
188ecaab1d
Fold setcc of MVT::i1 operands into logical operations
...
llvm-svn: 21319
2005-04-18 04:48:12 +00:00
Chris Lattner
72aca1b758
Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c')
...
llvm-svn: 21318
2005-04-18 04:30:45 +00:00
Chris Lattner
e6117e5d4f
Another simple xform
...
llvm-svn: 21317
2005-04-18 04:11:19 +00:00
Chris Lattner
f6f5b23a00
Fold:
...
// (X != 0) | (Y != 0) -> (X|Y != 0)
// (X == 0) & (Y == 0) -> (X|Y == 0)
Compiling this:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
to this:
_bar:
or r2, r3, r4
addic r3, r2, -1
subfe r3, r3, r2
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
llvm-svn: 21316
2005-04-18 03:59:53 +00:00
Chris Lattner
a32c50520c
Make the AND elimination operation recursive and significantly more powerful,
...
eliminating an and for Nate's testcase:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
generating:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r2, r2, r3
rlwinm r3, r2, 0, 31, 31
blr
llvm-svn: 21315
2005-04-18 03:48:41 +00:00
Nate Begeman
85cd65b389
Change codegen for setcc to read the bit directly out of the condition
...
register. Added support in the .td file for the g5-specific variant
of cr -> gpr moves that executes faster, but we currently don't
generate it.
llvm-svn: 21314
2005-04-18 02:43:24 +00:00
Chris Lattner
25a77fc58f
Add support for targets that require stubs for external functions.
...
llvm-svn: 21313
2005-04-18 01:44:27 +00:00
Chris Lattner
a1fd64a073
Handle ExternalSymbol operands in the PPC JIT
...
llvm-svn: 21312
2005-04-18 00:46:10 +00:00
Nate Begeman
ecb5b5c028
Make pattern isel default for ppc
...
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
0 == off
1 == on
2 == target default
llvm-svn: 21309
2005-04-15 22:12:16 +00:00
Chris Lattner
a117cf4215
a new simple pass, which will be extended to be more useful in the future.
...
This pass forward branches through conditions when it can show that the
conditions is either always true or false for a predecessor. This currently
only handles the most simple cases of this, but is successful at threading
across 2489 branches and 65 switch instructions in 176.gcc, which isn't bad.
llvm-svn: 21306
2005-04-15 19:28:32 +00:00
Andrew Lenharth
f091300df2
fix calls
...
llvm-svn: 21303
2005-04-14 17:34:20 +00:00
Andrew Lenharth
23a5d0bba4
a 21264 fix, and fix the operator precidence on an and -> zap check (should fix hundreds of test cases
...
llvm-svn: 21302
2005-04-14 16:24:00 +00:00
Duraid Madina
0c40c548c0
print negative 64 bit immediates as negative numbers, makes things a little
...
easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything
llvm-svn: 21300
2005-04-14 10:08:01 +00:00
Duraid Madina
b8dfae92e9
oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4
...
llvm-svn: 21299
2005-04-14 10:06:35 +00:00
Nate Begeman
604895b03c
Implement multi-way branches through logical ops on condition registers.
...
This can generate considerably shorter code, reducing the size of crafty
by almost 1%. Also fix the printing of mcrf. The code is currently
disabled until it gets a bit more testing, but should work as-is.
llvm-svn: 21298
2005-04-14 09:45:08 +00:00
Nate Begeman
ce63e383b8
Add a couple missing transforms in getSetCC that were triggering assertions
...
in the PPC Pattern ISel
llvm-svn: 21297
2005-04-14 08:56:52 +00:00
Duraid Madina
eb4c15b42c
we have zextloads, not sextloads!
...
llvm-svn: 21296
2005-04-14 08:37:32 +00:00
Nate Begeman
b707ec16b4
Add the necessary support to codegen condition register logical ops with
...
register allocated condition registers. Make sure that the printed
output is gas compatible.
llvm-svn: 21295
2005-04-14 03:20:38 +00:00
Nate Begeman
99a9840b56
Start allocating condition registers. Almost all explicit uses of CR0 are
...
now gone. Next step is to get rid of the remaining ones and then start
allocating bools to CRs where appropriate.
llvm-svn: 21294
2005-04-13 23:15:44 +00:00
Nate Begeman
ae49d52006
Implement the fold shift X, zext(Y) -> shift X, Y at the target level,
...
where it is safe to do so.
llvm-svn: 21293
2005-04-13 22:14:14 +00:00
Nate Begeman
20b3399465
Disbale the broken fold of shift + sz[ext] for now
...
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
always produces zero or one.
llvm-svn: 21291
2005-04-13 21:23:31 +00:00
Chris Lattner
89f7e115a4
fix an infinite loop
...
llvm-svn: 21289
2005-04-13 20:06:29 +00:00
Chris Lattner
475fe85ddf
fix some serious miscompiles on ia64, alpha, and ppc
...
llvm-svn: 21288
2005-04-13 19:53:40 +00:00
Chris Lattner
03d675414e
avoid work when possible, perhaps fix the problem nate and andrew are seeing
...
with != 0 comparisons vanishing.
llvm-svn: 21287
2005-04-13 19:41:05 +00:00
Andrew Lenharth
cbf7a52768
WOW, function calls still seem to work after this.
...
llvm-svn: 21286
2005-04-13 17:17:28 +00:00
Andrew Lenharth
d1fee6d24a
prepare for func call optimization
...
llvm-svn: 21285
2005-04-13 16:19:50 +00:00
Duraid Madina
b9d2d9ac63
* add the shladd instruction
...
* fold left shifts of 1, 2, 3 or 4 bits into adds
This doesn't save much now, but should get a serious workout once
multiplies by constants get converted to shift/add/sub sequences.
Hold on! :)
llvm-svn: 21282
2005-04-13 06:12:04 +00:00
Andrew Lenharth
ec33ab6a2f
add matches for SxADDL and company, as well as simplify the SxADDQ code
...
llvm-svn: 21281
2005-04-13 05:19:55 +00:00
Chris Lattner
9540cf8c7e
Implement expansion of unsigned i64 -> FP.
...
Note that this probably only works for little endian targets, but is enough
to get siod working :)
llvm-svn: 21280
2005-04-13 05:09:42 +00:00
Duraid Madina
67e553e521
* if ANDing with a constant of the form:
...
0x00000..00FFF..FF
^ ^
^ ^
any number of
0's followed by
some number of
1's
then we use dep.z to just paste zeros over the input. For the special
cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
because we're all about readability!!!
that's what it's about!! readability!
*twitch* ;D
llvm-svn: 21279
2005-04-13 04:50:54 +00:00
Andrew Lenharth
510db15268
added all flavors of zap for anding
...
llvm-svn: 21276
2005-04-13 03:47:03 +00:00
Chris Lattner
1a6247ff51
Make expansion of uint->fp cast assert out instead of infinitely recurse.
...
llvm-svn: 21275
2005-04-13 03:42:14 +00:00
Chris Lattner
85c6a7bed0
Fix some mysteriously missing {}'s which cause the miscompilation of
...
Olden/mst, Ptrdist/bc, Obsequi, etc.
llvm-svn: 21274
2005-04-13 03:29:53 +00:00
Chris Lattner
63450e87d9
add back the optimization that Nate added for shl X, (zext_inreg y)
...
llvm-svn: 21273
2005-04-13 02:58:13 +00:00
Chris Lattner
759afe07d7
Oops, remove these too.
...
llvm-svn: 21272
2005-04-13 02:47:57 +00:00
Chris Lattner
8489ac991d
remove one more occurance of this that snuck in
...
llvm-svn: 21271
2005-04-13 02:46:17 +00:00
Chris Lattner
5fdb103328
Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuff
...
like this:
ldah $1,1($31)
lda $1,-1($1)
and $0,$1,$24
instead of this:
zap $0,252,$24
To get this back, the selector should recognize the ISD::AND case where this
happens and emit the appropriate ZAP instruction.
llvm-svn: 21270
2005-04-13 02:43:40 +00:00
Chris Lattner
a2e92e69da
Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing
...
things like this:
mov r9 = 65535;;
and r8 = r8, r9;;
To be emitted instead of:
zxt2 r8 = r8;;
To get this back, the selector for ISD::AND should recognize this case.
llvm-svn: 21269
2005-04-13 02:41:52 +00:00
Chris Lattner
26c7c9150a
Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit
...
andi instructions instead of rlwinm instructions for zero extend, but they
seem like they would take the same time.
llvm-svn: 21268
2005-04-13 02:40:26 +00:00
Chris Lattner
f25fefd9cf
Z_E_I is gone
...
llvm-svn: 21267
2005-04-13 02:39:05 +00:00
Chris Lattner
4f188f949c
Instead of making ZERO_EXTEND_INREG nodes, use the helper method in
...
SelectionDAG to do the job with AND. Don't legalize Z_E_I anymore as
it is gone
llvm-svn: 21266
2005-04-13 02:38:47 +00:00
Chris Lattner
bce0030a88
Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodes
...
instead. OVerall, this increases the amount of folding we can do.
llvm-svn: 21265
2005-04-13 02:38:18 +00:00
Nate Begeman
38d8248a9e
Fold shift x, [sz]ext(y) -> shift x, y
...
llvm-svn: 21262
2005-04-12 23:32:28 +00:00
Nate Begeman
a56527ea5f
Fold shift by size larger than type size to undef
...
Make llvm undef values generate ISD::UNDEF nodes
llvm-svn: 21261
2005-04-12 23:12:17 +00:00
Nate Begeman
79c8b8fd1c
Implement setcc op, -1 sequences
...
Remove dead setcc op, 0 sequences
Coming later: generalization of op, imm
llvm-svn: 21260
2005-04-12 21:22:28 +00:00
Chris Lattner
58f72ab722
promote extload i1 -> extload i8
...
llvm-svn: 21258
2005-04-12 20:30:10 +00:00
Chris Lattner
7c88662870
add an argument to allow avoiding deleting phi nodes.
...
llvm-svn: 21255
2005-04-12 18:52:14 +00:00
Chris Lattner
ee06161a63
Get rid of this for_each loop
...
llvm-svn: 21253
2005-04-12 18:51:33 +00:00
Duraid Madina
39fcec1541
* OK, after changing to use liveIn/liveOut instead of IDEFs,
...
to avoid redundant mov out3=r44 type instructions, we need to
tell the register allocator the truth about out? registers.
FIXME: unfortunately, since the list of allocatable registers is immutable,
we can't simply 'delete r127' from the allocation order, say, if 'out0' is
used. The only correct thing we can do is have a linear order of regs:
out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127
and slide a 'window' of 96 registers along this line, depending on how many
of the out? regs a function actually uses. The only downside of this is
that the out? registers will be allocated _first_, which makes the
resulting assembly ugly. :( Note this in the README. Hope this gets fixed
soon. :) (note the 3rd person speech there)
llvm-svn: 21252
2005-04-12 18:42:59 +00:00
Andrew Lenharth
174d44f223
Get rid of idefs for arguments (oops)
...
llvm-svn: 21251
2005-04-12 17:47:57 +00:00
Andrew Lenharth
1b8a8331c9
Get rid of idefs for arguments
...
llvm-svn: 21250
2005-04-12 17:35:16 +00:00
Chris Lattner
be2dceff48
Put out* into the allocation order, allowing the register allocator to
...
coallesce moves into outgoing args.
llvm-svn: 21249
2005-04-12 15:12:51 +00:00
Chris Lattner
37712352c0
Make sure to realize that calls use their argument regs
...
llvm-svn: 21248
2005-04-12 15:12:19 +00:00
Duraid Madina
2821f99f19
stop emitting IDEFs for args - change to using liveIn/liveOut
...
llvm-svn: 21247
2005-04-12 14:54:44 +00:00
Nate Begeman
f96b42f1b6
Initial support for allocation condition registers
...
llvm-svn: 21246
2005-04-12 07:04:16 +00:00
Chris Lattner
f8d9224d8c
Fix a crash analyzing MultiSource/Benchmarks/MallocBench/gs
...
llvm-svn: 21245
2005-04-12 03:59:27 +00:00
Chris Lattner
cfc7093ca6
Remove some redundant checks, add a couple of new ones. This allows us to
...
compile this:
int foo (unsigned long a, unsigned long long g) {
return a >= g;
}
To:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
cmpl $0, 12(%esp)
sete %cl
andb %al, %cl
movzbl %cl, %eax
ret
instead of:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
movzbw %al, %cx
movl 12(%esp), %edx
cmpl $0, %edx
sete %al
movzbw %al, %ax
cmpl $0, %edx
cmove %cx, %ax
movzbl %al, %eax
ret
llvm-svn: 21244
2005-04-12 02:54:39 +00:00
Chris Lattner
61f353dbdc
Emit comparisons against the sign bit better. Codegen this:
...
bool %test1(long %X) {
%A = setlt long %X, 0
ret bool %A
}
like this:
test1:
cmpl $0, 8(%esp)
setl %al
movzbl %al, %eax
ret
instead of:
test1:
movl 8(%esp), %ecx
cmpl $0, %ecx
setl %al
movzbw %al, %ax
cmpl $0, 4(%esp)
setb %dl
movzbw %dl, %dx
cmpl $0, %ecx
cmove %dx, %ax
movzbl %al, %eax
ret
llvm-svn: 21243
2005-04-12 02:19:10 +00:00
Chris Lattner
6cbbb55967
Emit long comparison against -1 better. Instead of this (x86):
...
test2:
movl 8(%esp), %eax
notl %eax
movl 4(%esp), %ecx
notl %ecx
orl %eax, %ecx
cmpl $0, %ecx
sete %al
movzbl %al, %eax
ret
or this (PPC):
_test2:
nor r2, r4, r4
nor r3, r3, r3
or r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
Emit this:
test2:
movl 8(%esp), %eax
andl 4(%esp), %eax
cmpl $-1, %eax
sete %al
movzbl %al, %eax
ret
or this:
_test2:
.LBB_test2_0: ;
and r2, r4, r3
cmpwi cr0, r2, -1
li r3, 1
li r2, 0
beq .LBB_test2_2 ;
.LBB_test2_1: ;
or r3, r2, r2
.LBB_test2_2: ;
blr
it seems like the PPC isel could do better for R32 == -1 case.
llvm-svn: 21242
2005-04-12 01:46:05 +00:00
Chris Lattner
37534d43d0
canonicalize x <u 1 -> x == 0. On this testcase:
...
unsigned long long g;
unsigned long foo (unsigned long a) {
return (a >= g) ? 1 : 0;
}
It changes the ppc code from:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cmplwi cr0, r4, 1
li r3, 1
li r5, 0
blt .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r3, r5, r5
.LBB_foo_4: ; entry
cmpwi cr0, r4, 0
beq .LBB_foo_6 ; entry
.LBB_foo_5: ; entry
or r2, r3, r3
.LBB_foo_6: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
to:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cntlzw r3, r4
srwi r3, r3, 5
cmpwi cr0, r4, 0
beq .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r2, r3, r3
.LBB_foo_4: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
llvm-svn: 21241
2005-04-12 00:28:49 +00:00
Nate Begeman
a154deaaff
Implement bitfield clears
...
Implement divide by negative power of two
llvm-svn: 21240
2005-04-12 00:10:02 +00:00
Nate Begeman
f31b58f145
Update PPC readme. Remove things that are done or aren't ppc specific
...
llvm-svn: 21232
2005-04-11 20:48:57 +00:00
Chris Lattner
7f0f0854fa
Teach the dag mechanism that this:
...
long long test2(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) + B;
}
is equivalent to this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
Now they are both codegen'd to this on ppc:
_test2:
blr
or this on x86:
test2:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
llvm-svn: 21231
2005-04-11 20:29:59 +00:00
Chris Lattner
71f3d4ce57
Fix expansion of shifts by exactly NVT bits on arch's (like X86) that have
...
masking shifts.
This fixes the miscompilation of this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
into this:
test1:
movl 4(%esp), %edx
movl %edx, %eax
orl 8(%esp), %eax
ret
allowing us to generate this instead:
test1:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
llvm-svn: 21230
2005-04-11 20:08:52 +00:00