1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
Commit Graph

10950 Commits

Author SHA1 Message Date
Chris Lattner
768b31fc77 Remove unneeded #include
llvm-svn: 11978
2004-02-29 05:15:56 +00:00
Chris Lattner
8b7ac81d2e int64_t -> int
llvm-svn: 11977
2004-02-29 05:07:02 +00:00
Chris Lattner
34977159b3 Continue Alkis's int64_t cleanup. This makes all of the immediate related
methods take an int or unsigned value instead of int64_t.

Also, add an 'addImm' method to the MachineInstrBuilder class, because the
fact that the hardware sign or zero extends it does not/should not matter
to the code generator.  Once the old sparc backend is removed the difference
can be eliminated.

llvm-svn: 11976
2004-02-29 05:06:49 +00:00
Chris Lattner
85dd74a158 Add BuildMI variants that take a MBB::iterator
llvm-svn: 11975
2004-02-29 04:55:28 +00:00
Alkis Evlogimenos
0f96b44e0e Use correct template for ADC instruction with memory operands.
llvm-svn: 11974
2004-02-29 02:18:17 +00:00
Chris Lattner
800f720e7b Add an instruction selector capable of selecting 'ret void'
llvm-svn: 11973
2004-02-29 00:27:00 +00:00
Alkis Evlogimenos
6815402082 SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them
to denote this fact.

llvm-svn: 11972
2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
e8dac99a43 Floating point loads/stores act on memory operands. Rename them to
denote this fact.

llvm-svn: 11971
2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
1d71a15be9 Rename instruction templates to be easier to the human eye to
parse. The name is now I (operand size)*. For example:

Im32 -> instruction with 32-bit memory operands.

Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
          operands.

llvm-svn: 11970
2004-02-28 23:09:03 +00:00
Alkis Evlogimenos
6038a89025 Uncomment instructions that take both an immediate and a memory
operand but their sizes differ.

llvm-svn: 11969
2004-02-28 22:06:59 +00:00
Brian Gaeke
7d5feb2b33 Fix my sloppiness
llvm-svn: 11968
2004-02-28 22:06:03 +00:00
Alkis Evlogimenos
f208a0fd81 Each instruction now has both an ImmType and a MemType. This describes
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).

llvm-svn: 11967
2004-02-28 22:02:05 +00:00
Brian Gaeke
d551a8b5fe Fix typo in comment
llvm-svn: 11966
2004-02-28 21:55:18 +00:00
Chris Lattner
ece9d747f2 Add a testcase for switch instruction induction
llvm-svn: 11965
2004-02-28 21:30:39 +00:00
Chris Lattner
a854ddd528 Implement switch->br and br->switch folding by ripping out the switch->switch
and br->br code and generalizing it.  This allows us to compile code like this:

int test(Instruction *I) {
  if (isa<CastInst>(I))
    return foo(7);
  else if (isa<BranchInst>(I))
    return foo(123);
  else if (isa<UnwindInst>(I))
    return foo(1241);
  else if (isa<SetCondInst>(I))
    return foo(1);
  else if (isa<VAArgInst>(I))
    return foo(42);
  return foo(-1);
}

into:

int %_Z4testPN4llvm11InstructionE("struct.llvm::Instruction"* %I) {
entry:
        %tmp.1.i.i.i.i.i.i.i = getelementptr "struct.llvm::Instruction"* %I, long 0, ubyte 4            ; <uint*> [#uses=1]
        %tmp.2.i.i.i.i.i.i.i = load uint* %tmp.1.i.i.i.i.i.i.i          ; <uint> [#uses=2]
        %tmp.2.i.i.i.i.i.i = seteq uint %tmp.2.i.i.i.i.i.i.i, 27                ; <bool> [#uses=0]
        switch uint %tmp.2.i.i.i.i.i.i.i, label %endif.0 [
                 uint 27, label %then.0
                 uint 2, label %then.1
                 uint 5, label %then.2
                 uint 14, label %then.3
                 uint 15, label %then.3
                 uint 16, label %then.3
                 uint 17, label %then.3
                 uint 18, label %then.3
                 uint 19, label %then.3
                 uint 32, label %then.4
        ]
...

As well as handling the cases in 176.gcc and many other programs more effectively.

llvm-svn: 11964
2004-02-28 21:28:10 +00:00
Chris Lattner
3583890ab7 Change this so that LLC actually tries to run the code generator, though it will
immediately abort due to lack of an instruction selector. :)

llvm-svn: 11963
2004-02-28 20:21:45 +00:00
Chris Lattner
ab9a9c4119 Add a hook to run with the V8 target, though it doesn't currently work. Also
mark the PPC backend as experimental

llvm-svn: 11962
2004-02-28 19:55:16 +00:00
Chris Lattner
38ae1362de Add hook for V8 target
llvm-svn: 11961
2004-02-28 19:54:16 +00:00
Chris Lattner
529a354ea4 SparcV8 now builds.
llvm-svn: 11960
2004-02-28 19:54:00 +00:00
Chris Lattner
5effdb67b7 fine grainify namespacification
llvm-svn: 11959
2004-02-28 19:53:18 +00:00
Chris Lattner
3852b0c3b8 Finegrainify namespacification
llvm-svn: 11958
2004-02-28 19:52:49 +00:00
Chris Lattner
88268605ec Tab completion is our friend.
llvm-svn: 11957
2004-02-28 19:45:39 +00:00
Chris Lattner
013aa47975 Clean up rules
llvm-svn: 11956
2004-02-28 19:43:40 +00:00
Chris Lattner
d2bb7e91b0 Bring this directory into "it actually compiles" land
llvm-svn: 11955
2004-02-28 19:37:18 +00:00
Chris Lattner
3f70429d28 Fix multiple inclusion problem
llvm-svn: 11954
2004-02-28 19:31:32 +00:00
Chris Lattner
69ab9e0840 if there is already a prototype for malloc/free, use it, even if it's incorrect.
Do not just inject a new prototype.

llvm-svn: 11951
2004-02-28 18:51:45 +00:00
Chris Lattner
9f35c413f5 Do not remove an active template argument even if the superclass had one of the
same name

llvm-svn: 11950
2004-02-28 17:41:48 +00:00
Chris Lattner
243e1df469 fix a bug in the testcase
llvm-svn: 11949
2004-02-28 17:33:21 +00:00
Chris Lattner
7d89f8837d Ignore X = X assignments that was causing Alkis's rewrite of X86.td to crash
tblgen.

llvm-svn: 11948
2004-02-28 17:31:28 +00:00
Chris Lattner
fbca3a0161 new testcase for a tblgen bug that alkis ran into
llvm-svn: 11947
2004-02-28 16:43:44 +00:00
Chris Lattner
07aebf1c49 Assert instead of going into an infinite loop!
llvm-svn: 11946
2004-02-28 16:31:53 +00:00
Brian Gaeke
a0f42f5936 ELF constants and data structures.
llvm-svn: 11945
2004-02-28 06:26:20 +00:00
Alkis Evlogimenos
977dbaadf7 Do not generate instructions with mismatched memory/immediate sized
operands. The X86 backend doesn't handle them properly right now.

llvm-svn: 11944
2004-02-28 06:01:43 +00:00
Chris Lattner
0cb585f878 new testcase for intrinsic folding
llvm-svn: 11943
2004-02-28 05:28:42 +00:00
Chris Lattner
4cb08f39e9 The instruction combining pass removes dead instructions, there is no need
to run the die pass after it.

llvm-svn: 11942
2004-02-28 05:26:06 +00:00
Chris Lattner
7872171767 Rename AddUsesToWorkList -> AddUsersToWorkList, as that is what it does.
Create a new AddUsesToWorkList method
optimize memmove/set/cpy of zero bytes to a noop.

llvm-svn: 11941
2004-02-28 05:22:00 +00:00
Chris Lattner
192d8413d3 Turn 'free null' into nothing
llvm-svn: 11940
2004-02-28 04:57:37 +00:00
Misha Brukman
0b846ae65c Right, it's really Extractor, not Extraction.
llvm-svn: 11939
2004-02-28 03:37:58 +00:00
Misha Brukman
13b5b048fb New Function-level transformation utils.
llvm-svn: 11938
2004-02-28 03:33:30 +00:00
Misha Brukman
1ddb180929 Add the prototype for the LoopExtractor Pass.
llvm-svn: 11937
2004-02-28 03:33:17 +00:00
Misha Brukman
f14fbb1a0b A pass that uses the generic CodeExtractor to rip out *every* loop in every
function, as long as the loop isn't the only one in that function. This should
help debugging passes easier with BugPoint.

llvm-svn: 11936
2004-02-28 03:33:01 +00:00
Misha Brukman
26e90f8776 A generic code extractor: given a list of BasicBlocks, it will rip them out into
a new function, taking care of inputs and outputs.

llvm-svn: 11935
2004-02-28 03:26:20 +00:00
Misha Brukman
26992f4a8c Two testcases for loops: one with outputs, one without.
llvm-svn: 11934
2004-02-28 03:20:41 +00:00
Alkis Evlogimenos
84f00e93f7 Further comment updates.
llvm-svn: 11933
2004-02-28 03:20:31 +00:00
Alkis Evlogimenos
edbe362160 Update comments.
llvm-svn: 11932
2004-02-28 03:12:31 +00:00
Alkis Evlogimenos
0f91ce52a0 My previous commit broke the jit. The shift instructions always take
an 8-bit immediate. So mark the shifts that take immediates as taking
an 8-bit argument. The rest with the implicit use of CL are marked
appropriately.

A bug still exists:

def SHLDmri32  : I2A8 <"shld", 0xA4, MRMDestMem>, TB;           // [mem32] <<= [mem32],R32 imm8

The immediate in the above instruction is 8-bit but the memory
reference is 32-bit. The printer prints this as an 8-bit reference
which confuses the assembler. Same with SHRDmri32.

llvm-svn: 11931
2004-02-28 02:56:26 +00:00
Brian Gaeke
6afa0813d2 Turn off the SparcV9MachineCodeDestructionPass for now, because it's buggy
llvm-svn: 11930
2004-02-27 21:15:40 +00:00
Brian Gaeke
0e74ff91a0 Correct DestroyMachineFunction's getPassName
llvm-svn: 11929
2004-02-27 21:01:14 +00:00
Chris Lattner
9e71c09ff5 Only clone global nodes between graphs if both graphs have the global.
llvm-svn: 11928
2004-02-27 20:05:15 +00:00
Chris Lattner
138a7dfb62 ADD MORE FUNCTIONS!
llvm-svn: 11927
2004-02-27 20:04:48 +00:00