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Commit Graph

139961 Commits

Author SHA1 Message Date
Ekaterina Romanova
93cf7ae98d Reverting back r285355: "Update .debug_line section version information to match DWARF version", while I'm investigating a test failure.
llvm-svn: 285362
2016-10-27 23:20:19 +00:00
Vedant Kumar
2ffcbfec2c [Coverage] Darwin: Move __llvm_covmap from __DATA to __LLVM_COV
Programs with very large __llvm_covmap sections may fail to link on
Darwin because because of out-of-range 32-bit RIP relative references.
It isn't possible to work around this by using the large code model
because it isn't supported on Darwin. One solution is to move the
__llvm_covmap section past the end of the __DATA segment.

=== Testing ===

In addition to check-{llvm,clang,profile}, I performed a link test on a
simple object after injecting ~4GB of padding into __llvm_covmap:

  @__llvm_coverage_padding = internal constant [4000000000 x i8] zeroinitializer, section "__LLVM_COV,__llvm_covmap", align 8

(This test is too expensive to check-in.)

=== Backwards Compatibility ===

This patch should not pose any backwards-compatibility concerns. LLVM
is expected to scan all of the sections in a binary for __llvm_covmap,
so changing its segment shouldn't affect anything. I double-checked this
by loading coverage produced by an unpatched compiler with a patched
llvm-cov.

Suggested by Nick Kledzik.

llvm-svn: 285360
2016-10-27 23:17:51 +00:00
Tom Stellard
6924e02442 AMDGPU/SI: Handle hazard with > 8 byte VMEM stores
Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D25577

llvm-svn: 285359
2016-10-27 23:05:31 +00:00
Tim Shen
f0b97e5679 Reapply r285351 "[APFloat] Add DoubleAPFloat mode to APFloat. NFC." with
a workaround for old clang.

llvm-svn: 285358
2016-10-27 22:52:40 +00:00
Ekaterina Romanova
cc4c35bbfd Update .debug_line section version information to match DWARF version.
In the past the compiler always emitted .debug_line version 2, though some opcodes from DWARF 3 (e.g. DW_LNS_set_prologue_end, DW_LNS_set_epilogue_begin or DW_LNS_set_isa) and from DWARF 4 could be emitted by the compiler. 

This patch changes version information of .debug_line to exactly match the DWARF version. For .debug_line version 4, a new field maximum_operations_per_instruction is emitted. 

Differential Revision: https://reviews.llvm.org/D16697

llvm-svn: 285355
2016-10-27 22:37:25 +00:00
Tim Shen
a7567d1c21 Revert "[APFloat] Add DoubleAPFloat mode to APFloat. NFC."
This reverts r285351, since it breaks the build.

llvm-svn: 285354
2016-10-27 21:54:29 +00:00
Kostya Serebryany
a42d1cae62 [libFuzzer] enable use_cmp by default
llvm-svn: 285353
2016-10-27 21:44:37 +00:00
Tim Shen
e9060d8799 [APFloat] Add DoubleAPFloat mode to APFloat. NFC.
Summary:
This patch adds DoubleAPFloat mode to APFloat.

Now, an APFloat with semantics PPCDoubleDouble will have DoubleAPFloat layout
(APFloat.U.Double), which contains two underlying APFloats as
PPCDoubleDoubleImpl and IEEEdouble semantics. Currently the IEEEdouble APFloat
is not used, and the first APFloat behaves exactly the same before this change.

This patch consists of three kinds of logics:
1) Construction and destruction of APFloat. Now the ctors, dtor, assign
   opertors and factory functions construct different underlying layout
   based on the semantics passed in.
2) s/IEEE/getIEEE()/ for normal, lifetime-unrelated computation functions.
   These functions only access Floats[0] in DoubleAPFloat, which is the
   same as today's semantic.
3) A "Double dispatch" function, APFloat::convert. Converting between two
   different layouts requires appropriate logic.

Neither of these change the external behavior.

Reviewers: hfinkel, kbarton, echristo, iteratee

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D25977

llvm-svn: 285351
2016-10-27 21:39:51 +00:00
Peter Collingbourne
5c2a0fc93d BitcodeReader: Require clients to read the block info block at most once.
This change makes it the client's responsibility to call ReadBlockInfoBlock()
at most once. This is in preparation for a future change that will allow
there to be multiple block info blocks.

See also: http://lists.llvm.org/pipermail/llvm-dev/2016-October/106512.html

Differential Revision: https://reviews.llvm.org/D26016

llvm-svn: 285350
2016-10-27 21:39:28 +00:00
Kyle Butt
2446e56186 CodeGen: Handle missed case of block removal during BlockPlacement.
There is a use after free bug in the existing code. Loop layout selects
a preferred exit block, and then lays out the loop. If this block is
removed during layout, it needs to be invalidated to prevent a use after
free.

llvm-svn: 285348
2016-10-27 21:37:20 +00:00
Sanjay Patel
fc59e659b5 [InstCombine] fix foldSPFofSPF() to handle vector splats
llvm-svn: 285345
2016-10-27 21:19:40 +00:00
Kostya Serebryany
20e3021a2f [libFuzzer] docs: update the examples
llvm-svn: 285344
2016-10-27 21:03:48 +00:00
Kevin Enderby
bf2ad1b205 Another additional error check for invalid Mach-O files for the
obsolete load commands.

Again the philosophy of the error checking in libObject for
Mach-O files, the idea behind the checking is that we never
will return a Mach-O file out of libObject that contains unknown
things the library code can’t operate on.  So known obsolete
load commands will cause a hard error.

Also to make things clear I have added comments to the
values and structures in Support/Mach-O.h and
Support/MachO.def as to what is obsolete.

As noted in a TODO in the code, there may need to be a
non-default mode to allow some unknown values for well
structured Mach-O files with things like unknown load
load commands.  So things like using an old lldb on a newer
Mach-O file could still provide some limited functionality.

llvm-svn: 285342
2016-10-27 20:59:10 +00:00
Sanjay Patel
01ffcf5a12 [InstCombine] add vector tests for foldSPFofSPF to show missing folds
llvm-svn: 285340
2016-10-27 20:51:03 +00:00
Kostya Serebryany
cbdf545a7b [libFuzzer] docs: separate section for fuzz target
llvm-svn: 285339
2016-10-27 20:45:35 +00:00
Tom Stellard
f628d64420 AMDGPU/SI: Handle s_setreg hazard in GCNHazardRecognizer
Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25528

llvm-svn: 285338
2016-10-27 20:39:09 +00:00
Kostya Serebryany
e9cdf622b0 [libFuzzer] remove large examples from the libFuzzer docs and link to the libFuzzer tutorial instead; also fix a build error in another file
llvm-svn: 285337
2016-10-27 20:14:03 +00:00
Sanjay Patel
0e5308d054 [InstCombine] auto-generate checks for min/max tests
llvm-svn: 285336
2016-10-27 19:54:15 +00:00
Ehsan Amiri
b2ddc31073 [PPC] Adding the removed testcase again
This testcase was originally part of r284995, but I put it in a wrong directory.
So I removed it. Before adding it back I did some small enhancements. Also I
changed the assertions a little bit, to take into account the impact of some
changes performed since code review is done.

This is similar to changes done for another testcase in the original commit.
See: https://reviews.llvm.org/D23614#577749
Basically for instead of vxor we now generate xxlxor in some cases, which is
better.

llvm-svn: 285333
2016-10-27 19:10:09 +00:00
Haicheng Wu
78fd509204 [LoopUnroll] Check partial unrolling is enabled before initialization. NFC.
Differential Revision: https://reviews.llvm.org/D23891

llvm-svn: 285330
2016-10-27 18:40:02 +00:00
Simon Pilgrim
68d206a9d2 [X86][AVX512] Fix MUL v8i64 costs on non-AVX512DQ targets
llvm-svn: 285329
2016-10-27 18:32:06 +00:00
Sanjay Patel
6b6d270c74 [InstCombine] handle simple vector integer constants in IsFreeToInvert
llvm-svn: 285318
2016-10-27 17:30:50 +00:00
Simon Pilgrim
02a2816235 [X86][AVX512DQ] Move v2i64 and v4i64 MUL lowering to tablegen
As suggested by @igorb on D26011

llvm-svn: 285313
2016-10-27 17:07:40 +00:00
Saleem Abdulrasool
5d2e860995 ARM: ensure that the Windows DBZ check is in range
The Windows ARM target expects the compiler to emit a division-by-zero check.
The check would use the form of:

    cmp r?, #0
    cbz .Ltrap
    b .Lbody
  .Lbody:
    ...
  .Ltrap:
    udf #249 @ __brkdiv0

This works great most of the time.  However, if the body of the function is
greater than 127 bytes, the branch target limitation of cbz becomes an issue.
This occurs in the unoptimized code generation cases sometimes (like in
compiler-rt).

Since this is a matter of correctness, possibly pay a small penalty instead.  We
now form this slightly differently:

    cbnz .Lbody
    udf #249 @ __brkdiv0
  .Lbody:
    ...

The positive case is through the branch instead of being the next instruction.
However, because of the basic block layout, the negated branch is going to be
a short distance always (2 bytes away, after the inserted __brkdiv0).

The new t__brkdiv0 instruction is required to explicitly mark the instruction as
a terminator as the generic UDF instruction is not a terminator.

Addresses PR30532!

llvm-svn: 285312
2016-10-27 16:59:22 +00:00
Greg Clayton
c59e887dd6 Switch all DWARF variables for tags, attributes and forms over to use the llvm::dwarf enumerations instead of using raw uint16_t values. This allows easier debugging as users can see the values of the enumerations in the variables view that will show the enumeration string instead of just a number.
https://reviews.llvm.org/D26013

llvm-svn: 285309
2016-10-27 16:32:04 +00:00
Dehao Chen
ecb41605f5 Add Loop Sink pass to reverse the LICM based of basic block frequency.
Summary: LICM may hoist instructions to preheader speculatively. Before code generation, we need to sink down the hoisted instructions inside to loop if it's beneficial. This pass is a reverse of LICM: looking at instructions in preheader and sinks the instruction to basic blocks inside the loop body if basic block frequency is smaller than the preheader frequency.

Reviewers: hfinkel, davidxl, chandlerc

Subscribers: anna, modocache, mgorny, beanz, reames, dberlin, chandlerc, mcrosier, junbuml, sanjoy, mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D22778

llvm-svn: 285308
2016-10-27 16:30:08 +00:00
Vasileios Kalintiris
119c41482e [mips] Do not allow -opt-bisect-limit to skip the PIC call optimization pass.
r282428 added the MipsOptimizePICCall as an opt-in pass that can be
skipped when using the -opt-bisect-limit option. However, this pass is
needed because it generates code that conforms to the o32 ABI
specification by using the $t9 register for PIC calls with JALR
instructions.

This bug was exposed by the fact that skipFunction() also checks for
the "optnone" attribute. This caused functions with that attribute to
break the requirements of the o32 ABI.

llvm-svn: 285305
2016-10-27 15:50:36 +00:00
Simon Pilgrim
268d797e5a [X86][AVX512DQ] Improve lowering of MUL v2i64 and v4i64
With DQI but without VLX, lower v2i64 and v4i64 MUL operations with v8i64 MUL (vpmullq).

Updated cost table accordingly.

Differential Revision: https://reviews.llvm.org/D26011

llvm-svn: 285304
2016-10-27 15:27:00 +00:00
Sanjay Patel
87ccc5a816 [ValueTracking] fix matchSelectPattern to allow vector splat folds of min/max/abs/nabs
llvm-svn: 285303
2016-10-27 15:26:10 +00:00
Benjamin Kramer
49bf5a5fa4 Remove duplicated default move ctors/move assign. No functional change.
llvm-svn: 285302
2016-10-27 15:23:44 +00:00
Sanjay Patel
e121eccc6f [InstCombine] add tests for missing folds of vector abs/nabs/min/max
llvm-svn: 285299
2016-10-27 15:02:45 +00:00
Bjorn Pettersson
bbb6863e88 Fix memory issue in AttrBuilder::removeAttribute uses.
Summary:
Found when running Valgrind.

This removes two unnecessary assignments when using
AttrBuilder::removeAttribute.

AttrBuilder::removeAttribute returns a reference to the object.
As the LHSes were the same as the callees, the assignments
resulted in memcpy calls where dst = src.

Commited on behalf-of: dstenb (David Stenberg)

Reviewers: mkuper, rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25460

llvm-svn: 285298
2016-10-27 14:48:09 +00:00
Krzysztof Parzyszek
e14110d47f [Hexagon] Do not expand ISD::SELECT for HVX vectors
llvm-svn: 285297
2016-10-27 14:30:16 +00:00
Simon Pilgrim
e1bf270f66 [DAGCombiner] Add vector demanded elements support to computeKnownBits
Currently computeKnownBits returns the common known zero/one bits for all elements of vector data, when we may only be interested in one/some of the elements.

This patch adds a DemandedElts argument that allows us to specify the elements we actually care about. The original computeKnownBits implementation calls with a DemandedElts demanding all elements to match current behaviour. Scalar types set this to 1.

The approach was found to be easier than trying to add a per-element known bits solution, for a similar usefulness given the combines where computeKnownBits is typically used.

I've only added support for a few opcodes so far (the ones that have proven straightforward to test), all others will default to demanding all elements but can be updated in due course.

DemandedElts support could similarly be added to computeKnownBitsForTargetNode in a future commit.

Differential Revision: https://reviews.llvm.org/D25691

llvm-svn: 285296
2016-10-27 14:29:28 +00:00
Sanjay Patel
6941aa6e91 [InstCombine] auto-generate better checks; NFC
llvm-svn: 285293
2016-10-27 13:55:37 +00:00
George Rimar
df30d629a9 Revert r285285 "[Object/ELF] - Fixed behavior when SectionHeaderTable->sh_size is too large."
It broke BB.

llvm-svn: 285288
2016-10-27 12:18:50 +00:00
Alexey Bataev
b6c0260e86 [SLP] Fix for PR30626: Compiler crash inside SLP Vectorizer.
After successfull horizontal reduction vectorization attempt for PHI node
vectorizer tries to update root binary op by combining vectorized tree
and the ReductionPHI node. But during vectorization this ReductionPHI
can be vectorized itself and replaced by the `undef` value, while the
instruction itself is marked for deletion. This 'marked for deletion'
PHI node then can be used in new binary operation, causing "Use still
stuck around after Def is destroyed" crash upon PHI node deletion.

Also the test is fixed to make it perform actual testing.

Differential Revision: https://reviews.llvm.org/D25671

llvm-svn: 285286
2016-10-27 12:02:28 +00:00
George Rimar
2f2500e562 [Object/ELF] - Fixed behavior when SectionHeaderTable->sh_size is too large.
Elf.h already has code checking that section table does not go past end of file.
Problem is that this check may not work on values greater than UINT64_MAX / Header->e_shentsize
because of calculation overflow.

Parch fixes the issue.

Differential revision: https://reviews.llvm.org/D25432

llvm-svn: 285285
2016-10-27 11:50:04 +00:00
George Rimar
9ee5fd9330 [Object/ELF] - Do not allow overflow when checking section size/offset.
Overflow was the reason of incorrect passing the check,
patch fixes the case.

Differentail revision: https://reviews.llvm.org/D25514

llvm-svn: 285284
2016-10-27 11:44:56 +00:00
George Rimar
f764591abe [Object/ELF] - Do not crash if string table sh_size is equal to zero.
Revealed using "id_000038,sig_11,src_000015,op_havoc,rep_16" from PR30540,
when sh_size was 0, crash happened.

Differential revision: https://reviews.llvm.org/D25091

llvm-svn: 285282
2016-10-27 11:41:57 +00:00
Sam Parker
cc86b4dc71 [ARM] Add newline char to test.
Missed a newline in the previous commit.

Differential Revision: https://reviews.llvm.org/D26027

llvm-svn: 285280
2016-10-27 10:43:02 +00:00
Sam Parker
5118fae0d2 [ARM] Predicate UMAAL selection on hasDSP.
UMAAL is a DSP instruction and it is not available on thumbv7m
(Cortex-M3) and thumbv6m (Cortex-M0+1) targets. Also fix wrong
CHECK prefix in longMAC.ll test.

Patch by Vadzim Dambrouski.

Differential Revision: https://reviews.llvm.org/D25890

llvm-svn: 285278
2016-10-27 09:47:10 +00:00
Dylan McKay
de46f31ff7 [AVR] Generate all of the TableGen files we need
This enables generation of all of the TableGen files that are used
downstream.

llvm-svn: 285274
2016-10-27 08:20:47 +00:00
Nicolai Haehnle
1a1eaef0b2 AMDGPU: Fix SILoadStoreOptimizer when writes cannot be merged due register dependencies
Summary:
When finding a match for a merge and collecting the instructions that must
be moved, keep in mind that the instruction we merge might actually use one
of the defs that are being moved.

Fixes piglit spec/arb_enhanced_layouts/execution/component-layout/vs-tcs-load-output[-indirect].

The fact that the ds_read in the test case is not eliminated suggests that
there might be another problem related to alias analysis, but that's a
separate problem: this pass should still work correctly even when earlier
optimization passes missed something or were disabled.

Reviewers: tstellarAMD, arsenm

Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25829

llvm-svn: 285273
2016-10-27 08:15:07 +00:00
Dylan McKay
261a06f328 [AVR] Compile the disassembler
This also updates references of 'TheAVRTarget' to the new
'getTheAVRTarget()' method.

llvm-svn: 285272
2016-10-27 08:09:15 +00:00
Dylan McKay
d6e1be8ce1 [AVR] Add AVRISelDAGToDAG.cpp
Summary: This pulls the AVR instruction selector in-tree.

Reviewers: arsenm, kparzysz

Subscribers: llvm-commits, wdng, beanz, japaric, mgorny

Differential Revision: https://reviews.llvm.org/D25278

llvm-svn: 285270
2016-10-27 07:03:47 +00:00
Dylan McKay
a02b1d7d51 [AVR] Add the machine code emitter
Reviewers: arsenm, kparzysz

Subscribers: wdng, beanz, japaric, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D25388

llvm-svn: 285269
2016-10-27 06:56:46 +00:00
Nemanja Ivanovic
54552bfee6 [PowerPC] - No SExt/ZExt needed for count trailing zeros
This patch corresponds to review:
https://reviews.llvm.org/D25896

It just eliminates the redundant ZExt after a count trailing zeros instruction.

llvm-svn: 285267
2016-10-27 05:17:58 +00:00
Kostya Serebryany
531e48b45b [libFuzzer] speculatively trying to fix the Mac build; second attempt
llvm-svn: 285262
2016-10-27 00:36:38 +00:00
NAKAMURA Takumi
59b3cfe715 xray-extract.cc: Quick fix for mingw, to avoid errc::protocol_error.
errc::protocol_error is winsock-oriented and mingw doesn't include it. (MS does, though)

llvm-svn: 285261
2016-10-27 00:34:24 +00:00