Evan Cheng
f97472cdf6
Fix a miscompilation caused by a typo. When turning a adde with negative value
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into a sbc with a positive number, the immediate should be complemented, not
negated. Also added a missing pattern for ARM codegen.
rdar://12559385
llvm-svn: 166613
2012-10-24 19:53:01 +00:00
Dan Gohman
142428ce64
Eliminate more uses of llvm-as and llvm-dis.
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llvm-svn: 81293
2009-09-09 00:09:15 +00:00
Evan Cheng
65f3e466df
Shrink ADDS, ADC, RSB, and SUBS.
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llvm-svn: 78776
2009-08-12 01:49:45 +00:00
David Goodwin
471e9f5b8d
Add ".w" suffix for wide thumb-2 instructions.
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llvm-svn: 77199
2009-07-27 16:31:55 +00:00
David Goodwin
9da977f216
Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".
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llvm-svn: 74321
2009-06-26 20:45:56 +00:00
David Goodwin
46eb5a7a2d
ADC used to implement adde should use "adcs" opcode instead of "adc".
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llvm-svn: 74293
2009-06-26 18:07:25 +00:00
Evan Cheng
4ac765118d
Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used.
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llvm-svn: 74228
2009-06-25 23:34:10 +00:00
Evan Cheng
0cced3daa8
ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS.
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llvm-svn: 74200
2009-06-25 20:59:23 +00:00
