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234 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
7ec3ade80f [Hexagon] Use general purpose registers to spill pred/mod registers into 
Patch by Tobias Edler Von Koch.

llvm-svn: 258527
 2016-01-22 19:15:58 +00:00
Krzysztof Parzyszek
787f659237 [Hexagon] Add system instructions for cache manipulation 
llvm-svn: 256936
 2016-01-06 14:22:22 +00:00
Krzysztof Parzyszek
05b71c2abd [Hexagon] Add PIC support 
llvm-svn: 256025
 2015-12-18 20:19:30 +00:00
Colin LeMahieu
145827ad73 [Hexagon] Adding instruction aliases and tests. 
llvm-svn: 252579
 2015-11-10 01:58:26 +00:00
Krzysztof Parzyszek
52f05db67a [Hexagon] Fix isNVStorable flag in .td files 
An upper half and a double word cannot be used as value sources in a
new-value store.

llvm-svn: 250867
 2015-10-20 22:40:57 +00:00
Krzysztof Parzyszek
68328f0930 [Hexagon] Remove the remnants of isConstExtProfitable 
llvm-svn: 250845
 2015-10-20 19:04:53 +00:00
Colin LeMahieu
fa53018d3f [Hexagon] Adding skeleton of HVX extension instructions. 
llvm-svn: 250600
 2015-10-17 01:33:04 +00:00
Sergey Dmitrouk
7bfbc12128 Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" 
[DebugInfo] Add debug locations to constant SD nodes

This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

llvm-svn: 235989
 2015-04-28 14:05:47 +00:00
Daniel Jasper
39180626db Revert "[DebugInfo] Add debug locations to constant SD nodes" 
This breaks a test:
http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/23870

llvm-svn: 235987
 2015-04-28 13:38:35 +00:00
Sergey Dmitrouk
01a4dcd3bb [DebugInfo] Add debug locations to constant SD nodes 
This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

llvm-svn: 235977
 2015-04-28 11:56:37 +00:00
Krzysztof Parzyszek
77fd8a054e [Hexagon] Some cleanup of instruction selection code 
llvm-svn: 235552
 2015-04-22 21:17:00 +00:00
Krzysztof Parzyszek
8605e42505 [Hexagon] Use A2_tfrsi for constant pool and jump table addresses 
llvm-svn: 235535
 2015-04-22 18:25:53 +00:00
Krzysztof Parzyszek
75c2c01b61 [Hexagon] Overhaul of stack object allocation 
- Use static allocation for aligned stack objects.
- Simplify dynamic stack object allocation.
- Simplify elimination of frame-indices.

llvm-svn: 235521
 2015-04-22 16:43:53 +00:00
Krzysztof Parzyszek
49d1e29261 Remove unused complex patterns for addressing modes on Hexagon. 
llvm-svn: 232057
 2015-03-12 16:44:50 +00:00
Krzysztof Parzyszek
62f208b598 Eliminate constant-extender profitability checks from Hexagon isel 
llvm-svn: 231992
 2015-03-12 00:19:59 +00:00
Colin LeMahieu
e90f8c6eac [Hexagon] Adding frame index + add load/store patterns. 
llvm-svn: 231850
 2015-03-10 21:24:13 +00:00
Colin LeMahieu
4fadccc929 [Hexagon] Adding DuplexInst instruction format and duplex class defs. 
llvm-svn: 231828
 2015-03-10 19:53:14 +00:00
Colin LeMahieu
e0c4dcc7b6 [Hexagon] Adding nodes for vector insert/extract lowering. 
llvm-svn: 231825
 2015-03-10 19:40:03 +00:00
Colin LeMahieu
aa7e3b58f5 [Hexagon] Renaming HexagonJT to JT and adding CP for constantpool. 
llvm-svn: 231824
 2015-03-10 19:29:53 +00:00
Colin LeMahieu
71ac12bc35 [Hexagon] Removing unused patterns. 
llvm-svn: 231723
 2015-03-09 23:08:46 +00:00
Colin LeMahieu
91da68b7ad [Hexagon] Use single tailcall pseudoinst and fix checking for label jumping versus tail calling. 
llvm-svn: 231713
 2015-03-09 22:05:21 +00:00
Colin LeMahieu
a4d567fa07 [Hexagon] Reapply r231699. Remove assumption that second operand is an immediate when checking if A2_tfrsi is combinable. 
llvm-svn: 231710
 2015-03-09 21:48:13 +00:00
Colin LeMahieu
9d1d946c75 [Hexagon] Reverting r231699 
llvm-svn: 231703
 2015-03-09 21:19:02 +00:00
Colin LeMahieu
08e0cb05d4 [Hexagon] Updating constant set to simpler versions. 
llvm-svn: 231699
 2015-03-09 20:33:12 +00:00
Colin LeMahieu
91d2d63512 [Hexagon] Removing old halfword codegen instructions and updating const32/64 splitting. 
llvm-svn: 231695
 2015-03-09 20:11:02 +00:00
Colin LeMahieu
899cabf2eb [Hexagon] Eliminating immediate condition set. 
llvm-svn: 231693
 2015-03-09 19:57:18 +00:00
Colin LeMahieu
996edd9328 [Hexagon] Removing TFR_condset_ir/TFR_condset_ri modeling. 
llvm-svn: 231689
 2015-03-09 19:31:25 +00:00
Colin LeMahieu
6ed4dadb96 [Hexagon] Changing AddrFI back to ADDRri to address test issue. 
llvm-svn: 231687
 2015-03-09 18:57:33 +00:00
Colin LeMahieu
ea9e0a1b68 [Hexagon] Adding PackHL nodes and some missing modeling instructions and patterns 
llvm-svn: 231678
 2015-03-09 18:34:05 +00:00
Colin LeMahieu
350f7188f4 [Hexagon] Adding vector load with post-increment instructions. Adding decoder function for 64bit control register class. 
llvm-svn: 228708
 2015-02-10 16:59:36 +00:00
Colin LeMahieu
4b4e923d37 [Hexagon] Removing v2-4 flags. V4 is the minimum supported version. 
llvm-svn: 228605
 2015-02-09 21:07:35 +00:00
Colin LeMahieu
e3a71bb727 [Hexagon] Factoring classes out of store patterns. 
llvm-svn: 228602
 2015-02-09 20:33:46 +00:00
Colin LeMahieu
76508657b3 [Hexagon] Deleting unused patterns. 
llvm-svn: 228348
 2015-02-05 21:43:56 +00:00
Colin LeMahieu
77a7515601 [Hexagon] Simplifying and formatting several patterns. Changing a pattern multiply to be expanded. 
llvm-svn: 228347
 2015-02-05 21:13:25 +00:00
Colin LeMahieu
c801034ec8 [Hexagon] Factoring a class out of some store patterns, deleting unused definitions and reformatting some patterns. 
llvm-svn: 228345
 2015-02-05 20:38:58 +00:00
Colin LeMahieu
1b98c6df7b [Hexagon] Factoring out a class for immediate transfers and cleaning up formatting. 
llvm-svn: 228343
 2015-02-05 20:08:52 +00:00
Colin LeMahieu
3ca6d76c86 [Hexagon] Renaming Y2_barrier. Fixing issues where doubleword variants of instructions can't be newvalue producers. 
llvm-svn: 228330
 2015-02-05 18:56:28 +00:00
Colin LeMahieu
a65b414ebc [Hexagon] Renaming A2_subri, A2_andir, A2_orir. Fixing formatting. 
llvm-svn: 228326
 2015-02-05 18:38:08 +00:00
Colin LeMahieu
db2545bd9b [Hexagon] Renaming A2_addi and formatting. 
llvm-svn: 228318
 2015-02-05 17:49:13 +00:00
Colin LeMahieu
3bdebacdf5 [Hexagon] Since decoding conflicts have been resolved, isCodeGenOnly = 0 by default and remove explicitly setting it. 
llvm-svn: 228316
 2015-02-05 17:32:17 +00:00
Colin LeMahieu
59e60a7508 [Hexagon] Deleting unused instructions and adding isCodeGenOnly to some defs. 
llvm-svn: 228238
 2015-02-05 00:10:16 +00:00
Colin LeMahieu
02270757b3 [Hexagon] Changing some isCodeGenOnly to isAsmParserOnly since we want them to asm parse but not cause decode conflicts. 
llvm-svn: 228080
 2015-02-04 00:07:26 +00:00
Colin LeMahieu
737967641b [Hexagon] Marking a bunch of non-encoded instructions with isCodeGenOnly = 1. 
llvm-svn: 228050
 2015-02-03 22:09:51 +00:00
Colin LeMahieu
59d3eac138 [Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests. 
llvm-svn: 228010
 2015-02-03 19:15:11 +00:00
Colin LeMahieu
e39bce1b3f [Hexagon] Adding vector shift instructions and tests. 
llvm-svn: 227619
 2015-01-30 21:58:46 +00:00
Colin LeMahieu
4316877029 [Hexagon] Adding vector predicate instructions. 
llvm-svn: 227613
 2015-01-30 21:24:06 +00:00
Colin LeMahieu
ee3ca03932 [Hexagon] Adding vector permutation instructions and tests. 
llvm-svn: 227612
 2015-01-30 21:14:00 +00:00
Colin LeMahieu
f8c65e69e9 [Hexagon] Adding vector multiplies. Cleaning up tests. 
llvm-svn: 227609
 2015-01-30 20:56:54 +00:00
Colin LeMahieu
113a9cf539 [Hexagon] Adding XTYPE/COMPLEX instructions and cleaning up tests. 
llvm-svn: 227607
 2015-01-30 20:08:37 +00:00
Colin LeMahieu
de5c154423 [Hexagon] Adding XTYPE/ALU vector instructions. Organizing test files. 
llvm-svn: 227598
 2015-01-30 19:13:26 +00:00