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Commit Graph

157060 Commits

Author SHA1 Message Date
Peter Collingbourne
9c2679ba4a COFF: Do not create SectionChunks for discarded comdat sections.
With this change, instead of creating a SectionChunk for each section
in the object file, we only create them when we encounter a prevailing
comdat section.

Also change how symbol resolution occurs between comdat symbols. Now
only the comdat leader participates in comdat resolution, and not any
other external associated symbols. This is more in line with how COFF
semantics are defined, and should allow for a more straightforward
implementation of non-ANY comdat types.

On my machine, this change reduces our runtime linking a release
build of chrome_child.dll with /nopdb from 5.65s to 4.54s (median of
50 runs).

Differential Revision: https://reviews.llvm.org/D40238

llvm-svn: 319090
2017-11-27 20:42:34 +00:00
Petr Hosek
392075da95 Use LIST_SEPARATOR rather than escaping in ExternalProject_Add
Escaping ; in list arguments passed to ExternalProject_Add doesn't seem
to be working in newer versions of CMake (see
https://public.kitware.com/Bug/view.php?id=16137 for more details). Use
a custom LIST_SEPARATOR instead which is the officially supported way.

Differential Revision: https://reviews.llvm.org/D40232

llvm-svn: 319089
2017-11-27 20:41:53 +00:00
Zaara Syeda
651277024b [PowerPC] Remove redundant TOC saves
This patch adds a peep hole optimization to remove any redundant toc save
instructions added as part of the call sequence for indirect calls. It removes
any toc saves within a function that are dominated by another toc save.

Differential Revision: https://reviews.llvm.org/D39736

llvm-svn: 319087
2017-11-27 20:26:36 +00:00
David Blaikie
1247dd5951 Rename MCTargetOptionsCommandFlags.h to .def as it is not a normal/modular header as much as it is for stamping out some global/static variables
llvm-svn: 319086
2017-11-27 19:55:16 +00:00
Craig Topper
038ffd6e20 [SelectionDAG] Add a debug message when vector_shuffle nodes are created.
We print a debug message when most nodes are created, but getVectorShuffle was missing.

llvm-svn: 319085
2017-11-27 19:54:57 +00:00
David Blaikie
1aae789bfe Rename CommandFlags.h -> CommandFlags.def
Since this isn't a real header - it includes static functions and had
external linkage variables (though this change makes them static, since
that's what they should be) so can't be included more than once in a
program.

llvm-svn: 319082
2017-11-27 19:43:58 +00:00
David Blaikie
78a3803b78 Fix -Werror build for signed/unsigned comparison with use of explicit unsigned literals
llvm-svn: 319081
2017-11-27 19:43:57 +00:00
Michal Gorny
a44f44431c Revert r319069 - [cmake] Pass -Wl,-z,nodelete on Linux to prevent unloading
This breaks one of the unit tests. Need to find a good solution.

llvm-svn: 319076
2017-11-27 19:18:36 +00:00
Arnold Schwaighofer
8e8157c899 Inliner: Don't mark notail calls with the 'tail' attribute
enum TailCallKind { TCK_None = 0, TCK_Tail = 1, TCK_MustTail = 2,
                    TCK_NoTail = 3 };

TCK_NoTail is greater than TCK_Tail so taking the min does not do the
correct thing.

rdar://35639547

llvm-svn: 319075
2017-11-27 19:03:40 +00:00
Adam Nemet
fed86d9004 Add opt-viewer testing
Detects whether we have the Python modules (pygments, yaml) required by
opt-viewer and hooks this up to REQUIRES.

This fixes https://bugs.llvm.org/show_bug.cgi?id=34129 (the lack of opt-viewer
testing).

It's also related to https://github.com/apple/swift/pull/12938 and the idea is
to expose LLVM_HAVE_OPT_VIEWER_MODULES to the Swift cmake.

Differential Revision: https://reviews.llvm.org/D40202

llvm-svn: 319073
2017-11-27 19:00:29 +00:00
Adam Nemet
9158a74fda [opt-viewer] Fix option name
llvm-svn: 319072
2017-11-27 19:00:22 +00:00
Jake Ehrlich
952158c13d [llvm-objcopy] Add --strip-all-gnu and change --strip-all
GNU's --strip-all doesn't strip as aggressively as it could in general.
Currently llvm-objcopy copies the exact behavoir of GNU's --strip-all.
eu-strip is used as a drop in replacement for GNU strip/objcopy in many many
places without issue. eu-strip removes non-allocated sections and keeps
.gnu.warning* sections. Because --strip-all will likely be the most widely
used stripping option we should make --strip-all as aggressive as it can safely
be. Since we have evidence from eu-strip that this is a safe option we should
allow it. For those that might still have an issue afterwards I've added
--strip-all-gnu as an exact drop in replacement for GNU's --strip-all as well.

llvm-svn: 319071
2017-11-27 18:56:01 +00:00
Zachary Turner
00fd9be463 [BinaryStream] Support growable streams.
The existing library assumed that a stream's length would never
change.  This makes some things simpler, but it's not flexible
enough for what we need, especially for writable streams where
what you really want is for each call to write to actually append.

llvm-svn: 319070
2017-11-27 18:48:37 +00:00
Michal Gorny
b87f043543 [cmake] Pass -Wl,-z,nodelete on Linux to prevent unloading
Prevent unloading shared libraries on Linux when dlclose() is called.
This is necessary since command-line option parsing API relies on
registering the global option instances in the option parser instance
which can be loaded in a different shared library.

Given that we can't reliably remove those options when a library is
unloaded, the parser ends up containing dangling references. Since glibc
has relatively complex library unloading rules, some of the LLVM
libraries can be unloaded while others (including the Support library)
stay loaded causing quite a mayhem. To reliably prevent that, just
forbid unloading all libraries -- it's a very bad idea anyway.

While the issue arguably happens only with BUILD_SHARED_LIBS, it may
affect any library reusing llvm::cl interface.

Based on patch provided Ross Hayward on https://bugs.gentoo.org/617154.
Previously hit by Fedora back in Feb 2016:
https://lists.freedesktop.org/archives/mesa-dev/2016-February/107242.html

Differential Revision: https://reviews.llvm.org/D40459

llvm-svn: 319069
2017-11-27 18:34:52 +00:00
Craig Topper
e9318ce34c [X86] Remove an unused isel pattern that looked for pshufd with v4f32 type.
I don't believe our current lowering/combining would ever produce such a node. We only produce integer typed pshufds.

llvm-svn: 319068
2017-11-27 18:25:54 +00:00
Sanjay Patel
6cd3d6d6fe [InstCombine] use 'auto' with 'dyn_cast'; NFC
llvm-svn: 319067
2017-11-27 18:19:32 +00:00
Craig Topper
733fa2bcb3 [X86] Teach combineX86ShuffleChain that AllowIntDomain requires at least SSE2.
I don't have a good test case for this at the moment. I was playing around with a change in legalizing and triggered this code to produce a PSHUFD with sse1 only.

llvm-svn: 319066
2017-11-27 18:15:14 +00:00
Simon Pilgrim
9b0275df44 [X86][AVX512] Tag AVX512 PACKSS/PACKUS/PMADDWD/PMADDUBSW instructions with SSE_PACK/SSE_PMADD schedule classes
llvm-svn: 319065
2017-11-27 18:14:18 +00:00
Krzysztof Parzyszek
a99e751406 [Hexagon] Implement HexagonSubtarget::isHVXVectorType
llvm-svn: 319064
2017-11-27 18:12:16 +00:00
Craig Topper
c8bb9575af [X86] Add avx512bw command lines to vselect-packss.ll
This shows several places where we fail to use masked move or blendm.

llvm-svn: 319063
2017-11-27 18:00:49 +00:00
Jonas Hahnfeld
b81d7f9306 Delete obsolete function mergeUseListsImpl
mergeUseLists is implemented iteratively since r243590.

Differential Revision: https://reviews.llvm.org/D40491

llvm-svn: 319061
2017-11-27 17:55:47 +00:00
Craig Topper
37e4fd4e39 [X86] Make getSetCCResultType return vXi1 for any vXi32/vXi64 vector over 512 bits long when AVX512 is enabled.
Similar for vXi16/vXi8 with BWI.

Any vector larger than 512 bits will be split to 512 bits during legalization. But without this we will fold sexts with them before that making it difficult to recover leading to scalarization.

llvm-svn: 319059
2017-11-27 17:51:55 +00:00
Simon Pilgrim
c199aaaa5d [X86][SSE] Fix roundpd instructions to correctly use IIC_SSE_ROUNDPD_* itineraries
llvm-svn: 319054
2017-11-27 17:29:49 +00:00
Dmitry Preobrazhensky
4cc95b62e9 [AMDGPU][MC][DISASSEMBLER][GFX9] Corrected decoding of GLOBAL/SCRATCH opcodes
See bug 35433: https://bugs.llvm.org/show_bug.cgi?id=35433

Differential Revision: https://reviews.llvm.org/D40493

Reviewers: artem.tamazov, SamWot, arsenm
llvm-svn: 319050
2017-11-27 17:14:35 +00:00
Zaara Syeda
82bb58af04 [Power9] Improvements to vector extract with variable index exploitation
This patch extends on to rL307174 to not use the power9 vector extract with
variable index instructions when extracting word element 1. For such cases,
the existing selection of MFVSRWZ provides a better sequence.

Differential Revision: https://reviews.llvm.org/D38287

llvm-svn: 319049
2017-11-27 17:11:03 +00:00
Fangrui Song
201697d9a6 [XRay] Fix typo in docs. NFC
Reviewers: dberris

Differential Revision: https://reviews.llvm.org/D40461

llvm-svn: 319047
2017-11-27 16:59:26 +00:00
Simon Pilgrim
b9845a9a23 [X86][AVX512] Tag AVX512 sqrt instructions with SSE_SQRT schedule classes
llvm-svn: 319045
2017-11-27 16:43:18 +00:00
Jonas Devlieghere
a1a2b19cce [llvm-dwarfdump] Display DW_AT_high_pc as absolute value
DWARF4 relative DW_AT_high_pc values are now displayed as absolute
addresses. The relative value is only shown when explicitly dumping the
forms, i.e. in show-form or verbose mode.

```
DW_AT_low_pc	(0x0000000000000049)
DW_AT_high_pc	(0x00000019)
```

becomes

```
DW_AT_low_pc	(0x0000000000000049)
DW_AT_high_pc	(0x0000000000000062)
```

Differential revision: https://reviews.llvm.org/D40317

rdar://35416943

llvm-svn: 319044
2017-11-27 16:40:46 +00:00
Sanjay Patel
76bda3602f [InstSimplify] use m_APFloat to simplify fcmp folds; NFCI
llvm-svn: 319043
2017-11-27 16:37:09 +00:00
Sanjay Patel
f7e0750aab [InstSimplify] add fcmp with negative constant tests; NFC
This is a superset of the tests proposed with D40012 to show another potential improvement.

llvm-svn: 319041
2017-11-27 16:08:34 +00:00
Nirav Dave
bb8da74ef1 [DAG] Do MergeConsecutiveStores again before Instruction Selection
Summary:

Now that store-merge is only generates type-safe stores, do a second
pass just before instruction selection to allow lowered intrinsics to
be merged as well.

Reviewers: jyknight, hfinkel, RKSimon, efriedma, rnk, jmolloy

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33675

llvm-svn: 319036
2017-11-27 15:28:15 +00:00
Simon Pilgrim
80f854f644 [X86] Add INVLPGA to the existing INVLPG scheduling
llvm-svn: 319031
2017-11-27 14:39:50 +00:00
Petar Jovanovic
dbcba7bd3f [mips] fix asmstring of Ext and Ins instructions and mips16 JALRC/JRC
Make the print format consistent with other assembler instructions.

Adding a tab character instead of space in asmstring of Ext and Ins
instructions.
Removing space around the tab character for JALRC and replacing space with
tab in JRC.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D38144

llvm-svn: 319030
2017-11-27 14:25:36 +00:00
Simon Pilgrim
07c57efff0 [X86] Add scheduling tests for invlpg/invlpga
llvm-svn: 319029
2017-11-27 14:23:55 +00:00
Jan Korous
e8880d438c [Support] Fix locking of shared variable in threadpool
llvm-svn: 319027
2017-11-27 13:42:03 +00:00
Vedran Miletic
6e3406948a [AMDGPU] Add custom lowering for llvm.log{,10}.{f16,f32} intrinsics
AMDGPU backend errors with "unsupported call to function" upon
encountering a call to llvm.log{,10}.{f16,f32} intrinsics. This patch
adds custom lowering to avoid that error on both R600 and SI.

Reviewers: arsenm, jvesely

Subscribers: tstellar

Differential Revision: https://reviews.llvm.org/D29942

llvm-svn: 319025
2017-11-27 13:26:38 +00:00
John Brawn
384d4cf8fb [CGP] Fix handling of null pointer values in optimizeMemoryInst
The current way that trivial addressing modes are detected incorrectly thinks
that null pointers are non-trivial, leading to an infinite loop where we keep
duplicating the same select. Fix this by aware of null when deciding if an
addressing mode is trivial.

Differential Revision: https://reviews.llvm.org/D40447

llvm-svn: 319019
2017-11-27 11:29:15 +00:00
Max Kazantsev
4f37433c79 [NFC] Add missing unit tests for EquivalenceClasses
llvm-svn: 319018
2017-11-27 11:20:58 +00:00
Simon Pilgrim
ed2f1de918 [X86][FMA] Tag all FMA/FMA4 instructions with WriteFMA schedule class
As mentioned on PR17367, many instructions are missing scheduling tags preventing us from setting 'CompleteModel = 1' for better instruction analysis. This patch deals with FMA/FMA4 which is one of the bigger offenders (along with AVX512 in general).

Annoyingly all scheduler models need to define WriteFMA (now that its actually used), even for older targets without FMA/FMA4 support, but that is an existing problem shared by other schedule classes.

Differential Revision: https://reviews.llvm.org/D40351

llvm-svn: 319016
2017-11-27 10:41:32 +00:00
Momchil Velikov
ca299e870b [ARM] Fix an off-by-one error when restoring LR for 16-bit Thumb
The commit https://reviews.llvm.org/rL318143 computes incorrectly to offset to
restore LR from.

The number of tPOP operands is 2 (condition) + 2 (implicit def and use of SP) +
count of the popped registers. We need to load LR from just past the last
register, hence the correct offset should be either getNumOperands() - 4 and
getNumExplicitOperands() - 2 (multiplied by 4).

Differential revision: https://reviews.llvm.org/D40305

llvm-svn: 319014
2017-11-27 10:13:14 +00:00
Andrew V. Tischenko
949eb7ae20 Update BTVER2 sched numbers for SSE42 string instructions.
Differential Revision: https://reviews.llvm.org/D39846

llvm-svn: 319013
2017-11-27 09:58:00 +00:00
Craig Topper
54531a84e0 [SelectionDAG] Teach SplitVecRes_SETCC to call GetSplitVector if the operands have already been split.
llvm-svn: 319010
2017-11-27 05:52:54 +00:00
Craig Topper
addb08de4c [SelectionDAG] Fix function name in comment. NFC
llvm-svn: 319009
2017-11-27 05:52:52 +00:00
Craig Topper
496f3e105b [X86] Fix an assert that was incorrectly checking for BMI instead of AVX512VBMI.
The check is actually unnecessary since AVX512VBMI implies AVX512BW which is the other part of the assert.

llvm-svn: 319006
2017-11-26 21:14:48 +00:00
Simon Pilgrim
2526e6aeb4 [X86][3DNow] Add 3DNow! instruction itinerary and scheduling classes
llvm-svn: 319005
2017-11-26 20:50:29 +00:00
Simon Pilgrim
bc277bc1b0 [X86][SSE] Add SSE42 tests to the clear upper tests
llvm-svn: 319003
2017-11-26 20:03:53 +00:00
Simon Dardis
396ae81511 [utils][mips] Add support for mips for update_llc_checks.py
Add support for mips, particularly skipping the matching of .frame, .(f)mask
and LLVM's usage of the .set no(reorder|at|macro) directives.

Reviewers: spatel

Differential Revision: https://reviews.llvm.org/D40268

llvm-svn: 319001
2017-11-26 19:22:44 +00:00
Simon Pilgrim
b053472a7d [X86][3DNow] Remove unused I3DNow_binop_rm/I3DNow_conv_rm templates. NFCI
llvm-svn: 319000
2017-11-26 19:22:37 +00:00
Simon Pilgrim
745278cc76 [X86][MMX] Add IIC_MMX_MOVMSK instruction itinerary class
llvm-svn: 318999
2017-11-26 17:56:07 +00:00
Jatin Bhateja
097ac40945 [SCEV] Adding a check on outgoing branches of a terminator instr for SCEVBackedgeConditionFolder, NFC.
Summary:
For a given loop, getLoopLatch returns a non-null value
when a loop has only one latch block. In the modified
context adding an assertion to check that both the outgoing branches of
a terminator instruction (of latch) does not target same header.
+
few minor code reorganization.

Reviewers: jbhateja

Reviewed By: jbhateja

Subscribers: sanjoy

Differential Revision: https://reviews.llvm.org/D40460

llvm-svn: 318997
2017-11-26 15:08:41 +00:00