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Commit Graph

4993 Commits

Author SHA1 Message Date
Dale Johannesen
edcba1161f Reverse sense of unwind-tables option. This means
stack tracebacks on Darwin x86-64 won't work by default;
nevertheless, everybody but me thinks this is a good idea.

llvm-svn: 49663
2008-04-14 17:54:17 +00:00
Nicolas Geoffray
5d04329f4b Fix /test/CodeGen/PowerPC/big-endian-actual-args.ll for linux/ppc32
llvm-svn: 49652
2008-04-14 17:17:14 +00:00
Duncan Sands
2b303812b9 Initial libcall support for LegalizeTypes. This is
much simpler than in LegalizeDAG because calls are
not yet expanded into call sequences: that happens
after type legalization has finished.

llvm-svn: 49634
2008-04-14 06:48:48 +00:00
Duncan Sands
651a9b7ed0 LegalizeTypes can sometimes have deleted nodes
in its maps.  Add some sanity checks that catch
this kind of thing.  Hopefully these can be
removed one day (once all problems are fixed!)
but for the moment it seems wise to have them in.

llvm-svn: 49612
2008-04-13 16:04:03 +00:00
Nicolas Geoffray
ad5556e8ba Add a divided flag for the first piece of an argument divided into mulitple parts. Fixes PR1643
llvm-svn: 49611
2008-04-13 13:40:22 +00:00
Duncan Sands
c5f548f784 Merge LLVMBuilder and FoldingBuilder, calling
the result IRBuilder.  Patch by Dominic Hamon.

llvm-svn: 49604
2008-04-13 06:22:09 +00:00
Duncan Sands
d74b96a812 Factor some libcall code.
llvm-svn: 49583
2008-04-12 17:14:18 +00:00
Dan Gohman
15edbf989f Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.

llvm-svn: 49572
2008-04-12 04:36:06 +00:00
Evan Cheng
27262ddcf3 Do not add empty live intervals to handled_. They should never be undone for backtracking.
llvm-svn: 49544
2008-04-11 17:55:47 +00:00
Evan Cheng
6e52146f16 If a PHI node has a single implicit_def source, replace it with an implicit_def instead of a copy.
llvm-svn: 49543
2008-04-11 17:54:45 +00:00
Evan Cheng
b389b78462 Use of implicit_def is not part of live interval. Create empty intervals for the uses when the live interval is being spilled.
llvm-svn: 49542
2008-04-11 17:53:36 +00:00
Gabor Greif
f6552899f9 detabify
llvm-svn: 49524
2008-04-11 09:34:57 +00:00
Evan Cheng
478e43e7a5 Remove implicit_def instructions that become dead as result of coalescing.
llvm-svn: 49513
2008-04-10 23:48:35 +00:00
Evan Cheng
52208a738f Allow registers defined by implicit_def to be clobbered.
llvm-svn: 49512
2008-04-10 23:47:53 +00:00
Evan Cheng
6f164e3814 A copy instruction may use a register multiple times on some targets. Change them all.
llvm-svn: 49491
2008-04-10 18:38:47 +00:00
Evan Cheng
c79e80c679 Add comment.
llvm-svn: 49469
2008-04-10 08:03:14 +00:00
Evan Cheng
1803e20a62 Teach branch folding pass about implicit_def instructions. Unfortunately we can't just eliminate them since register scavenger expects every register use to be defined. However, we can delete them when there are no intra-block uses. Carefully removing some implicit def's which enable more blocks to be optimized away.
llvm-svn: 49461
2008-04-10 02:32:10 +00:00
Evan Cheng
def576f9e6 - More aggressively coalescing away copies whose source is defined by an implicit_def.
- Added insert_subreg coalescing support.

llvm-svn: 49448
2008-04-09 20:57:25 +00:00
Evan Cheng
f35cc57821 Missed a hasInterval check.
llvm-svn: 49415
2008-04-09 01:30:15 +00:00
Dale Johannesen
ec0fe04044 Implement new llc flag -disable-required-unwind-tables.
Corresponds to -fno-unwind-tables (usually default in gcc).

llvm-svn: 49361
2008-04-08 00:10:24 +00:00
Dan Gohman
d7301ea935 Rename MemOperand to MachineMemOperand. This was suggested by
review feedback from Chris quite a while ago. No functionality
change.

llvm-svn: 49348
2008-04-07 19:35:22 +00:00
Roman Levenstein
b40d332929 Re-commit of the r48822, where the infinite looping problem discovered
by Dan Gohman is fixed.

llvm-svn: 49330
2008-04-07 10:06:32 +00:00
Chris Lattner
7a4d7b7aa6 Silence warning when no assertions.
llvm-svn: 49284
2008-04-06 21:46:45 +00:00
Torok Edwin
34e6889671 Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant.
Part of enhancement for PR2191.

llvm-svn: 49280
2008-04-06 21:23:02 +00:00
Gabor Greif
6c6b8a57f3 API changes for class Use size reduction, wave 1.
Specifically, introduction of XXX::Create methods
for Users that have a potentially variable number of
Uses.

llvm-svn: 49277
2008-04-06 20:25:17 +00:00
Evan Cheng
d7d1c94e67 1. IMPLICIT_DEF can *re-define* any register.
2. Coalescer can now create an interesting situation where a register def can
   reaches itself without being killed.

llvm-svn: 49246
2008-04-05 01:27:09 +00:00
Dale Johannesen
6ebaf848f4 Make sure both PendingLoads and PendingExports are flushed
before an invoke.  Failure to do this causes references in
the landing pad to variables that were not set.  Fixes
g++.dg/eh/delayslot1.C
g++.dg/eh/fp-regs.C
g++.old-deja/g++.brendan/eh1.C

llvm-svn: 49243
2008-04-04 23:48:31 +00:00
Evan Cheng
b05f463467 Undo PHI elimination copy placement patch. This causes coalescing (performace) issues.
llvm-svn: 49198
2008-04-04 01:20:05 +00:00
Evan Cheng
1ce4ac7386 This is done.
llvm-svn: 49197
2008-04-04 01:19:03 +00:00
Andrew Lenharth
e60f2413d4 if some functions don't have debug info, we were outputing the same label at the start of each of those functions. This makes assemblers unhappy
llvm-svn: 49176
2008-04-03 17:37:43 +00:00
Evan Cheng
e86caa45cf - Turn copies of implicit_def into implicit_def instructions.
- Be smarter about coalescing copies from implicit_def.

llvm-svn: 49168
2008-04-03 16:41:54 +00:00
Evan Cheng
ff9c1655de Special handling of zero-sized live intervals.
llvm-svn: 49167
2008-04-03 16:40:27 +00:00
Evan Cheng
6250bfbd3e - Treat a live range defined by an implicit_def as a zero-sized one.
- Eliminate an implicit_def when it's being spilled.

llvm-svn: 49166
2008-04-03 16:39:43 +00:00
Evan Cheng
ba120126ba - PHI elimination also eliminates implicit_def that fits into a PHI node rather than copying it.
- Be (slightly) smarter about where to place the copies.

llvm-svn: 49165
2008-04-03 16:38:20 +00:00
Evan Cheng
53c8db51dd Start of a series of patches related to implicit_def.
There is no point in creating a long live range defined by an implicit_def. Scheduler now duplicates implicit_def instruction for each of its uses. Therefore, if an implicit_def node has multiple uses, it will become a number of very short live ranges, rather than a long one. This will make coalescer's job easier.

llvm-svn: 49164
2008-04-03 16:36:07 +00:00
Evan Cheng
497c607fae Backing out 48222 temporarily.
llvm-svn: 49124
2008-04-03 03:13:16 +00:00
Dale Johannesen
8b316fb8bc Make EH work with unnamed functions. Reenable running
StripSymbols when EH is on.

llvm-svn: 49110
2008-04-02 20:10:52 +00:00
Evan Cheng
748a0c9215 Now that I am told MachineRegisterInfo also tracks physical register uses / defs, I can do away with the horribleness I introduced a while back. It's impossible to detect if there is any use of a physical register below an instruction (and before any def of the register) with some cheap book keeping.
llvm-svn: 49105
2008-04-02 18:04:08 +00:00
Evan Cheng
4e841d67ed Remove #include<map> from LiveVariables.h. Not referenced.
llvm-svn: 49099
2008-04-02 17:23:50 +00:00
Dale Johannesen
84a1314ea1 Cosmetic changes per EH patch review feedback.
llvm-svn: 49096
2008-04-02 17:04:45 +00:00
Owen Anderson
e2690ed8b6 In some situations, we need to check for local interferences between the PHI
node and its inputs.

llvm-svn: 49070
2008-04-02 03:00:13 +00:00
Owen Anderson
249571b638 Correctly mark a valno that was previous defined by a PHI node as having an
unknown defining inst after PHI elimination.

llvm-svn: 49069
2008-04-02 02:12:45 +00:00
Dale Johannesen
79633a914f Recommitting EH patch; this should answer most of the
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.

llvm-svn: 49064
2008-04-02 00:25:04 +00:00
Evan Cheng
44cdd4272c Re-materialization is for uses only.
llvm-svn: 49053
2008-04-01 21:37:32 +00:00
Dale Johannesen
8813206b7f Revert 49006 for the moment.
llvm-svn: 49046
2008-04-01 20:00:57 +00:00
Owen Anderson
b30608ce7a Don't dereference MBB->end().
llvm-svn: 49043
2008-04-01 18:05:08 +00:00
Evan Cheng
c2f298f318 More soft fp fixes.
llvm-svn: 49016
2008-04-01 02:18:22 +00:00
Evan Cheng
ea4536577b Pasto.
llvm-svn: 49014
2008-04-01 02:00:09 +00:00
Evan Cheng
0d523a6c71 Add comment.
llvm-svn: 49013
2008-04-01 01:51:26 +00:00
Evan Cheng
a38ae9c502 Unbreak ARM / Thumb soft FP support.
llvm-svn: 49012
2008-04-01 01:50:16 +00:00
Dale Johannesen
fa4433be71 Emit exception handling info for functions which are
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.

llvm-gcc generates nounwind in the right places; other FEs
will need to do so also.  Given such a FE, -enable-eh should
no longer be needed.

llvm-svn: 49006
2008-03-31 23:40:23 +00:00
Evan Cheng
a3ce7b4c76 It's not safe to fold a load from GV stub or constantpool into a two-address use.
llvm-svn: 49002
2008-03-31 23:19:51 +00:00
Evan Cheng
38a755499d Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
llvm-svn: 48995
2008-03-31 20:40:39 +00:00
Dan Gohman
f223eaafcd Fix a DAGCombiner optimization to respect volatile qualification.
llvm-svn: 48994
2008-03-31 20:32:52 +00:00
Evan Cheng
39c43815d2 The support for remat of instructions with a register operand is hackish, to say the least. Since the register operand guaranteed to be PIC base and that it is already live at all uses, we are making sure it will not be spilled after its uses are rematerialized for both performance and correctness reasons.
llvm-svn: 48976
2008-03-31 07:53:30 +00:00
Owen Anderson
5d9ba35723 Fix a major bug in the DFS calculation. Thanks for Christopher Lamb for pointing this out.
llvm-svn: 48973
2008-03-31 01:39:20 +00:00
Chris Lattner
49e9edd6f6 Fix "Control reaches the end of non-void function" warnings,
patch by David Chisnall.

llvm-svn: 48963
2008-03-30 18:22:13 +00:00
Evan Cheng
5eea2da8d5 Cosmetic changes.
llvm-svn: 48947
2008-03-29 18:34:22 +00:00
Owen Anderson
7d815aea28 Remove some unneeded code for LiveInterval joining, and fix a bug in the Phi elimination algorithm where we were accidentally reasoning about
the source rather than the destination.

llvm-svn: 48936
2008-03-29 01:58:47 +00:00
Chris Lattner
90bd039074 ifdef out a dead function. Should this be removed?
llvm-svn: 48916
2008-03-28 15:36:27 +00:00
Duncan Sands
80f14df923 Rename getAnyLoad to getLoad is suggested by Evan.
llvm-svn: 48914
2008-03-28 09:45:24 +00:00
Evan Cheng
69a8741b60 New entry.
llvm-svn: 48908
2008-03-28 06:34:23 +00:00
Duncan Sands
3d613421f1 Implement LegalizeTypes support for softfloat LOAD.
In order to handle indexed nodes I had to introduce
a new constructor, and since I was there I factorized
the code in the various load constructors.

llvm-svn: 48894
2008-03-27 20:23:40 +00:00
Dan Gohman
199ab29337 Avoid creating chain dependencies from CopyToReg nodes to load and store
nodes. This doesn't currently have much impact the generated code, but it
does produce simpler-looking SelectionDAGs, and consequently
simpler-looking ScheduleDAGs, because there are fewer spurious
dependencies.

In particular, CopyValueToVirtualRegister now uses the entry node as the
input chain dependency for new CopyToReg nodes instead of calling getRoot
and depending on the most recent memory reference.

Also, rename UnorderedChains to PendingExports and pull it up from being
a local variable in SelectionDAGISel::BuildSelectionDAG to being a
member variable of SelectionDAGISel, so that it doesn't have to be
passed around to all the places that need it.

llvm-svn: 48893
2008-03-27 19:56:19 +00:00
Roman Levenstein
00030f1b38 Fix spelling. Thanks, Duncan! :-)
llvm-svn: 48873
2008-03-27 09:44:37 +00:00
Roman Levenstein
34552e20b3 Speed-up the SumOfUnscheduledPredsOfSuccs by introducing a new function
called LimitedSumOfUnscheduledPredsOfSuccs. It terminates the computation
after a given treshold is reached. This new function is always faster, but
brings real wins only on bigger test-cases.

The old function SumOfUnscheduledPredsOfSuccs is left in-place for now and therefore a warning about an unused static function is produced.

llvm-svn: 48872
2008-03-27 09:14:57 +00:00
Evan Cheng
6cbce6b602 Fix a memory bug: increment an iterator of a deleted machine instr.
llvm-svn: 48853
2008-03-27 01:27:25 +00:00
Dale Johannesen
4524d3a1d1 Fix a bug in Darwin EH: FDE->CIE pointer must
be relocatable.  Describe why .set is needed better.

llvm-svn: 48848
2008-03-26 23:31:39 +00:00
Evan Cheng
6fc37c8f25 One more coalescer fix wrt deadness propagation.
llvm-svn: 48837
2008-03-26 20:15:49 +00:00
Evan Cheng
8d222d6221 Avoid commuting a def MI in order to coalesce a copy instruction away if any use of the same val# is a copy instruction that has already been coalesced.
llvm-svn: 48833
2008-03-26 19:03:01 +00:00
Roman Levenstein
55b8822511 Use a linked data structure for the uses lists of an SDNode, just like
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.

The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.

On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better. 

llvm-svn: 48822
2008-03-26 12:39:26 +00:00
Roman Levenstein
dc2d45564d Fixed some spelling errors. Thanks, Duncan!
llvm-svn: 48819
2008-03-26 11:23:38 +00:00
Roman Levenstein
febd10df58 Some improvements related to the computation of isReachable.
This fixes Bugzilla #1835 (http://llvm.org/bugs/show_bug.cgi?id=1835).
This patched is reviewed by Tanya and Dan. Dan tested and approved it.

The reason for the bad performance of the old algorithm is that it is very naive and scans every
time all nodes of the DAG in the worst case.

This patch introduces  a new algorithm based on the paper "Online algorithms
for maintaining the topological order of a directed acyclic graph" by
David J.Pearce and Paul H.J.Kelly. This is the MNR algorithm. It has a
linear time worst-case and performs much better in most situations.

The paper can be found here:
http://fano.ics.uci.edu/cites/Document/Online-algorithms-for-maintaining-the-topological-order-of-a-directed-acyclic-graph.html

The main idea of the new algorithm is to compute the topological ordering of the SNodes in the
DAG and to maintain it even after DAG modifications. The topological ordering allows for very fast 
node reachability checks. 

Tests on very big  input files with tens of thousands of instructions in a BB indicate huge 
speed-ups (up to 10x compilation time improvement) compared to the old version.

llvm-svn: 48817
2008-03-26 09:18:09 +00:00
Owen Anderson
0fa6dd147f Dead PHI instructions need to be handled specially.
llvm-svn: 48811
2008-03-26 03:03:23 +00:00
Owen Anderson
bf0ddb6156 Remove some debugging code.
llvm-svn: 48803
2008-03-25 22:26:43 +00:00
Owen Anderson
8edda0e5c0 StrongPHIElimination doesn't support swapping live intervals like the coalescer does.
llvm-svn: 48802
2008-03-25 22:25:27 +00:00
Dan Gohman
22002efa15 A quick nm audit turned up several fixed tables and objects that were
marked read-write. Use const so that they can be allocated in a
read-only segment.

llvm-svn: 48800
2008-03-25 21:45:14 +00:00
Dan Gohman
e7be9eea10 Avoid outputing spaces at the ends of lines.
llvm-svn: 48797
2008-03-25 21:38:12 +00:00
Devang Patel
0cfc278311 Do not align loops if optimizing for size.
llvm-svn: 48794
2008-03-25 21:03:02 +00:00
Evan Cheng
8cb64d8e8b Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
llvm-svn: 48792
2008-03-25 20:08:07 +00:00
Dan Gohman
754b21c239 Fix typos.
llvm-svn: 48779
2008-03-25 17:10:29 +00:00
Evan Cheng
7c1dcd8371 lastRegisterUse() should ignore identity copies. Those will be erased.
llvm-svn: 48759
2008-03-25 02:02:19 +00:00
Evan Cheng
61bf4f6c40 Remove an unneeded test.
llvm-svn: 48755
2008-03-24 23:55:16 +00:00
Evan Cheng
2213deac2e If the coalescer commuted a def MI to allow coalescing, it can changed a previously coalesced copy into an non-identity copy.
llvm-svn: 48752
2008-03-24 23:31:21 +00:00
Evan Cheng
475368bc97 Add an assertion to catch register of illegal class.
llvm-svn: 48751
2008-03-24 23:28:21 +00:00
Owen Anderson
5b7be5e518 Remove #include<iostream>, which I was using for debugging.
llvm-svn: 48739
2008-03-24 20:36:47 +00:00
Dan Gohman
b9c5e6258f APIntify SelectionDAG's EXTRACT_ELEMENT code.
llvm-svn: 48726
2008-03-24 16:38:05 +00:00
Owen Anderson
55d8543211 Be sure to remove intervals after we've joined them. Also, remove some duplicated code.
With this pass, StrongPHIElim can compile very simple testcases correctly.  There's still a ways
to go before it's ready for prime time, though.

llvm-svn: 48719
2008-03-24 04:11:27 +00:00
Anton Korobeynikov
4b85ece1ab Another comments fixing
llvm-svn: 48683
2008-03-22 07:53:40 +00:00
Evan Cheng
874aee2eec Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
llvm-svn: 48673
2008-03-22 01:55:50 +00:00
Dan Gohman
a363ba510c Don't include <map> in Pass.h, which doesn't need it. This requires
adding <map> to many files that actually do need it.

llvm-svn: 48667
2008-03-21 23:51:57 +00:00
Dan Gohman
ae161c1522 Fix -view-sunit-dags to support cross-rc-copy nodes.
llvm-svn: 48664
2008-03-21 22:51:06 +00:00
Evan Cheng
32a6116ffd A couple of kill marker maintainence bug.
llvm-svn: 48653
2008-03-21 19:09:30 +00:00
Duncan Sands
4153fc30c9 Introduce a new node for holding call argument
flags.  This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines.  There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness.  As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.

llvm-svn: 48640
2008-03-21 09:14:45 +00:00
Christopher Lamb
110f66ca68 Check even more carefully before applying this DAGCombine transform.
llvm-svn: 48580
2008-03-20 04:31:39 +00:00
Evan Cheng
8ecb189245 Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
llvm-svn: 48578
2008-03-20 02:18:41 +00:00
Chris Lattner
6c4486c5c7 detabify llvm, patch by Mike Stump!
llvm-svn: 48577
2008-03-20 01:22:40 +00:00
Christopher Lamb
958b0494c3 Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
llvm-svn: 48542
2008-03-19 08:30:06 +00:00
Evan Cheng
e9aa507edc Fixed a coalescer bug caused by a typo.
llvm-svn: 48526
2008-03-19 02:26:36 +00:00
Evan Cheng
3d9309c11d Fix live variables issues:
1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue.
2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register:
   = EAX, AX<imp-use,kill>
...
AX =
In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things.

llvm-svn: 48521
2008-03-19 00:52:20 +00:00
Bill Wendling
5ea2aec3ac Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
llvm-svn: 48510
2008-03-18 22:29:51 +00:00
Dale Johannesen
7f51ebc90c Make conversions of i8/i16 to ppcf128 work.
llvm-svn: 48493
2008-03-18 17:28:38 +00:00
Christopher Lamb
1d70509b55 Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
llvm-svn: 48491
2008-03-18 16:46:39 +00:00
Evan Cheng
5750c3cd1e Rewrite code that propagate isDead information after a dead copy is coalesced. This remove some ugly spaghetti code and fixed a number of subtle bugs.
llvm-svn: 48490
2008-03-18 08:26:47 +00:00
Owen Anderson
5da16e856c A first attempt at updating live intervals, with code lifted from
the coalescer.  This doesn't really work, but gets us farther than
before.

llvm-svn: 48446
2008-03-17 06:08:26 +00:00
Christopher Lamb
b4f4b41048 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
llvm-svn: 48412
2008-03-16 03:12:01 +00:00
Evan Cheng
9af68f56c5 Remove isImplicitDef TargetInstrDesc flag.
llvm-svn: 48381
2008-03-15 00:19:36 +00:00
Evan Cheng
11d2c09adc Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
Duncan Sands
3760c87373 Do not generate special entries in the dwarf eh
table for nounwind calls.

llvm-svn: 48373
2008-03-14 21:36:24 +00:00
Evan Cheng
3612a7ed30 Fix PR2138. Apparently any modification to a std::multimap (including remove entries for a different key) can invalidate multimap iterators.
llvm-svn: 48371
2008-03-14 20:44:01 +00:00
Duncan Sands
d3859c83a5 Simplify using getIntPtrConstant.
llvm-svn: 48355
2008-03-14 05:23:57 +00:00
Nate Begeman
f06c08e652 Tabs -> spaces
Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask

llvm-svn: 48351
2008-03-14 00:53:31 +00:00
Evan Cheng
1ce3ba341d Livein copy scheduling fixes: do not coalesce physical register copies, correctly determine the safe location to insert the copies.
llvm-svn: 48348
2008-03-14 00:14:55 +00:00
Dan Gohman
486f664806 More APInt-ification.
llvm-svn: 48344
2008-03-13 22:13:53 +00:00
Evan Cheng
b479bf0d0c Undo tweak. It had no obvious benefit.
llvm-svn: 48341
2008-03-13 17:42:48 +00:00
Evan Cheng
a7c38d1ce9 Typo.
llvm-svn: 48337
2008-03-13 08:04:35 +00:00
Evan Cheng
9a7395ba78 Don't try to sink 3-address instruction if convertToThreeAddress created more than one instructions.
llvm-svn: 48336
2008-03-13 07:56:58 +00:00
Evan Cheng
38a8da7b16 Remove an unused command line option.
llvm-svn: 48334
2008-03-13 06:38:28 +00:00
Evan Cheng
0b8b1647dd TwoAddressInstructionPass enhancement. After it converts a two address instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one.
llvm-svn: 48333
2008-03-13 06:37:55 +00:00
Christopher Lamb
0f1c32eb63 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
2008-03-13 05:47:01 +00:00
Evan Cheng
6b57844f0c Remove unused options.
llvm-svn: 48319
2008-03-13 02:41:34 +00:00
Evan Cheng
b9fc5d6d07 Refactor some code out of MachineSink into a MachineInstr query.
llvm-svn: 48311
2008-03-13 00:44:09 +00:00
Evan Cheng
620fd19798 Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!

llvm-svn: 48307
2008-03-12 22:19:41 +00:00
Duncan Sands
f830ed681b Initial soft-float support for LegalizeTypes. I rewrote
the fcopysign expansion from LegalizeDAG to get rid of
what seems to be a bug: the use of sign extension means
that when copying the sign bit from an f32 to an f64,
the upper 32 bits of the f64 (now an i64) are set, not
just the top bit...  I also generalized it to work for
any sized floating point types, and removed the bogosity:
  SDOperand Mask1 = (SrcVT == MVT::f64)
    ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
    : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
  Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
(here SrcNVT is an integer with the same size as SrcVT).
As far as I can see this takes a 1 << 63, converts to
a double, converts that to a floating point constant
then converts that to an integer constant, ending up
with... 1 << 63 as an integer constant!  So I just
generate this integer constant directly.

llvm-svn: 48305
2008-03-12 21:27:04 +00:00
Dan Gohman
e40582180e Change VirtRegMap's dump to dump to cerr, not DOUT, so that it
can be called from within a debuger without having -debug specified
on the command-line.

llvm-svn: 48298
2008-03-12 20:52:10 +00:00
Dan Gohman
4e4f2e2ba4 Fix typos in comments.
llvm-svn: 48297
2008-03-12 20:50:04 +00:00
Duncan Sands
f9de87eae8 Fix typo.
llvm-svn: 48295
2008-03-12 20:35:19 +00:00
Duncan Sands
05eb212b2d Don't try to extract an i32 from an f64. This
getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure.  In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers.  Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.

llvm-svn: 48294
2008-03-12 20:30:08 +00:00
Evan Cheng
df92afe7d3 Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.

llvm-svn: 48279
2008-03-12 07:02:50 +00:00
Owen Anderson
df98435a16 We also need to collect the VN IDs for the PHI instructions for later updating.
llvm-svn: 48278
2008-03-12 04:22:57 +00:00
Owen Anderson
ecc3b561eb When we're determining what registers to coallesce, track the VNInfo IDs for the definitions that
feed the PHI instructions.  We'll need these IDs in order to update LiveIntervals properly.

llvm-svn: 48277
2008-03-12 03:13:29 +00:00
Evan Cheng
ee092b2dfc Total brain cramp.
llvm-svn: 48274
2008-03-12 02:05:05 +00:00
Evan Cheng
1812351f99 Set NextMII after issuing a physical register spill.
llvm-svn: 48263
2008-03-12 00:14:07 +00:00
Evan Cheng
909992f970 Minor debug output bug.
llvm-svn: 48261
2008-03-12 00:02:46 +00:00
Anton Korobeynikov
55f54ba252 Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
llvm-svn: 48257
2008-03-11 22:38:53 +00:00
Dan Gohman
8e3c88c4e9 Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Anton Korobeynikov
aa1433ab47 Honour aliases visibility during asm emission
llvm-svn: 48249
2008-03-11 21:41:14 +00:00
Evan Cheng
665363494f Transfer physical register spill info when load / store folding happens.
llvm-svn: 48246
2008-03-11 21:34:46 +00:00
Dan Gohman
1fece90de9 Use the correct value for InSignBit.
llvm-svn: 48245
2008-03-11 21:29:43 +00:00
Dan Gohman
55a443d612 Initial codegen support for functions and calls with multiple return values.
llvm-svn: 48244
2008-03-11 21:11:25 +00:00
Christopher Lamb
74f4d837df Recommitting parts of r48130. These do not appear to cause the observed failures.
llvm-svn: 48223
2008-03-11 10:09:17 +00:00
Evan Cheng
794f4ee703 Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.
llvm-svn: 48221
2008-03-11 07:55:13 +00:00
Evan Cheng
af1c76846d When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
llvm-svn: 48218
2008-03-11 07:19:34 +00:00
Duncan Sands
1b059ad5d5 Some LegalizeTypes code factorization and minor
enhancements.

llvm-svn: 48215
2008-03-11 06:41:14 +00:00
Chris Lattner
3241d0df37 compile: double test() {}
into:

_test:
	fldz
	ret

instead of:

_test:
	subl	$12, %esp
	#IMPLICIT_DEF %xmm0
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$12, %esp
	ret

llvm-svn: 48213
2008-03-11 06:21:08 +00:00
Chris Lattner
e58af59475 variadic instructions don't have operand info for variadic arguments.
llvm-svn: 48208
2008-03-11 03:14:42 +00:00
Dan Gohman
85bfbe2293 Generalize ExpandIntToFP to handle the case where the operand is legal
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type. 

llvm-svn: 48206
2008-03-11 01:59:03 +00:00
Chris Lattner
98af9eac5f If a register operand comes from the variadic part of a node, don't
verify the register constraint matches what the instruction expects.

llvm-svn: 48205
2008-03-11 00:59:28 +00:00
Evan Cheng
77df19cb8c Temporarily revert 48175.
llvm-svn: 48204
2008-03-11 00:27:34 +00:00
Dan Gohman
1a65335a9b More APInt-ification.
llvm-svn: 48201
2008-03-11 00:11:06 +00:00