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Commit Graph

22 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
1dfbef8150 Fix PR9883. Make sure all caches are invalidated when a live range is repaired.
The previous invalidation missed the alias interference caches.

Also add a stats counter for the number of repaired ranges.

llvm-svn: 131133
2011-05-10 17:37:41 +00:00
Jakob Stoklund Olesen
940b7d46d3 Tag cached interference with a user-provided tag instead of the virtual register number.
The live range of a virtual register may change which invalidates the cached
interference information.

llvm-svn: 127772
2011-03-16 22:56:11 +00:00
Jakob Stoklund Olesen
505c6fac89 Change the RAGreedy register assignment order so large live ranges are allocated first.
This is based on the observation that long live ranges are more difficult to
allocate, so there is a better chance of solving the puzzle by handling the big
pieces first. The allocator will evict and split long alive ranges when they get
in the way.

RABasic is still using spill weights for its priority queue, so the interface to
the queue has been virtualized.

llvm-svn: 126259
2011-02-22 23:01:52 +00:00
Jakob Stoklund Olesen
d324b906a8 Evict a lighter single interference before attempting to split a live range.
Registers are not allocated strictly in spill weight order when live range
splitting and spilling has created new shorter intervals with higher spill
weights.

When one of the new heavy intervals conflicts with a single lighter interval,
simply evict the old interval instead of trying to split the heavy one.

The lighter interval is a better candidate for splitting, it has a smaller use
density.

llvm-svn: 125151
2011-02-09 01:14:03 +00:00
Cameron Zwarich
292870da06 Add a missing word to a comment.
llvm-svn: 122625
2010-12-29 04:42:39 +00:00
Jakob Stoklund Olesen
db4b62f32e Make the -verify-regalloc command line option available to base classes as
RegAllocBase::VerifyEnabled.

Run the machine code verifier in a few interesting places during RegAllocGreedy.

llvm-svn: 122107
2010-12-17 23:16:35 +00:00
Jakob Stoklund Olesen
a523d5f048 Add named timer groups for the different stages of register allocation.
llvm-svn: 121604
2010-12-11 00:19:56 +00:00
Jakob Stoklund Olesen
ef80efea1d Move MRI into RegAllocBase. Clean up debug output a bit.
llvm-svn: 121599
2010-12-10 23:49:00 +00:00
Andrew Trick
ec37b93b07 Added register reassignment prototype to RAGreedy. It's a simple
heuristic to reshuffle register assignments when we can't find an
available reg.

llvm-svn: 121388
2010-12-09 18:15:21 +00:00
Jakob Stoklund Olesen
3c81b6a50b Store (priority,regnum) pairs in the priority queue instead of providing an
abstract priority queue interface in subclasses that want to override the
priority calculations.

Subclasses must provide a getPriority() implementation instead.

This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.

It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.

Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.

When someone invents a stable spill weight representation, it can be reused for
allocation priorities.

llvm-svn: 121294
2010-12-08 22:22:41 +00:00
Jakob Stoklund Olesen
77e7ad803a Move RABasic::addMBBLiveIns to the base class, it is generally useful.
Minor optimization to the use of IntervalMap iterators. They are fairly
heavyweight, so prefer SI.valid() over SI != end().

llvm-svn: 121217
2010-12-08 01:06:06 +00:00
Jakob Stoklund Olesen
9d6472e894 Switch LiveIntervalUnion from std::set to IntervalMap.
This speeds up RegAllocBasic by 20%, not counting releaseMemory which becomes
way faster.

llvm-svn: 121201
2010-12-07 23:18:47 +00:00
Andrew Trick
89dd5f7eac Coding style. No significant functionality. Abandon linear scan style
in favor of the widespread llvm style. Capitalize variables and add
newlines for visual parsing. Rename variables for readability.
And other cleanup.

llvm-svn: 120490
2010-11-30 23:18:47 +00:00
Andrew Trick
5e77065d78 Check TRI->getReservedRegs because other allocators do it. Even though
it makes no sense for allocation_order iterators to visit reserved regs.
The inline spiller depends on AliasAnalysis.
Manage the Query state to avoid uninitialized or stale results.

llvm-svn: 118800
2010-11-11 17:46:29 +00:00
Andrew Trick
9d60f59b55 RABasic is nearly functionally complete. There are a few remaining
benchmarks hitting an assertion.
Adds LiveIntervalUnion::collectInterferingVRegs.
Fixes "late spilling" by checking for any unspillable live vregs among
all physReg aliases.

llvm-svn: 118701
2010-11-10 19:18:47 +00:00
Andrew Trick
374490bf92 Adds RABasic verification and tracing.
(retry now that the windows build is green)

llvm-svn: 118630
2010-11-09 21:04:34 +00:00
Andrew Trick
6b9d6df8c3 Reverting r118604. Windows build broke.
llvm-svn: 118613
2010-11-09 19:47:51 +00:00
Andrew Trick
ce7b5df15e Adds RABasic verification and tracing.
llvm-svn: 118604
2010-11-09 19:01:17 +00:00
Andrew Trick
45ec210e3c Adds support for spilling previously allocated live intervals to
handle cases in which a register is unavailable for spill code.
Adds LiveIntervalUnion::extract. While processing interferences on a
live virtual register, reuses the same Query object for each
physcial reg.

llvm-svn: 118423
2010-11-08 18:02:08 +00:00
Andrew Trick
06fb7ed472 Jakob's review of the basic register allocator.
llvm-svn: 117384
2010-10-26 18:34:01 +00:00
Andrew Trick
4043309a54 Nonvirtual dtor that was accessible enough to be bad.
llvm-svn: 117180
2010-10-22 23:33:19 +00:00
Andrew Trick
7a1dadd47d This is a prototype of an experimental register allocation
framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting. 

A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.

llvm-svn: 117174
2010-10-22 23:09:15 +00:00