Oscar Fuentes
a2b285ef48
CMake: Reflected changes on the CellSPU target build. May require a
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clean start.
llvm-svn: 58924
2008-11-08 20:37:19 +00:00
Oscar Fuentes
486fd29325
Fixed a pasto.
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llvm-svn: 58923
2008-11-08 20:34:18 +00:00
Scott Michel
4a683f438d
CellSPU: Bring SPU's assembly printer more in-line with current LLVM code
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structure. Assembly printer now outputs the correct section for strings.
llvm-svn: 58921
2008-11-08 18:59:02 +00:00
Anton Korobeynikov
e3b9284fa8
Factor out offset printing code into generic AsmPrinter.
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FIXME: it seems, that most of targets don't support
offsets wrt CPI/GlobalAddress', was it intentional?
llvm-svn: 58917
2008-11-08 17:21:38 +00:00
Nicolas Geoffray
76100fd4de
The Index field of an AttributeWithIndex is of type unsigned, not uint16_t.
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llvm-svn: 58908
2008-11-08 15:36:01 +00:00
Anton Korobeynikov
3af4269671
StoreInst does not produce any result thus it's useless to create new
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variable for it. This greatly reduces amount of unused variables in
llvm2cpp-generated code
llvm-svn: 58905
2008-11-08 12:58:07 +00:00
Evan Cheng
e5b6b3f81f
Moved InvalidateInstructionCache to ARMJITInfo::emitFunctionStub which knows size of stub.
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llvm-svn: 58899
2008-11-08 08:16:49 +00:00
Evan Cheng
3d9c134136
Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr.
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llvm-svn: 58897
2008-11-08 08:02:53 +00:00
Evan Cheng
cfa57662d1
Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated.
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llvm-svn: 58896
2008-11-08 07:38:22 +00:00
Evan Cheng
f2ebaa6a64
Fix relocation for calls to external symbols.
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llvm-svn: 58893
2008-11-08 07:22:33 +00:00
Scott Michel
70cc5f61b2
CellSPU: Fix prologue/epilogue emission when function contains calls but
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theframe size is 0; the prologue and epilogue should be emitted in this case.
llvm-svn: 58890
2008-11-08 05:16:20 +00:00
Evan Cheng
064befa37b
Skip over two-address use operands.
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llvm-svn: 58883
2008-11-08 01:44:13 +00:00
Evan Cheng
bc946b09aa
Handle ARM machine constantpool entry with non-lazy ptr.
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llvm-svn: 58882
2008-11-08 01:31:27 +00:00
Evan Cheng
2ea87890bb
Use ARMFunctionInfo to track number of constpool entries and jumptables.
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llvm-svn: 58877
2008-11-08 00:51:41 +00:00
Evan Cheng
bf8a1ef40f
More code clean up.
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llvm-svn: 58872
2008-11-07 22:57:53 +00:00
Dale Johannesen
bc914a7cf9
Make FP tests requiring two compares work on PPC (PR 642).
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This is Chris' patch from the PR, modified to realize that
SETUGT/SETULT occur legitimately with integers, plus
two fixes in LegalizeDAG to pass a valid result type into
LegalizeSetCC. The argument of TLI.getSetCCResultType is
ignored on PPC, but I think I'm following usage elsewhere.
llvm-svn: 58871
2008-11-07 22:54:33 +00:00
Evan Cheng
3e00dcfebb
Get PIC jump table working.
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llvm-svn: 58869
2008-11-07 22:30:53 +00:00
Dan Gohman
1418c52e1a
Flush the raw_ostream after emitting the assembly for a function.
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This is a temporary fix for the -print-emitted-asm option, where
errs() is used as the stream, in the case where other code is
using stderr without using errs()' buffer. Hopefully soon we'll
fix errs() to be non-buffered instead. Patch by Preston Gurd.
llvm-svn: 58859
2008-11-07 19:49:17 +00:00
Richard Osborne
224268f88b
Fix compile warnings.
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llvm-svn: 58840
2008-11-07 11:21:09 +00:00
Scott Michel
b5f73899a2
CellSPU: Ensure that C strings are always put in the .rodata section
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llvm-svn: 58839
2008-11-07 11:06:44 +00:00
Richard Osborne
acc7a27e24
Add XCore backend.
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llvm-svn: 58838
2008-11-07 10:59:00 +00:00
Evan Cheng
21df9f3b4f
Jump table JIT support. Work in progress.
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llvm-svn: 58836
2008-11-07 09:06:08 +00:00
Scott Michel
828731190c
Teach CellSPU about ELF sections and new section emitter classes.
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NB: This is likely to need more work.
llvm-svn: 58832
2008-11-07 04:36:25 +00:00
Evan Cheng
88726d85eb
Encode misc arithmetic instructions.
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llvm-svn: 58828
2008-11-07 01:41:35 +00:00
Evan Cheng
3bcb71912f
Encode extend instructions; more clean up.
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llvm-svn: 58818
2008-11-06 22:15:19 +00:00
Evan Cheng
af54e4ed18
- Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm.
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- Consolidate instruction formats.
- Other clean up.
llvm-svn: 58808
2008-11-06 17:48:05 +00:00
Evan Cheng
aa24d19533
Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug.
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llvm-svn: 58800
2008-11-06 08:47:38 +00:00
Mon P Wang
41f90a3ee5
Widening cleanup
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llvm-svn: 58796
2008-11-06 05:31:54 +00:00
Evan Cheng
078361bddc
Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.
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llvm-svn: 58793
2008-11-06 03:35:07 +00:00
Evan Cheng
058721d10b
Fix so_imm encoding bug; add support for MOVi2pieces.
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llvm-svn: 58790
2008-11-06 02:25:39 +00:00
Evan Cheng
ca6759021b
Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls.
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llvm-svn: 58789
2008-11-06 01:21:28 +00:00
Evan Cheng
ce97712aa6
Encode pic load / store instructions; fix some encoding bugs.
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llvm-svn: 58780
2008-11-05 23:22:34 +00:00
Evan Cheng
9970c31dcf
Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions.
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llvm-svn: 58764
2008-11-05 18:35:52 +00:00
Dan Gohman
1db84e57c5
Reintroduce a comment that was removed with the AddToISelQueue
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changes.
llvm-svn: 58760
2008-11-05 17:16:24 +00:00
Richard Osborne
efd7edc731
Test commit, add Makefile for XCore target, more to follow.
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llvm-svn: 58755
2008-11-05 09:53:58 +00:00
Evan Cheng
1378d6c7a9
Add more vector move low and zero-extend patterns.
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llvm-svn: 58752
2008-11-05 06:04:51 +00:00
Evan Cheng
fdd6d65e39
Indentation.
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llvm-svn: 58750
2008-11-05 06:03:38 +00:00
Dan Gohman
cd4b68bee9
Eliminate the ISel priority queue, which used the topological order for a
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priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
llvm-svn: 58748
2008-11-05 04:14:16 +00:00
Dan Gohman
215587186e
Use getTargetConstant instead of getConstant for nodes that should not be visited
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by isel and potentially forced into registers.
llvm-svn: 58747
2008-11-05 02:06:09 +00:00
Evan Cheng
2702e22b83
Rename isGVLazyPtr to isGVNonLazyPtr relocation. This represents Mac OS X
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indirect gv reference. Please don't call it lazy.
llvm-svn: 58746
2008-11-05 01:50:32 +00:00
Evan Cheng
59112bc108
Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.
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llvm-svn: 58725
2008-11-04 22:19:55 +00:00
Evan Cheng
45496b349f
Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes.
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llvm-svn: 58714
2008-11-04 19:57:48 +00:00
Evan Cheng
d63b7563b7
Debug output tweak.
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llvm-svn: 58708
2008-11-04 17:58:53 +00:00
Evan Cheng
088f7c51a4
LDM_RET restores pc, do not set 's' bit which would restore CPSR from SPSR.
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llvm-svn: 58707
2008-11-04 17:57:07 +00:00
Evan Cheng
28e234a959
For some targets, it's not possible to place GVs in the same memory buffer as the MachineCodeEmitter allocated memory. Code and data has different read / write / execution privilege requirements.
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This is a short term workaround. The current solution is for the JIT memory manager to manage code and data memory separately.
llvm-svn: 58688
2008-11-04 09:30:48 +00:00
Evan Cheng
f15a9cfb31
Stylistic change.
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llvm-svn: 58683
2008-11-04 06:10:06 +00:00
Evan Cheng
f117632c3f
Handle ARM machine constantpool entries.
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llvm-svn: 58671
2008-11-04 00:50:32 +00:00
Dan Gohman
0ba8aad1af
The ANDMask node folds to a constant, and isn't the node that needs to
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have its node id set. The new and and shift nodes are the nodes that need
the IDs. This fixes PR2982.
llvm-svn: 58655
2008-11-03 23:43:55 +00:00
Evan Cheng
999398c004
Remove a dead switch statement.
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llvm-svn: 58644
2008-11-03 21:26:52 +00:00
Evan Cheng
b3fd30ed7c
Minor code restructuring. No functionality change.
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llvm-svn: 58643
2008-11-03 21:02:39 +00:00