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Commit Graph

149278 Commits

Author SHA1 Message Date
Vadzim Dambrouski
a328f25e7f [MSP430] Add subtarget features for hardware multiplier.
Also add more processors to make -mcpu option behave similar to gcc.

Differential Revision: https://reviews.llvm.org/D33335

llvm-svn: 303695
2017-05-23 21:49:42 +00:00
Tim Northover
03923e811e Sema: allow imaginary constants via GNU extension if UDL overloads not present.
C++14 added user-defined literal support for complex numbers so that you can
write something like "complex<double> val = 2i". However, there is an existing
GNU extension supporting this syntax and interpreting the result as a _Complex
type.

This changes parsing so that such literals are interpreted in terms of C++14's
operators if an overload is present but otherwise falls back to the original
GNU extension.

llvm-svn: 303694
2017-05-23 21:41:49 +00:00
Reid Kleckner
db1d4c56a6 Silence MSVC warning about unsigned integer overflow, which has defined behavior
llvm-svn: 303693
2017-05-23 21:35:32 +00:00
Francis Visoiu Mistrih
9515ddb7fd abtest: remove duplicate script
This is fixing a mistake from r303690.

Differential Revision: https://reviews.llvm.org/D33303

llvm-svn: 303692
2017-05-23 21:28:41 +00:00
Simon Pilgrim
04596189c2 [AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045)
This fixes 17 of the 41 -verify-machineinstrs test failures identified in PR33045

Differential Revision: https://reviews.llvm.org/D33451

llvm-svn: 303691
2017-05-23 21:27:15 +00:00
Francis Visoiu Mistrih
4aa7483a63 AsmPrinter: mark the beginning and the end of a function in verbose mode
llvm-svn: 303690
2017-05-23 21:22:16 +00:00
Tom Stellard
082356cda2 merge-request.sh: Use https url for bugzilla
With the http url, the script fails with:

Connection lost/failed: 411 Client Error: Length Required

llvm-svn: 303685
2017-05-23 20:35:38 +00:00
Changpeng Fang
a2949e55f0 AMDGPU/SI: Move the local memory usage related checking after calling convention checking in PromoteAlloca
Summary:
  Promoting Alloca to Vector and Promoting Alloca to LDS are two independent handling of Alloca and should not affect each other.
As a result, we should not give up promoting to vector if there is not enough LDS. This patch factors out the local memory usage
related checking out and replace it after the calling convention checking.

Reviewer:
  arsenm

Differential Revision:
  http://reviews.llvm.org/D33139

llvm-svn: 303684
2017-05-23 20:25:41 +00:00
Daniel Sanders
00072f58f8 Fix unused variable warnings after r303678
This should fix lld-x86_64-darwin13

llvm-svn: 303683
2017-05-23 20:02:48 +00:00
Geoff Berry
30786023f2 [AArch64][Falkor] Refine sched details for LSLfast/ASRfast.
llvm-svn: 303682
2017-05-23 19:57:45 +00:00
Stanislav Mekhanoshin
6d04b87725 [AMDGPU] Combine and (srl) into shl (bfe)
Perform DAG combine:
and (srl x, c), mask => shl (bfe x, nb + c, mask >> nb), nb
Where nb is a number of trailing zeroes in mask.

It replaces two instructions with two and BFE is generally a more
expensive one. However this is only done if we are selecting a byte
or word at an aligned boundary which results in a proper SDWA
operand pattern. It is only done if SDWA is supported.

TODO: improve SDWA pass to actually convert this pattern. It is not
done now because we have an immediate in the instruction, which has
be moved into a VGPR.

Differential Revision: https://reviews.llvm.org/D33455

llvm-svn: 303681
2017-05-23 19:54:48 +00:00
Geoff Berry
267ecfb00c [AArch64][Falkor] Fix sched details for FMOV of WZR/XZR.
llvm-svn: 303680
2017-05-23 19:54:28 +00:00
Oleg Ranevskyy
12688b77bb [ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation
Summary:
A temporary workaround for PR32780 - rematerialized instructions accessing the same promoted global through different constant pool entries.

The patch turns off the globals promotion optimization leaving all its code in place, so that it can be easily turned on once PR32780 is fixed.

Since this is a miscompilation issue causing generation of misbehaving code, and the problem is very subtle, the patch might be valuable enough to get into 4.0.1.

Reviewers: efriedma, jmolloy

Reviewed By: efriedma

Subscribers: aemerson, javed.absar, llvm-commits, rengolin, asl, tstellar

Differential Revision: https://reviews.llvm.org/D33446

llvm-svn: 303679
2017-05-23 19:38:37 +00:00
Daniel Sanders
fa3e6b4d4e [globalisel][tablegen] Add support for (set $dst, 1) and test X86's OptForSize predicate.
Summary:
It's rare but a small number of patterns use IntInit's at the root of the match.
On X86, one such rule is enabled by the OptForSize predicate and causes the
compiler to use the smaller:
	%0 = MOV32r1
instead of the usual:
	%0 = MOV32ri 1

This patch adds support for matching IntInit's at the root and uses this as a
test case for the optsize attribute that was implemented in r301750

Reviewers: qcolombet, ab, t.p.northover, rovka, kristof.beyls, aditya_nandakumar

Reviewed By: qcolombet

Subscribers: igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D32791

llvm-svn: 303678
2017-05-23 19:33:16 +00:00
Zachary Turner
8d54831bad [CodeView] Eliminate redundant hashes and allocations.
When writing field list records, we would construct a temporary
type serializer that shared a bump ptr allocator with the rest
of the application, so anything allocated from here would live
forever.  Furthermore, this temporary serializer had all the
properties of a full blown serializer including record hashing
and de-duplication.

These features are required when you're merging multiple type
streams into each other, because different streams may contain
identical records, but records from the same type stream will
never collide with each other.  So all of this hashing was
unnecessary.

To solve this, two fixes are made:

1) The temporary serializer keeps its own bump ptr allocator
instead of sharing a global one.  When it's finished, all of
its memory is freed.

2) Instead of using the same temporary serializer for the life
of an entire type stream, we use it only for the life of a single
field list record and delete it when the field list record is
completed.  This way the hash table will not grow as other
records from the same type stream get inserted.  Further improvements
could eliminate hashing entirely from this codepath.

This reduces the link time by 85% in my test, from 1 minute to 9
seconds.

llvm-svn: 303676
2017-05-23 18:56:23 +00:00
Nirav Dave
904f5d5652 [DAG] Add AddressSpace parameter to canMergeStoresTo. NFC.
llvm-svn: 303673
2017-05-23 18:53:02 +00:00
Craig Topper
feeefe7bdd [InstSimplify] Add more tests for undef inputs and multiplying by 0 for the add/sub/mul with overflow intrinsics. NFC
llvm-svn: 303671
2017-05-23 18:42:58 +00:00
Yuka Takahashi
4bbc54e1f4 [GSoC] Shell autocompletion for clang
Summary:
This is a first patch for GSoC project, bash-completion for clang.
To use this on bash, please run `source clang/utils/bash-autocomplete.sh`.
bash-autocomplete.sh is code for bash-completion.

Simple flag completion and path completion is available in this patch.

Reviewers: teemperor, v.g.vassilev, ruiu, Bigcheese, efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33237

llvm-svn: 303670
2017-05-23 18:39:08 +00:00
David Blaikie
07e8fd0230 Fix DIEHash refactoring that dropped the DW_AT_name from the hash
llvm-svn: 303669
2017-05-23 18:36:07 +00:00
Nirav Dave
2c785ad0a0 [DAG] Add canMergeStoresTo predicate checks. NFCI.
Propagate canMergeStoresTo checks to missing cases in StoreMerge.

llvm-svn: 303668
2017-05-23 18:33:09 +00:00
Reid Kleckner
4cc7d18894 Speculative build fix for non-Windows
llvm-svn: 303667
2017-05-23 18:28:13 +00:00
David Blaikie
71e281278b Refactor DWARF hashing to use a .def file to avoid repetition
llvm-svn: 303666
2017-05-23 18:27:09 +00:00
Reid Kleckner
c175e28bde [PDB] Hash types up front when merging types instead of using StringMap
Summary:
First, StringMap uses llvm::HashString, which is only good for short
identifiers and really bad for large blobs of binary data like type
records. Moving to `DenseMap<StringRef, TypeIndex>` with some tricks for
memory allocation fixes that.

Unfortunately, that didn't buy very much performance. Profiling showed
that we spend a long time during DenseMap growth rehashing existing
entries. Also, in general, DenseMap is faster when the keys are small.
This change takes that to the logical conclusion by introducing a small
wrapper value type around a pointer to key data. The key data contains a
precomputed hash, the original record data (pointer and size), and the
type index, which is the "value" of our original map.

This reduces the time to produce llvm-as.exe and llvm-as.pdb from ~15s
on my machine to 3.5s, which is about a 4x improvement.

Reviewers: zturner, inglorion, ruiu

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33428

llvm-svn: 303665
2017-05-23 18:23:59 +00:00
Craig Topper
3cbbe33e26 [InstSimplify] auto-generate test checks. NFC
llvm-svn: 303664
2017-05-23 17:57:36 +00:00
Sanjay Patel
72010c7271 [InstCombine] auto-generate test checks; NFC
llvm-svn: 303663
2017-05-23 17:51:22 +00:00
Sanjay Patel
5e73758477 [InstCombine] allow icmp-xor folds for vectors (PR33138)
This fixes the first part of:
https://bugs.llvm.org/show_bug.cgi?id=33138

More work is needed for the bitcasted variant.

llvm-svn: 303660
2017-05-23 17:29:58 +00:00
Craig Topper
4530cf2da1 [InstCombine] Use update_test_checks to regenerate the ctpop test. NFC
llvm-svn: 303659
2017-05-23 17:20:18 +00:00
Marek Olsak
4d884f9639 AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns
This is just a cleanup. Also, it adds checking that ByteCount is aligned to 4.

Reviewers: arsenm, nhaehnle, tstellarAMD

Subscribers: kzhuravl, wdng, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28994

llvm-svn: 303658
2017-05-23 17:14:34 +00:00
Reid Kleckner
00a53135b8 Commit AttributeList change that was supposed to be part of r303654
llvm-svn: 303656
2017-05-23 17:03:28 +00:00
Ulrich Weigand
8018dd8b34 [RuntimeDyld, PowerPC] Fix regression from r303637
Actually, to identify external symbols, we need to check for
*either* non-null Value.SymbolName *or* a SymType of
Symbol::ST_Unknown.

The former may happen for symbols not known to the JIT at all
(e.g. defined in a native library), while the latter happens
for symbols known to the JIT, but defined in a different module.

Fixed several regressions on big-endian ppc64.

llvm-svn: 303655
2017-05-23 17:03:23 +00:00
Reid Kleckner
d972bf8fab [IR] Switch AttributeList to use an array for O(1) access
Summary:
Before this change, AttributeLists stored a pair of index and
AttributeSet. This is memory efficient if most arguments do not have
attributes. However, it requires doing a search over the pairs to test
an argument or function attribute. Profiling shows that this loop was
0.76% of the time in 'opt -O2' of sqlite3.c, because LLVM constantly
tests values for nullability.

This was worth about 2.5% of mid-level optimization cycles on the
sqlite3 amalgamation. Here are the full perf results:
https://reviews.llvm.org/P7995

Here are just the before and after cycle counts:
```
$ perf stat -r 5 ./opt_before -O2 sqlite3.bc -o /dev/null
    13,274,181,184      cycles                    #    3.047 GHz                      ( +-  0.28% )
$ perf stat -r 5 ./opt_after -O2 sqlite3.bc -o /dev/null
    12,906,927,263      cycles                    #    3.043 GHz                      ( +-  0.51% )
```

This patch *does not* change the indices used to query attributes, as
requested by reviewers. Tracking whether an index is usable for array
indexing is a huge pain that affects many of the internal APIs, so it
would be good to come back later and do a cleanup to remove this
internal adjustment.

Reviewers: pete, chandlerc

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D32819

llvm-svn: 303654
2017-05-23 17:01:48 +00:00
Sanjay Patel
913a69aacc [InstCombine] add icmp-xor tests to show vector neglect; NFC
Also, rename the tests and the file, add comments, and add more tests
because there are no existing tests for some of these folds.

These patterns are particularly important for crippled vector ISAs that
have limited compare predicates (PR33138).

llvm-svn: 303652
2017-05-23 16:53:05 +00:00
Stanislav Mekhanoshin
683af00312 [AMDGPU] Convert shl (add) into add (shl)
shl (or|add x, c2), c1 => or|add (shl x, c1), (c2 << c1)
This allows to fold a constant into an address in some cases as
well as to eliminate second shift if the expression is used as
an address and second shift is a result of a GEP.

Differential Revision: https://reviews.llvm.org/D33432

llvm-svn: 303641
2017-05-23 15:59:58 +00:00
Zachary Turner
b2aaa328db Revert "Make TypeSerializer's StringMap use the same allocator."
This reverts commit e34ccb7b57da25cc89ded913d8638a2906d1110a.

This is causing failures on the ASAN bots.

llvm-svn: 303640
2017-05-23 15:50:37 +00:00
Simon Atanasyan
8e4f055c3d [mips] Remove unused class field. NFC
llvm-svn: 303639
2017-05-23 15:00:30 +00:00
Simon Atanasyan
b7a276df56 [mips] Change type of MipsSubtarget ctor arguments s/std::string/StringRef/. NFC
llvm-svn: 303638
2017-05-23 15:00:26 +00:00
Ulrich Weigand
1c8e58ce82 [RuntimeDyld, PowerPC] Fix check for external symbols when detecting reloction overflow
The PowerPC part of processRelocationRef currently assumes that external
symbols can be identified by checking for SymType == SymbolRef::ST_Unknown.
This is actually incorrect in some cases, causing relocation overflows to
be mis-detected. The correct check is to test whether Value.SymbolName
is null.

Includes test case. Note that it is a bit tricky to replicate the exact
condition that triggers the bug in a test case. The one included here
seems to fail reliably (before the fix) across different operating
system versions on Power, but it still makes a few assumptions (called
out in the test case comments).

Also add ppc64le platform name to the supported list in the lit.local.cfg
files for the MCJIT and OrcMCJIT directories, since those tests were
currently not run at all.

Fixes PR32650.

Reviewer: hfinkel

Differential Revision: https://reviews.llvm.org/D33402

llvm-svn: 303637
2017-05-23 14:51:18 +00:00
Anna Thomas
a3044c7cda [JumpThreading] Safely replace uses of condition
This patch builds over https://reviews.llvm.org/rL303349 and replaces
the use of the condition only if it is safe to do so.

We should not blindly RAUW the condition if experimental.guard or assume
is a use of that
condition. This is because LVI may have used the guard/assume to
identify the
value of the condition, and RUAWing will fold the guard/assume and uses
before the guards/assumes.

Reviewers: sanjoy, reames, trentxintong, mkazantsev

Reviewed by: sanjoy, reames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33257

llvm-svn: 303633
2017-05-23 13:36:25 +00:00
Ulrich Weigand
a9fdeda7a8 [RuntimeDyld, PowerPC] Fix relocation detection overflow
Code in RuntimeDyldELF currently uses 32-bit temporaries to detect
whether a PPC64 relocation target is out of range. This is incorrect,
and can mis-detect overflow where the distance between relocation site
and target is close to a multiple of 4GB. Fixed by using 64-bit
temporaries.

Noticed while debugging PR32650.

Reviewer: hfinkel

Differential Revision: https://reviews.llvm.org/D33403

llvm-svn: 303632
2017-05-23 12:43:57 +00:00
Sam Kolton
82a8c72e68 [AMDGPU] SDWA: Add assembler support for GFX9
Summary:
Added separate pseudo and real instruction for GFX9 SDWA instructions.
Currently supports only in assembler.
Depends D32493

Reviewers: vpykhtin, artem.tamazov

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D33132

llvm-svn: 303620
2017-05-23 10:08:55 +00:00
Florian Hahn
36a235023f [AArch64] Make instruction fusion more aggressive.
Summary:
This patch makes instruction fusion more aggressive by
* adding artificial edges between the successors of FirstSU and
  SecondSU, similar to BaseMemOpClusterMutation::clusterNeighboringMemOps.
* updating PostGenericScheduler::tryCandidate to keep clusters together,
   similar to GenericScheduler::tryCandidate.

This change increases the number of AES instruction pairs generated on
 Cortex-A57 and Cortex-A72. This doesn't change code at all in
 most benchmarks or general code, but we've seen improvement on kernels
 using AESE/AESMC and AESD/AESIMC. 

Reviewers: evandro, kristof.beyls, t.p.northover, silviu.baranga, atrick, rengolin, MatzeB

Reviewed By: evandro

Subscribers: aemerson, rengolin, MatzeB, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33230

llvm-svn: 303618
2017-05-23 09:33:34 +00:00
Igor Breger
52c4471b99 [GlobalISel][X86] G_LOAD/G_STORE vec256/512 support
Summary: mark G_LOAD/G_STORE vec256/512 legal for AVX/AVX512. Implement instruction selection.

Reviewers: zvi, guyblank

Reviewed By: zvi

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33268

llvm-svn: 303617
2017-05-23 08:23:51 +00:00
Craig Topper
6e1fb25e6c [KnownBits] Use !hasConflict() in asserts in place of Zero & One == 0 or similar. NFC
llvm-svn: 303614
2017-05-23 07:18:37 +00:00
Ayal Zaks
08b77c4665 [LV] Report multiple reasons for not vectorizing under allowExtraAnalysis
The default behavior of -Rpass-analysis=loop-vectorizer is to report only the
first reason encountered for not vectorizing, if one is found, at which time the
vectorizer aborts its handling of the loop. This patch allows multiple reasons
for not vectorizing to be identified and reported, at the potential expense of
additional compile-time, under allowExtraAnalysis which can currently be turned
on by Clang's -fsave-optimization-record and opt's -pass-remarks-missed.

Removed from LoopVectorizationLegality::canVectorize() the redundant checking
and reporting if we CantComputeNumberOfIterations, as LAI::canAnalyzeLoop() also
does that. This redundancy is caught by a lit test once multiple reasons are
reported.

Patch initially developed by Dror Barak.

Differential Revision: https://reviews.llvm.org/D33396

llvm-svn: 303613
2017-05-23 07:08:02 +00:00
David Blaikie
856a03cff5 libDebugInfo: Support symbolizing using DWP files
llvm-svn: 303609
2017-05-23 06:48:53 +00:00
Akira Hatanaka
bb4f32cc9f [AArch64] Fix PRR33100.
This commit fixes a bug introduced in r301019 where optimizeLogicalImm
would replace a logical node's immediate operand that was CSE'd and
was also an operand of another node.

This commit fixes the bug by replacing the logical node instead of its
immediate operand.

rdar://problem/32295276

llvm-svn: 303607
2017-05-23 06:08:37 +00:00
Amaury Sechet
83386d00c8 Update expected result for or-branch.ll . NFC
llvm-svn: 303606
2017-05-23 05:42:54 +00:00
Galina Kistanova
a10812e6a6 Cosmetic. Added braces to address gcc warning: suggest explicit braces to avoid ambiguous 'else' [-Wdangling-else].
llvm-svn: 303602
2017-05-23 05:00:10 +00:00
NAKAMURA Takumi
8677b7b0fe TypeStreamMerger.h: Fix a \param in r303577. [-Wdocumentation]
llvm-svn: 303601
2017-05-23 04:49:24 +00:00
Galina Kistanova
0f2caec8a0 Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through.
llvm-svn: 303597
2017-05-23 01:20:52 +00:00