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Commit Graph

121805 Commits

Author SHA1 Message Date
Philip Reames
a407871a49 Fix for pr24866
Turns out that not every basic block is guaranteed to have a node within the DominatorTree.  This is really hard to trigger, but the test case from the PR managed to do so.  There's active discussion continuing about what documentation and/or invariants needed cleaned up.

llvm-svn: 248216
2015-09-21 22:04:10 +00:00
Mehdi Amini
232f1842d4 Fix UB: can't bind a reference to nullptr (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 248213
2015-09-21 21:29:43 +00:00
David Blaikie
57458fd3a3 auto and range-for-ify some things to make changing container types a bit easier in the (possibly near) future
llvm-svn: 248212
2015-09-21 21:07:50 +00:00
Simon Pilgrim
c8b097b7ef [DAGCombiner] Improve FMA support for interpolation patterns
This patch adds support for combining patterns such as (FMUL(FADD(1.0, x), y)) and (FMUL(FSUB(x, 1.0), y)) to their FMA equivalents.

This is useful in particular for linear interpolation cases such as (FADD(FMUL(x, t), FMUL(y, FSUB(1.0, t))))

Differential Revision: http://reviews.llvm.org/D13003

llvm-svn: 248210
2015-09-21 20:32:48 +00:00
Jeroen Ketema
1c6e85f456 [ARM] Do not scale vext with a factor
The vext pseudo-instruction takes the number of elements that need to be
extracted, not the number of bytes. Hence, use the number of elements
directly instead of scaling them with a factor.

Reviewers: Silviu Baranga, James Molloy
(not reflected in the differential revision)

Differential Revision: http://reviews.llvm.org/D12974

llvm-svn: 248208
2015-09-21 20:28:04 +00:00
Simon Pilgrim
4173405f38 [DAGCombiner] Tidy up FMA combine helpers. NFCI.
Based on feedback for D13003.

llvm-svn: 248206
2015-09-21 20:15:03 +00:00
James Molloy
91b462c75d [LoopUtils,LV] Propagate fast-math flags on generated FCmp instructions
We're currently losing any fast-math flags when synthesizing fcmps for
min/max reductions. In LV, make sure we copy over the scalar inst's
flags. In LoopUtils, we know we only ever match patterns with
hasUnsafeAlgebra, so apply that to any synthesized ops.

llvm-svn: 248201
2015-09-21 19:41:19 +00:00
Stephen Canon
8d99b66558 Remove roundingMode argument in APFloat::mod
Because mod is always exact, this function should have never taken a rounding mode argument.  The actual implementation still has issues, which I'll look at resolving in a subsequent patch.

llvm-svn: 248195
2015-09-21 19:29:25 +00:00
Rafael Espindola
67bae00308 Avoid SEGFAULT if a requested symbol section is absent.
Patch by Igor Kudrin!

llvm-svn: 248194
2015-09-21 19:17:18 +00:00
Matt Arsenault
f13ea0291f Fix accidentally committed debug printing
llvm-svn: 248190
2015-09-21 18:21:10 +00:00
Chandler Carruth
64d752522d [ADT] Remove a couple of the always inline attributes I added.
Based on conversations with Justin and a few others, these constructors
are really useful to have in the executable so that you can call them
from the debugger. After some measurements, these *particular* calls
aren't so problematic as to make them a good tradeoff for always inline.

Please let me know if there are other functions really needed for
debugging. The always inline attribute is a hack that we should only
really employ when it doesn't hurt.

llvm-svn: 248188
2015-09-21 18:02:24 +00:00
Marcello Maggioni
d849f468b0 [DivergenceAnalysis] Separated definition of class into header.
The definition of the DivergenceAnalysis pass was in a CPP
file and wasn't accessible to users of the analysis to get it
through "getAnalysis<>()".
This patch extracts the definition into a separate header that
can be used by users of the analysis to fetch the results.

Patch by Volkan Keles (vkeles@apple.com)

llvm-svn: 248186
2015-09-21 17:58:14 +00:00
Matthias Braun
78f4e8b09f SelectionDAG: Use InsertNode for EntryNode
This fixes problems where two nodes have persistent debug id 0 assigned.

llvm-svn: 248182
2015-09-21 17:41:05 +00:00
Chandler Carruth
121df1c86d [FunctionAttrs] Extract a helper function for the core logic used to
evaluate whether 'readonly' or 'readnone' apply to a given function.
This both reduces indentation and will make it easy to share the logic
with a new pass manager implementation.

llvm-svn: 248181
2015-09-21 17:39:41 +00:00
Ulrich Weigand
ac3a1a8604 [SystemZ] Fix expansion of ISD::FPOW and ISD::FSINCOS
The ISD::FPOW and ISD::FSINCOS opcodes default to Legal, but there
is no legal instruction for those on SystemZ.  This could cause
LLVM internal errors.  Fixed by setting the operation action to
Expand for those opcodes.

Also added test cases for all other LLVM IR intrinsics that should
generate a library call.  (Those already work correctly since the
default operation action is fine.)

llvm-svn: 248180
2015-09-21 17:35:45 +00:00
James Molloy
30ca0bc2fd Revert "[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def"
This was committed without the code review (http://reviews.llvm.org/D12937) being approved.

This reverts commit r248152.

llvm-svn: 248174
2015-09-21 16:35:08 +00:00
Matt Arsenault
d11e19c4fd AMDGPU: Move copy handling under switch like other instructions
llvm-svn: 248172
2015-09-21 16:27:22 +00:00
Sanjay Patel
22afdec520 add ShouldChangeType() variant that takes bitwidths
This is more efficient for cases like D12965 where we already have widths.

llvm-svn: 248170
2015-09-21 16:09:37 +00:00
Matt Arsenault
70e6ce5a40 DAGCombiner: Replace store of FP constant after attemping store merges
If storing multiple FP constants, some subset of the stores
would be replaced with integers due to visit order, so
MergeConsecutiveStores would only partially merge
these.

llvm-svn: 248169
2015-09-21 15:59:46 +00:00
Matt Arsenault
8ca1f284ae Factor replacement of stores of FP constants into new function
llvm-svn: 248168
2015-09-21 15:59:43 +00:00
Matt Arsenault
ff8d6555b0 Fix missing C++ mode comment
llvm-svn: 248167
2015-09-21 15:59:41 +00:00
Sanjay Patel
ba0b11252c don't repeat function names in comments; NFC
llvm-svn: 248166
2015-09-21 15:33:26 +00:00
Chad Rosier
432f88b93e [Machine Combiner] Refactor machine reassociation code to be target-independent.
No functional change intended.
Patch by Haicheng Wu <haicheng@codeaurora.org>!

http://reviews.llvm.org/D12887
PR24522

llvm-svn: 248164
2015-09-21 15:09:11 +00:00
Artyom Skrobov
cfadb3d603 [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def
Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in a
hand-rolled tricky condition block in tools/clang/lib/Basic/Targets.cpp, with
a FIXME: attached.

This patch changes the handling of +t2dsp to be in line with other
architecture extensions.

Following review comments, also updating the description of FeatureDSPThumb2
in ARM.td.

Differential Revision: http://reviews.llvm.org/D12937

llvm-svn: 248152
2015-09-21 12:43:10 +00:00
Asaf Badouh
8011b4b495 [X86][AVX512] add masked version for RSQRT14 & RCP14 Scalar FP
Differential Revision: http://reviews.llvm.org/D12524

llvm-svn: 248147
2015-09-21 10:23:53 +00:00
Daniel Sanders
819218ffe8 [mips] Allow constant expressions in second argument of .cpsetup.
Summary:
Also tightened up the test and made a trivial fix to prevent double-newline
after emitting .cpsetup directives.

Reviewers: vkalintiris

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D12956

llvm-svn: 248143
2015-09-21 09:26:55 +00:00
Craig Topper
e3fc758778 Use makeArrayRef or None to avoid unnecessarily mentioning the ArrayRef type extra times. NFC
llvm-svn: 248140
2015-09-21 05:32:41 +00:00
Craig Topper
fd37494dd2 Don't pass StringRefs around by const reference. Pass by value instead per coding standards. NFC
llvm-svn: 248136
2015-09-21 00:18:00 +00:00
Craig Topper
280987c301 Cleanup places that passed SMLoc by const reference to pass it by value instead. NFC
llvm-svn: 248135
2015-09-20 23:35:59 +00:00
Sanjoy Das
ee4b307fb2 [IndVars] Use C++11 style field initialization; NFCI.
llvm-svn: 248131
2015-09-20 18:42:53 +00:00
Sanjoy Das
80655d90c3 [IndVars] Don't add a level of indentation for namespace {. NFC.
Whitespace-only change.

llvm-svn: 248130
2015-09-20 18:42:50 +00:00
Sanjay Patel
2feca45a6c add test file ahead of any functional changes for PR22428
llvm-svn: 248123
2015-09-20 15:58:00 +00:00
Simon Pilgrim
162ca60e5b [X86][SSE] Intrinsics builtins test refresh. NFCI
llvm-svn: 248122
2015-09-20 15:41:35 +00:00
Igor Breger
a833017e0d AVX512: Implemented encoding and intrinsics for vcmpss/sd.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D12593

llvm-svn: 248121
2015-09-20 15:15:10 +00:00
Asaf Badouh
4ce11a0a36 [X86][AVX512] extend support in Scalar conversion
add scalar FP to Int conversion with truncation intrinsics
add scalar conversion FP32 from/to FP64 intrinsics
add rounding mode and SAE mode encoding for these intrinsics

Differential Revision: http://reviews.llvm.org/D12665

llvm-svn: 248117
2015-09-20 14:31:19 +00:00
Igor Breger
6c78cd17ac AVX512: vsqrtss/sd encoding and intrinsics implementation.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D12102

llvm-svn: 248116
2015-09-20 09:13:41 +00:00
Asaf Badouh
981ab82bef [X86][AVX512DQ] Add fpclass instruction
Differential Revision: http://reviews.llvm.org/D12931

llvm-svn: 248115
2015-09-20 08:46:07 +00:00
Michael Kuperstein
516836f0c5 [X86] Fix sitofp and uitofp instruction matching failures with long double and avx512
The operation action for i32 and i64 cannot be set to legal, as long double 
needs custom lowering.

Patch by: mitch.l.bodart@intel.com
Differential Revision: http://reviews.llvm.org/D12372

llvm-svn: 248114
2015-09-20 08:12:17 +00:00
Igor Breger
5be1c75e87 AVX512: Implemented intrinsics for vshuff32x4, vshuff64x2, vshufi64x2, vshufi32x4
Added tests for intrinsics.

Differential Revision: http://reviews.llvm.org/D12525

llvm-svn: 248113
2015-09-20 07:18:53 +00:00
Sanjoy Das
ddd0454eef [IndVars] Don't repeat function names in comment; NFC.
Only changes comments.

llvm-svn: 248112
2015-09-20 06:58:03 +00:00
Igor Breger
43e0d98a01 AVX512: Implement instructions encoding, lowering and intrinsics
vinserti64x4, vinserti64x2, vinserti32x8, vinserti32x4, vinsertf64x4, vinsertf64x2, vinsertf32x8, vinsertf32x4
Added tests for encoding, lowering and intrinsics.

Differential Revision: http://reviews.llvm.org/D11893

llvm-svn: 248111
2015-09-20 06:52:42 +00:00
Saleem Abdulrasool
e7f4599d69 ARM: cleanup formatting
clang-format a line which was poorly formatted.  NFC.

llvm-svn: 248110
2015-09-20 03:19:09 +00:00
Sanjoy Das
1b1e9a5dc4 [IndVars] Fix a bug in r248045.
Because -indvars widens induction variables through arithmetic,
`NeverNegative` cannot be a property of the `WidenIV` (a `WidenIV`
manages information for all transitive uses of an IV being widened,
including uses of `-1 * IV`).  Instead it must live on `NarrowIVDefUse`
which manages information for a specific def-use edge in the transitive
use list of an induction variable.

This change also adds a test case that demonstrates the problem with
r248045.

llvm-svn: 248107
2015-09-20 01:52:18 +00:00
Davide Italiano
d2d6cb55fa Fixup r248096, commit the *correct* test.
llvm-svn: 248097
2015-09-19 20:52:47 +00:00
Davide Italiano
0f09710333 [obj2yaml] Fix "time of check to time of use" bug. Add a test.
llvm-svn: 248096
2015-09-19 20:49:34 +00:00
Simon Pilgrim
3684c48547 [X86][AVX2] Use general sext IR for vpmovsx stack folding tests
llvm-svn: 248093
2015-09-19 17:04:18 +00:00
Simon Pilgrim
353a09ac7f [X86][SSE] Vectorize CTTZ + CTTZ_ZERO_UNDEF
Now that we have fast vector CTPOP implementations we can use this to speed up vector CTTZ using the pattern (cttz(x) = ctpop((x & -x) - 1))

Additionally, for AVX512CD that provides lzcnt instructions we can use the pattern (cttz_undef(x) = (width - 1) - ctlz(x & -x))

Differential Revision: http://reviews.llvm.org/D12663

llvm-svn: 248091
2015-09-19 13:22:57 +00:00
Simon Pilgrim
9664e19104 [InstCombine] Use SimplifyDemandedVectorEltsLow helper function. NFCI.
Use the SimplifyDemandedVectorEltsLow helper function introduced in D12680.

llvm-svn: 248089
2015-09-19 11:41:53 +00:00
NAKAMURA Takumi
243cdd01c7 [CMake] Update LLVM_TEST_DEPENDS not to use macho-dump. It has been unused since r247235.
llvm-svn: 248088
2015-09-19 07:19:30 +00:00
Matt Arsenault
b9aeee466c AMDGPU: Remove dead code
getCFGStructurizerRegClass is not used for SI, so
move it into R600 specific stuff.

llvm-svn: 248087
2015-09-19 06:41:10 +00:00