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Commit Graph

32 Commits

Author SHA1 Message Date
Matt Arsenault
9c8541d286 Change objectsize intrinsic to accept different address spaces.
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.

llvm-svn: 192117
2013-10-07 18:06:48 +00:00
Andrew Trick
eb3065a917 Add missing REQUIRES: asserts in crash.ll.
llvm-svn: 184576
2013-06-21 18:47:08 +00:00
Andrew Trick
777b242083 Update physreg live intervals during remat.
llvm-svn: 184574
2013-06-21 18:33:26 +00:00
Manman Ren
0b37dd0efc TBAA: remove !tbaa from testing cases if not used.
This will make it easier to turn on struct-path aware TBAA since the metadata
format will change.

llvm-svn: 180796
2013-04-30 17:52:57 +00:00
Kostya Serebryany
f560b78692 Unify clang/llvm attributes for asan/tsan/msan (LLVM part)
These are two related changes (one in llvm, one in clang).
LLVM: 
- rename address_safety => sanitize_address (the enum value is the same, so we preserve binary compatibility with old bitcode)
- rename thread_safety => sanitize_thread
- rename no_uninitialized_checks -> sanitize_memory

CLANG: 
- add __attribute__((no_sanitize_address)) as a synonym for __attribute__((no_address_safety_analysis))
- add __attribute__((no_sanitize_thread))
- add __attribute__((no_sanitize_memory))

for S in address thread memory
If -fsanitize=S is present and __attribute__((no_sanitize_S)) is not
set llvm attribute sanitize_S

llvm-svn: 176075
2013-02-26 06:58:09 +00:00
Jakob Stoklund Olesen
2efe8df169 Never attempt to join an early-clobber def with a regular kill.
This fixes PR14194.

llvm-svn: 166880
2012-10-27 17:41:27 +00:00
Jakob Stoklund Olesen
8a4d65228b Fix coalescing with IMPLICIT_DEF values.
PHIElimination inserts IMPLICIT_DEF instructions to guarantee that all
PHI predecessors have a live-out value. These IMPLICIT_DEF values are
not considered to be real interference when coalescing virtual
registers:

  %vreg1 = IMPLICIT_DEF
  %vreg2 = MOV32r0

When joining %vreg1 and %vreg2, the IMPLICIT_DEF instruction and its
value number should simply be erased since the %vreg2 value number now
provides a live-out value for the PHI predecesor block.

llvm-svn: 165813
2012-10-12 18:03:04 +00:00
Jakob Stoklund Olesen
ffe0e379b9 Avoid dereferencing a NULL pointer.
Fixes PR13943.

llvm-svn: 164778
2012-09-27 16:34:19 +00:00
Jakob Stoklund Olesen
795083115c Ensure CopyToReg nodes are always glued to the call instruction.
The CopyToReg nodes that set up the argument registers before a call
must be glued to the call instruction. Otherwise, the scheduler may emit
the physreg copies long before the call, causing long live ranges for
the fixed registers.

Besides disabling good register allocation, that can also expose
problems when EmitInstrWithCustomInserter() splits a basic block during
the live range of a physreg.

llvm-svn: 159721
2012-07-04 19:28:31 +00:00
Jakob Stoklund Olesen
b57dc22af0 Clear kill flags in InstrEmitter::EmitSubregNode().
When a local virtual register is made global, make sure to clear any
existing kill flags.

llvm-svn: 159461
2012-06-29 21:00:03 +00:00
Nuno Lopes
944814b41a revert my previous patches that introduced an additional parameter to the objectsize intrinsic.
After a lot of discussion, we realized it's not the best option for run-time bounds checking

llvm-svn: 157255
2012-05-22 15:25:31 +00:00
Nuno Lopes
e8880a9916 change the objectsize intrinsic signature: add a 3rd parameter to denote the maximum runtime performance penalty that the user is willing to accept.
This commit only adds the parameter. Code taking advantage of it will follow.

llvm-svn: 156473
2012-05-09 15:52:43 +00:00
Chris Lattner
9d1e8420ff Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
llvm-svn: 145171
2011-11-27 06:54:59 +00:00
Jakob Stoklund Olesen
f38db50fed Also inflate register classes around inline asm.
Now that MI->getRegClassConstraint() can also handle inline assembly,
don't bail when recomputing the register class of a virtual register
used by inline asm.

This fixes PR11078.

llvm-svn: 141836
2011-10-12 23:37:40 +00:00
Bill Wendling
60e17f8212 Only access both operands of an INSERT_SUBVECTOR if it is an INSERT_SUBVECTOR.
Fixes PR10527.

llvm-svn: 136853
2011-08-04 00:32:58 +00:00
Jakob Stoklund Olesen
0e4f7f92a2 Correctly handle <undef> tied uses when rewriting after a split.
This fixes PR10463. A two-address instruction with an <undef> use
operand was incorrectly rewritten so the def and use no longer used the
same register, violating the tie constraint.

Fix this by always rewriting <undef> operands with the register a def
operand would use.

llvm-svn: 135885
2011-07-24 20:23:50 +00:00
Jakob Stoklund Olesen
f95a1068bd Fix PR10277.
Remat during spilling triggers dead code elimination. If a phi-def
becomes unused, that may also cause live ranges to split into separate
connected components.

This type of splitting is different from normal live range splitting. In
particular, there may not be a common original interval.

When the split range is its own original, make sure that the new
siblings are also their own originals. The range being split cannot be
used as an original since it doesn't cover the new siblings.

llvm-svn: 134413
2011-07-05 15:38:41 +00:00
Bill Wendling
cb8447ad52 In some cases, the "fail BB dominator" may be null after the BB was split (and
becomes reachable when before it wasn't). Check to make sure that it's not null
before trying to use it.

llvm-svn: 128434
2011-03-28 23:02:18 +00:00
Chris Lattner
378faeecc8 when legalizing extremely wide shifts, make sure that
the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.

This fixes PR9028.

llvm-svn: 125458
2011-02-13 09:10:56 +00:00
Chris Lattner
dde85de90f fix PR8514, a bug where the "heroic" transformation of shift/and
into and/shift would cause nodes to move around and a dangling pointer
to happen.  The code tried to avoid this with a HandleSDNode, but 
got the details wrong.

llvm-svn: 123578
2011-01-16 08:48:11 +00:00
Chris Lattner
24ea7f696e fix PR8981, a crash trying to form a conditional inc with a floating point compare.
llvm-svn: 123560
2011-01-16 02:56:53 +00:00
Jakob Stoklund Olesen
34ec644313 Allow copies between GR8_ABCD_L and GR8_ABCD_H.
This fixes PR7540.

llvm-svn: 107809
2010-07-07 20:33:27 +00:00
Bill Wendling
a87efb5d0f Move CodeGen/X86/2010-04-19-DAGCombineCrash.ll into CodeGen/X86/crash.ll. Also
reduce.

llvm-svn: 101925
2010-04-20 18:14:47 +00:00
Chris Lattner
367cbc160c this has a pr!
llvm-svn: 100637
2010-04-07 18:04:56 +00:00
Chris Lattner
60e5f55565 fix a latent bug my inline asm stuff exposed:
MachineOperand::isIdenticalTo wasn't handling metadata operands.

llvm-svn: 100636
2010-04-07 18:03:19 +00:00
Chris Lattner
45a0ae21b8 Implement support for the case when a reference to a addr-of-bb
label is generated, but then the block is deleted.  Since the
value is undefined, we just emit the label right after the entry 
label of the function.  It might matter that the label is in the
same section as the function was afterall.

llvm-svn: 98579
2010-03-15 20:39:00 +00:00
Chris Lattner
802ebf9561 Fix the case when a reference to an address taken BB is emitted in one
function, then the BB is RAUW'd before the definition is emitted.  There
are still two cases not being handled, but this should improve us back to
the situation before I touched anything.

llvm-svn: 98566
2010-03-15 19:09:43 +00:00
Chris Lattner
70eca8f78e fix ShrinkDemandedOps to not leave dead nodes around,
fixing PR6607

llvm-svn: 98512
2010-03-14 19:46:02 +00:00
Chris Lattner
c50b8b27f5 fix PR6605, X86ISD::CMP always returns i32 (EFLAGS), not
the operand type.

llvm-svn: 98507
2010-03-14 18:44:35 +00:00
Chris Lattner
80ab250a1c fix PR6577, a bug in sdbuilder lowering select instructions
whose true value was not Val#0.

llvm-svn: 98336
2010-03-12 07:15:36 +00:00
Chris Lattner
7cd70b8066 fix PR6533 by updating the br(xor) code to remember the case
when it looked past a trunc.

llvm-svn: 98203
2010-03-10 23:46:44 +00:00
Chris Lattner
80aaccb987 Fix PR6497, a bug where we'd fold a load into an addc
node which has a flag.  That flag in turn was used by an
already-selected adde which turned into an ADC32ri8 which
used a selected load which was chained to the load we
folded.  This flag use caused us to form a cycle.  Fix
this by not ignoring chains in IsLegalToFold even in
cases where the isel thinks it can.

llvm-svn: 97791
2010-03-05 06:19:13 +00:00