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152 Commits

Author SHA1 Message Date
Wesley Peck
d589353ad0 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. 
llvm-svn: 119990
 2010-11-23 03:31:01 +00:00
Eric Christopher
38b8cfea6a Rewrite address handling to use a structure with all the possible address 
mode variables. Handle frame indexes in load/store and allocas again.

llvm-svn: 119912
 2010-11-20 22:38:27 +00:00
Eric Christopher
5a99947b98 STRH only needs the additional operand, not t2STRH. Also invert conditional 
to match the one from the load emitter above.

llvm-svn: 119911
 2010-11-20 22:01:38 +00:00
Eric Christopher
322b045c95 Don't need to save piecemeal now. 
llvm-svn: 119862
 2010-11-19 22:39:56 +00:00
Eric Christopher
899d8247c8 Update comment. 
llvm-svn: 119861
 2010-11-19 22:37:58 +00:00
Eric Christopher
716f891687 Update comment. 
llvm-svn: 119859
 2010-11-19 22:36:41 +00:00
Eric Christopher
563a0d8b6b Refactor address mode handling into a single struct (ala x86), this 
should give allow a wider range of addressing modes.

No functional change.

llvm-svn: 119856
 2010-11-19 22:30:02 +00:00
Jim Grosbach
be61a90b99 Remove hard tabs. 
llvm-svn: 119810
 2010-11-19 18:01:37 +00:00
Eric Christopher
22b01f0d76 Recommit this change and remove the failing part of the test - it didn't 
pass in the first place and was masked by earlier failures not warning
and aborting the block.

llvm-svn: 119184
 2010-11-15 21:11:06 +00:00
Eric Christopher
f6c7694c29 Temporarily revert this. 
llvm-svn: 118946
 2010-11-12 23:50:48 +00:00
Eric Christopher
b8ee838424 Make this happen for ARM like x86. Don't entirely bail out when 
an address is in a different block, get it into a register and go
from there.

llvm-svn: 118936
 2010-11-12 22:52:32 +00:00
Eric Christopher
1ca7518097 Fix up a few more spots of addrmode2 (or not) changes that were 
missed. Update some comments accordingly.

Fixes rdar://8652289

llvm-svn: 118888
 2010-11-12 09:48:30 +00:00
Jim Grosbach
ce5c2dbeae Trailing whitespace. 
llvm-svn: 118606
 2010-11-09 19:22:26 +00:00
Eric Christopher
3a51a4ada2 Make sure we have movw on the target before using it. 
Fixes 8559.

llvm-svn: 118333
 2010-11-06 07:53:11 +00:00
Duncan Sands
3bf2a701a5 In the calling convention logic, ValVT is always a legal type, 
and as such can be represented by an MVT - the more complicated
EVT is not needed.  Use MVT for ValVT everywhere.

llvm-svn: 118245
 2010-11-04 10:49:57 +00:00
Eric Christopher
6b586a109e Optimize generated code for integer materialization a bit. 
llvm-svn: 118192
 2010-11-03 20:21:17 +00:00
Duncan Sands
41edf30895 Simplify uses of MVT and EVT. An MVT can be compared directly 
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.

llvm-svn: 118169
 2010-11-03 12:17:33 +00:00
Duncan Sands
f6e5e02c9b Inside the calling convention logic LocVT is always a simple 
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.

llvm-svn: 118167
 2010-11-03 11:35:31 +00:00
Eric Christopher
bc79fa1c9e Invert these branches by default, it makes assembly comparisons a little 
easier to read.

llvm-svn: 118148
 2010-11-03 04:29:11 +00:00
Eric Christopher
b817a3e8fe Make sure we're only storing a single bit here. 
llvm-svn: 118126
 2010-11-02 23:59:09 +00:00
Eric Christopher
a376fe69a1 Remove an assert - it's possible to be hit, and we just want to avoid 
handling those cases for now.

llvm-svn: 117996
 2010-11-02 01:24:49 +00:00
Eric Christopher
a033f49ed1 Whitespeace 
llvm-svn: 117995
 2010-11-02 01:22:45 +00:00
Eric Christopher
26ddb729bd No really, no thumb1 for arm fast isel. Also add an informative comment as 
to what someone would need to do to support thumb1.

llvm-svn: 117994
 2010-11-02 01:21:28 +00:00
Eric Christopher
e012ee8db9 Make sure we have a legal type (and simple) before continuing. 
llvm-svn: 117848
 2010-10-30 21:25:26 +00:00
Eric Christopher
bf7cf2a203 Handle comparison values we already have - this fixes the consumer-typeset 
failure for llvm-gcc on arm fast isel.

llvm-svn: 117710
 2010-10-29 21:08:19 +00:00
Jim Grosbach
86ecfda983 Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like 
the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752

llvm-svn: 117505
 2010-10-27 23:12:14 +00:00
Jim Grosbach
1d5b71b3cc Trailing whitespace 
llvm-svn: 117496
 2010-10-27 21:39:08 +00:00
Jim Grosbach
4d4caf1384 Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on 
rdar://8477752.

llvm-svn: 117419
 2010-10-27 00:19:44 +00:00
Jim Grosbach
30f6744f05 First part of refactoring ARM addrmode2 (load/store) instructions to be more 
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.

llvm-svn: 117409
 2010-10-26 22:37:02 +00:00
Eric Christopher
0dab5810aa Move rejection of NEON parameters earlier in fast isel call processing, 
note that we can actually handle some f64 arguments.

llvm-svn: 117209
 2010-10-23 09:37:17 +00:00
Evan Cheng
e5b7a3a09f Silence compiler warnings. 
llvm-svn: 117128
 2010-10-22 18:57:05 +00:00
Eric Christopher
58a6e62c08 Add some basic ret instruction support to arm fast-isel. 
llvm-svn: 117085
 2010-10-22 01:28:00 +00:00
Eric Christopher
59683c9d71 These don't need to be virtual. 
llvm-svn: 117068
 2010-10-21 21:47:51 +00:00
Eric Christopher
7ded7e88c8 Handle storing args to the stack for calls. 
llvm-svn: 117055
 2010-10-21 20:09:54 +00:00
Eric Christopher
b15029ea7e More load/store refactoring, call reg+offset simplification from within 
the emitter to handle the addresses. Only simplify the offset if we need
to - also fix bug where in addrmode 5 we weren't dividing the offset by
4, which showed up due to not always lowering.

llvm-svn: 117051
 2010-10-21 19:40:30 +00:00
Eric Christopher
7989939d87 Custom lower f64 args passed in integer registers. 
llvm-svn: 116977
 2010-10-21 00:01:47 +00:00
Eric Christopher
78c7e84ce5 Fix a TODO by removing some unnecesary copies. 
llvm-svn: 116915
 2010-10-20 08:02:24 +00:00
Eric Christopher
5850afe5f2 Revert r116220 - thus turning arm fast isel back on by default. 
llvm-svn: 116762
 2010-10-18 22:53:53 +00:00
Eric Christopher
e453bd6697 Remove the check for invalid calling conventions. Testing shows that they're 
working just fine.

llvm-svn: 116698
 2010-10-18 06:49:12 +00:00
Eric Christopher
6287738105 Lift arg promotion from the X86 backend. This should be unified at some point. 
llvm-svn: 116694
 2010-10-18 02:17:53 +00:00
Eric Christopher
79c2206640 Now that we handle all allocas via a non-SP reg offset remove all of the 
special case handling for ARM::SP.

llvm-svn: 116688
 2010-10-17 11:08:44 +00:00
Eric Christopher
d99f79f92b Allow more load types to be materialized through the allocas. 
llvm-svn: 116683
 2010-10-17 06:07:26 +00:00
Eric Christopher
5fcaab5d0e Optimize GEP off of intermediate allocas. 
llvm-svn: 116681
 2010-10-17 01:51:42 +00:00
Eric Christopher
20bbcbeceb Fix comment. 
llvm-svn: 116680
 2010-10-17 01:42:53 +00:00
Eric Christopher
d9b4b47b9a Turn on AddOperator folding in GEP. 
llvm-svn: 116679
 2010-10-17 01:41:46 +00:00
Eric Christopher
490f82bc32 Use the i12 immediate versions of the load instructions - they're handled 
more in the post-passes.

llvm-svn: 116678
 2010-10-17 01:40:27 +00:00
Eric Christopher
98c6ce755a Fix some funky formatting that got through. 
llvm-svn: 116653
 2010-10-16 01:10:35 +00:00
Eric Christopher
69eaf30a42 Make sure offset is 0 for load/store register to the stack call. 
llvm-svn: 116640
 2010-10-15 23:07:10 +00:00
Eric Christopher
7f8c3dff07 Fix else if -> if in store machinery. 
llvm-svn: 116628
 2010-10-15 22:32:37 +00:00
Eric Christopher
a875589580 Refactor ARM fast-isel reg + offset to be a base + offset. 
llvm-svn: 116622
 2010-10-15 21:32:12 +00:00