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Author SHA1 Message Date
Jim Grosbach
a740cc6bc9 ARM tidy up and remove no longer needed InstAlias definitions. 
The TokenAlias handling of data type suffices renders these unnecessary.

llvm-svn: 146010
 2011-12-07 01:50:36 +00:00
Jakob Stoklund Olesen
d3e5443796 Move common expression into a method. 
llvm-svn: 146008
 2011-12-07 01:22:52 +00:00
Jim Grosbach
19d37b966b ARM Implement ARM ARM Table A7-3 via TokenAlias. 
Data type suffix aliasing. Previously handled via lots of instruction
aliases. Cleanup of those forthcoming.

rdar://10435076

llvm-svn: 146007
 2011-12-07 01:17:58 +00:00
Jakob Stoklund Olesen
a2d7f79da0 Group BBSizes and BBOffsets into a single vector<BasicBlockInfo>. 
No functional change is intended.

llvm-svn: 146005
 2011-12-07 01:08:25 +00:00
Jakob Stoklund Olesen
c1f4115eb1 Add missing check. 
llvm-svn: 146004
 2011-12-07 01:08:22 +00:00
Jim Grosbach
57478f4961 ARM: NEON SHLL instruction immediate operand range checking. 
llvm-svn: 146003
 2011-12-07 01:07:24 +00:00
Eli Friedman
9e8d557cd1 Support vector bitcasts in the AsmPrinter. PR11495. 
llvm-svn: 146001
 2011-12-07 00:50:54 +00:00
Bruno Cardoso Lopes
d610f464bf Add a few moreLocal/Global R_MIPS_GOT related fixups and 
make the addend fixup code a bit more generic

Patch by Jack Carter.

llvm-svn: 145998
 2011-12-07 00:28:57 +00:00
Jakob Stoklund Olesen
e612fdbbab Add MachineOperand IsInternalRead flag. 
This flag is used when bundling machine instructions.  It indicates
whether the operand reads a value defined inside or outside its bundle.

llvm-svn: 145997
 2011-12-07 00:22:07 +00:00
Eli Friedman
5545db0906 Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves correctly. PR11494. 
llvm-svn: 145996
 2011-12-07 00:11:56 +00:00
Jakub Staszak
f1b60daf50 Remove unneeded type. 
llvm-svn: 145995
 2011-12-07 00:08:00 +00:00
Jim Grosbach
960e6c5a43 ARM: Parameterize the immediate operand type for NEON VSHLL. 
No functional change yet. Will be implementing range-checked immediates
for better diagnostics and disambiguation of instructions.

llvm-svn: 145994
 2011-12-07 00:02:17 +00:00
Jakub Staszak
e4104abf3c - Remove unneeded #includes. 
- Remove unused types/fields.
- Add some constantness.

llvm-svn: 145993
 2011-12-06 23:59:33 +00:00
Jim Grosbach
14e284f16a Extend AsmMatcher token literal matching to allow aliasing. 
For example, ARM allows:
    vmov.u32 s4, #0  -> vmov.i32, #0
'u32' is a more specific designator for the 32-bit integer type specifier
and is legal for any instruction which accepts 'i32' as a datatype suffix.

We want to say,
    def : TokenAlias<".u32", ".i32">;

This works by marking the match class of 'From' as a subclass of the
match class of 'To'.

rdar://10435076

llvm-svn: 145992
 2011-12-06 23:43:54 +00:00
Jakub Staszak
1f05c26ed0 Make Release Notes HTML 4.01 Strict. 
llvm-svn: 145991
 2011-12-06 23:33:07 +00:00
Daniel Dunbar
3e99464701 llvm-build: Don't generate duplicate dependencies when LLVMBuild files define 
multiple components.

llvm-svn: 145989
 2011-12-06 23:13:42 +00:00
Anshuman Dasgupta
d2971cca39 Add documentation for machine-independent DFA packetizer 
llvm-svn: 145988
 2011-12-06 23:12:42 +00:00
Jakob Stoklund Olesen
436d9f98e3 Revert r145971: "Use conservative size estimate for tBR_JTr." 
This caused more offset errors.

llvm-svn: 145980
 2011-12-06 22:41:31 +00:00
Jakub Staszak
5fd1d873c7 Add link to builtin_expect in Release Notes. 
llvm-svn: 145979
 2011-12-06 22:31:27 +00:00
Bill Wendling
a4163dadb8 Re-enable compact unwind. It seems to work now. <rdar://problem/10441838> 
llvm-svn: 145977
 2011-12-06 22:18:12 +00:00
Bill Wendling
7380d4e412 Explicitly check for the different SUB instructions. 
llvm-svn: 145976
 2011-12-06 22:14:27 +00:00
Evan Cheng
5061553f9d First chunk of MachineInstr bundle support. 
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs

llvm-svn: 145975
 2011-12-06 22:12:01 +00:00
Jim Grosbach
f972c503d8 Tidy up. Fix naming convention stuff for some internal functions. 
llvm-svn: 145974
 2011-12-06 22:07:02 +00:00
Jakob Stoklund Olesen
c5e1f4a242 Use conservative size estimate for tBR_JTr. 
This pseudo-instruction contains a .align directive in its expansion, so
the total size may vary by 2 bytes.

It is too difficult to accurately keep track of this alignment
directive, just use the worst-case size instead.

llvm-svn: 145971
 2011-12-06 21:55:39 +00:00
Jakob Stoklund Olesen
e757462141 Remove alignment from deserted constant islands. 
ARMConstantIslandPass may sometimes leave empty constant islands behind
(it really shouldn't). Remove the alignment from the empty islands so
the size calculations are still correct.

This should fix the many Thumb1 assembler errors in the nightly test
suite.

The reduced test case for this problem is way too big. That is to be
expected for ARMConstantIslandPass bugs.

<rdar://problem/10534709>

llvm-svn: 145970
 2011-12-06 21:55:35 +00:00
Bill Wendling
5fabb465e2 Encode the total stack if there isn't a frame. 
llvm-svn: 145969
 2011-12-06 21:34:01 +00:00
Bill Wendling
075cd4a296 * Add a macro to remove a magic number. 
* Rename variables to reflect what they're actually used for.

llvm-svn: 145968
 2011-12-06 21:23:42 +00:00
Jakob Stoklund Olesen
5fb70d560d Pretty-print basic block alignment. 
llvm-svn: 145965
 2011-12-06 21:08:39 +00:00
Jakub Staszak
e109ff236b Add link to llvm.expect in Release Notes. 
llvm-svn: 145964
 2011-12-06 20:56:36 +00:00
Hal Finkel
a76ada827b delaying restore-cr changed assigned registers in some tests 
llvm-svn: 145963
 2011-12-06 20:55:46 +00:00
Hal Finkel
7d78f1a8a4 add a test case that uses RESTORE_CR 
llvm-svn: 145962
 2011-12-06 20:55:41 +00:00
Hal Finkel
bf3ebfa211 add RESTORE_CR and support CR unspills 
llvm-svn: 145961
 2011-12-06 20:55:36 +00:00
Hal Finkel
a3483924a6 remove old FIXME 
llvm-svn: 145960
 2011-12-06 20:52:56 +00:00
Bill Wendling
9f248310fc Check the correct value for small stack sizes. Also modify some comments. 
llvm-svn: 145954
 2011-12-06 19:16:17 +00:00
Bill Wendling
5229d524ea For a small sized stack, we encode that value directly with no "stack adjust" value. 
llvm-svn: 145952
 2011-12-06 19:09:06 +00:00
Justin Holewinski
c9457b712c PTX: Continue to fix up the register mess. 
llvm-svn: 145947
 2011-12-06 17:39:48 +00:00
Justin Holewinski
f54a8af7f1 PTX: Encode registers as unsigned values in the MC asm printer instead of using external symbols 
llvm-svn: 145946
 2011-12-06 17:39:46 +00:00
Sebastian Pop
182ae6a6fa use space star instead of star space 
llvm-svn: 145944
 2011-12-06 17:34:16 +00:00
Sebastian Pop
cb55bb22ab add missing point at the end of sentences 
llvm-svn: 145943
 2011-12-06 17:34:11 +00:00
Benjamin Kramer
7df1659ad7 Simplify common predecessor finding. 
- Walking over pred_begin/pred_end is an expensive operation.
- PHINodes contain a value for each predecessor anyway.
- While it may look like we used to save a few iterations with the set,
  be aware that getIncomingValueForBlock does a linear search on
  the values of the phi node.
- Another -5% on ARMDisassembler.cpp (Release build). This was the last
  entry in the profile that was obviously wasting time.

llvm-svn: 145937
 2011-12-06 16:14:29 +00:00
Benjamin Kramer
933fd2afff Push StringRefs through the metadata interface. 
llvm-svn: 145934
 2011-12-06 11:50:26 +00:00
Craig Topper
26f41cda03 Add X86ISD::HADD/HSUB to getTargetNodeName 
llvm-svn: 145929
 2011-12-06 09:31:36 +00:00
Craig Topper
8b05e7d035 Fix a bunch of SSE/AVX patterns to use v2i64/v4i64 loads since all other integer vector loads are promoted to those. 
llvm-svn: 145927
 2011-12-06 09:04:59 +00:00
Craig Topper
846d53deed Merge floating point and integer UNPCK X86ISD node types. 
llvm-svn: 145926
 2011-12-06 08:21:25 +00:00
NAKAMURA Takumi
ed2be25205 test/MC: Introduce MC/MachO/ARM, and relocate relax-thumb2-branches.s into it. 
FIXME: Restore more other arch-dependent MachO tests. (eg. r126401 and r133856)
llvm-svn: 145925
 2011-12-06 06:48:26 +00:00
Craig Topper
e6e44c24dd Clean up some of the shuffle decoding code for UNPCK instructions. Add instruction commenting for AVX/AVX2 forms for integer UNPCKs. 
llvm-svn: 145924
 2011-12-06 05:31:16 +00:00
Jim Grosbach
5b4f7d74de ARM mode 'mul' operand ordering tweak. 
Same as r145922, just for ARM mode.

llvm-svn: 145923
 2011-12-06 05:28:00 +00:00
Jim Grosbach
dc7d42f559 Thumb2: MUL two-operand form encoding operand order fix. 
Fix the alias to encode 'mul r5, r6' as if it were 'mul r5, r6, r5' so we
match gas.

rdar://10532439

llvm-svn: 145922
 2011-12-06 05:03:45 +00:00
Craig Topper
72b41227d8 Merge isSHUFPMask and isCommutedSHUFPMask into single function that can do both. Do the same for the 256-bit version. Use loops to reduce size of isVSHUFPYMask. Fix test cases that were incorrectly passing due to isCommutedSHUFPMask not checking for the vector being 128-bit. This caused some 256-bit shuffles to be incorrectly commuted. 
llvm-svn: 145921
 2011-12-06 04:59:07 +00:00
Jim Grosbach
8bdbe92631 Thumb2 encoding choice correction for PLD. 
Using encoding T1 for offset of #0 and encoding T2 for #-0.

rdar://10532413

llvm-svn: 145919
 2011-12-06 04:49:29 +00:00