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30 Commits

Author SHA1 Message Date
Zoran Jovanovic
7f0e9478f6 [mips][microMIPS] Implement movep instruction 
Differential Revision: http://reviews.llvm.org/D7465

llvm-svn: 228703
 2015-02-10 16:36:20 +00:00
Jozef Kolek
e6b6be169a [mips][microMIPS] Implement LWGP instruction 
Differential Revision: http://reviews.llvm.org/D6650

llvm-svn: 227325
 2015-01-28 17:27:26 +00:00
Jozef Kolek
07bbffd274 [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B 
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514

llvm-svn: 226657
 2015-01-21 12:39:30 +00:00
Jozef Kolek
dc9fe311f2 Reverted revision 226577. 
llvm-svn: 226595
 2015-01-20 19:29:28 +00:00
Jozef Kolek
ca8263125b [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B 
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514

llvm-svn: 226577
 2015-01-20 16:45:27 +00:00
Jozef Kolek
c8014187bb [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructions 
Differential Revision: http://reviews.llvm.org/D5271

llvm-svn: 225627
 2015-01-12 12:03:34 +00:00
Jozef Kolek
814723a8ed [mips][microMIPS] Implement LWSP and SWSP instructions 
Differential Revision: http://reviews.llvm.org/D6416

llvm-svn: 224771
 2014-12-23 16:16:33 +00:00
Vladimir Medic
7915fd41c4 The andi16, addiusp and jraddiusp micromips instructions were missing dedicated decoder methods in MipsDisassembler.cpp to properly decode immediate operands. These methods are added together with corresponding tests. 
llvm-svn: 223006
 2014-12-01 11:12:04 +00:00
Jozef Kolek
e3a600e129 [mips][microMIPS] Implement NOP aliases 
This patch implements microMIPS 16-bit (MOVE16 $0, $0) and
32-bit (SLL $0, $0, 0) NOP aliases.

http://reviews.llvm.org/D6440

llvm-svn: 222953
 2014-11-29 13:29:24 +00:00
Jozef Kolek
c85a4a5656 [mips][microMIPS] Implement BREAK16 and SDBBP16 instructions 
Patch by Radovan Obradovic.

Differential Revision: http://reviews.llvm.org/D5048

llvm-svn: 222900
 2014-11-27 18:18:42 +00:00
Jozef Kolek
ecfa20e7f7 [mips][microMIPS] Implement disassembler support for 16-bit instructions LBU16, LHU16, LW16, SB16, SH16 and SW16 
Differential Revision: http://reviews.llvm.org/D6405

llvm-svn: 222847
 2014-11-26 18:56:38 +00:00
Jozef Kolek
a4e87d7a74 [mips][microMIPS] Fix JRADDIUSP instruction 
Fix JRADDIUSP instruction, remove delay slot flag because this instruction
doesn't have delay slot.

Differential Revision: http://reviews.llvm.org/D6365

llvm-svn: 222658
 2014-11-24 16:14:10 +00:00
Jozef Kolek
dd0dbf282b [mips][microMIPS] Implement LBU16, LHU16, LW16, SB16, SH16 and SW16 instructions 
Differential Revision: http://reviews.llvm.org/D5122

llvm-svn: 222653
 2014-11-24 14:39:13 +00:00
Zoran Jovanovic
3aa8010f59 [mips][microMIPS] Implement ANDI16 instruction 
llvm-svn: 221367
 2014-11-05 17:31:00 +00:00
Zoran Jovanovic
9298c57c2a Reverted revisions 221351, 221352 and 221353. 
llvm-svn: 221354
 2014-11-05 16:19:59 +00:00
Zoran Jovanovic
d61600192c [mips][microMIPS] Implement ANDI16 instruction 
Differential Revision: http://reviews.llvm.org/D5163

llvm-svn: 221351
 2014-11-05 15:39:41 +00:00
Zoran Jovanovic
417b0378da [mips][microMIPS] Implement ADDIUR1SP instruction 
Differential Revision: http://reviews.llvm.org/D5153

llvm-svn: 220477
 2014-10-23 11:13:59 +00:00
Zoran Jovanovic
7d4ae91afe ps][microMIPS] Implement ADDIUR2 instruction 
Differential Revision: http://reviews.llvm.org/D5151

llvm-svn: 220476
 2014-10-23 11:06:34 +00:00
Zoran Jovanovic
c644ce2e43 ps][microMIPS] Implement LI16 instruction 
Differential Revision: http://reviews.llvm.org/D5149

llvm-svn: 220475
 2014-10-23 10:59:24 +00:00
Zoran Jovanovic
0172553d1e [mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions 
Differential Revision: http://reviews.llvm.org/D5774

llvm-svn: 220474
 2014-10-23 10:42:01 +00:00
Zoran Jovanovic
5e356e74e3 [mips][microMIPS] Implement ADDU16 and SUBU16 instructions 
Differential Revision: http://reviews.llvm.org/D5118

llvm-svn: 220276
 2014-10-21 08:44:58 +00:00
Zoran Jovanovic
26b6fdd712 [mips][microMIPS] Implement AND16, NOT16, OR16 and XOR16 instructions 
Differential Revision: http://reviews.llvm.org/D5117

llvm-svn: 220275
 2014-10-21 08:32:40 +00:00
Zoran Jovanovic
d8488142ad [mips][microMIPS] Implement ADDIUSP instruction 
Differential Revision: http://reviews.llvm.org/D5084

llvm-svn: 219500
 2014-10-10 14:37:30 +00:00
Zoran Jovanovic
437a433c43 [mips][microMIPS] Implement JR16 instruction 
Differential Revision: http://reviews.llvm.org/D5062

llvm-svn: 219498
 2014-10-10 14:02:44 +00:00
Zoran Jovanovic
454a101d3d [mips][microMIPS] Implement ADDIUS5 instruction 
Differential Revision: http://reviews.llvm.org/D5049

llvm-svn: 219495
 2014-10-10 13:45:34 +00:00
Zoran Jovanovic
d436e06cb4 ps][microMIPS] Implement JRC instruction 
Differential Revision: http://reviews.llvm.org/D5045

llvm-svn: 219494
 2014-10-10 13:31:18 +00:00
Zoran Jovanovic
b5ed47d1e5 [mips][microMIPS] Implement JALRS16 instruction 
Differential Revision: http://reviews.llvm.org/D5027

llvm-svn: 219493
 2014-10-10 13:22:28 +00:00
Zoran Jovanovic
f1edd29dad [mips][microMIPS] Implement JRADDIUSP instruction 
Differential Revision: http://reviews.llvm.org/D5046

llvm-svn: 217681
 2014-09-12 14:29:54 +00:00
Zoran Jovanovic
712fef1943 Implementation of 16-bit microMIPS instructions MFHI and MFLO. 
Differential Revision: http://llvm-reviews.chandlerc.com/D3141

llvm-svn: 205532
 2014-04-03 12:47:34 +00:00
Zoran Jovanovic
35c85f0c11 Implementation of microMIPS 16-bit instructions MOVE and JALR. 
Differential Revision: http://llvm-reviews.chandlerc.com/D3112

llvm-svn: 204325
 2014-03-20 10:18:24 +00:00