1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 20:43:44 +02:00
Commit Graph

162 Commits

Author SHA1 Message Date
Kevin Enderby
a911679139 MC/X86: Add aliases for CMOVcc variants.
llvm-svn: 104549
2010-05-24 20:32:23 +00:00
Daniel Dunbar
50265dbaf0 MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example:
addw $0xFFFF, %ax
should match the same as
  addw $-1, %ax
but we used to match it to the longer encoding.

llvm-svn: 104453
2010-05-22 21:02:33 +00:00
Daniel Dunbar
7c60f7caa2 MC/X86: Add alias for setz, setnz, jz, jnz.
llvm-svn: 104435
2010-05-22 06:37:33 +00:00
Kevin Enderby
1e4a4f5899 Added retl for 32-bit x86 and added retq for 64-bit x86.
llvm-svn: 104394
2010-05-21 23:01:38 +00:00
Daniel Dunbar
3a0c98ca87 MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq.
llvm-svn: 104275
2010-05-20 20:36:29 +00:00
Dan Gohman
c8b4555a94 Fix assembly parsing and encoding of the pushf and popf family of
instructions.

llvm-svn: 104231
2010-05-20 16:16:00 +00:00
Dan Gohman
52dcd5fb9a Define the x86 pause instruction.
llvm-svn: 104204
2010-05-20 01:35:50 +00:00
Dan Gohman
00b8752500 Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it
doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.

llvm-svn: 104203
2010-05-20 01:23:41 +00:00
Chris Lattner
aedd148163 fix rdar://7986634 - match instruction opcodes case insensitively.
llvm-svn: 104183
2010-05-19 23:34:33 +00:00
Eric Christopher
6ea9cf8425 More data/parsing support for tls directives. Add a few more testcases
and cleanup comments as well.

llvm-svn: 103985
2010-05-17 22:53:55 +00:00
Daniel Dunbar
8f5da3624f llvm-mc: Support reassignment of variables in one special case, when the
variable has not yet been used in an expression. This allows us to support a few
cases that show up in real code (mostly because gcc generates it for Objective-C
on Darwin), without giving up a reasonable semantic model for assignment.

llvm-svn: 103950
2010-05-17 17:46:23 +00:00
Eric Christopher
950f0d7892 Assume that we'll handle mangling the symbols earlier and just put the
symbol to the file as we have it.  Simplifies out tbss handling.

llvm-svn: 103928
2010-05-17 02:13:02 +00:00
Kevin Enderby
dc13d89540 Fix so "int3" is correctly accepted, added "into" and fixed "int" with an
argument, like "int $4", to not get an Assertion error.

llvm-svn: 103791
2010-05-14 19:16:02 +00:00
Eric Christopher
ebea91f168 Add AsmParser support for darwin tbss directive.
Nothing uses this yet.

llvm-svn: 103757
2010-05-14 01:50:28 +00:00
Chris Lattner
ca57d80f83 fix rdar://7965971 and a fixme: use ParseIdentifier in
ParseDirectiveDarwinZerofill instead of hard coding the
check for identifier. This allows quoted symbol names to
be used.

llvm-svn: 103682
2010-05-13 00:10:34 +00:00
Chris Lattner
887e8f9f53 reapply r103668 with a fix. Never make "minor syntax changes"
after testing before committing.

llvm-svn: 103681
2010-05-13 00:02:47 +00:00
Chris Lattner
361c115f23 revert r103668 for now, it is apparently breaking things.
llvm-svn: 103677
2010-05-12 23:40:59 +00:00
Chris Lattner
91a836a9c7 moffset forms of moves are x86-32 only, make the parser
lower them to the correct x86-64 instructions since we 
don't have a clean way to handle this in td files yet.
rdar://7947184

llvm-svn: 103668
2010-05-12 23:13:36 +00:00
Chris Lattner
1960255123 fix the encoding of the obscure "moffset" forms of moves, i386
part first.  rdar://7947184

llvm-svn: 103660
2010-05-12 22:48:24 +00:00
Daniel Dunbar
469dddef0e MC/X86: Extend suffix matching hack to match 'q' suffix.
llvm-svn: 103535
2010-05-12 00:54:20 +00:00
Daniel Dunbar
45589cd853 MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand.
- This fixes "leal 0, %eax", for example.

llvm-svn: 103205
2010-05-06 22:39:14 +00:00
Chris Lattner
c788971da7 fix rdar://7947167 - llvm-mc doesn't match movsq
llvm-svn: 103199
2010-05-06 21:48:14 +00:00
Daniel Dunbar
a3731b17c0 Revert r103137, fix for $ in labels. It looks like we can't actually handle this
at the token level. Consider the following horrible test case:

  a = 1
  .globl $a
  movl ($a), %eax
  movl $a, %eax
  movl $$a, %eax

llvm-svn: 103178
2010-05-06 14:46:38 +00:00
Chris Lattner
ca80f41a4d fix rdar://7946934 - in some limited cases, the assembler should
allow $ at the start of a symbol name.

llvm-svn: 103137
2010-05-05 23:51:28 +00:00
Daniel Dunbar
e335a71a56 MC/X86: Chris pointed that 'as' isn't consistent in accepting the long form of
instructions which have no direct register usage.

Darwin 'as' accepts:
  add $0, (%rax)
but rejects
  mov $0, (%rax)
for example.

Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...

llvm-svn: 103015
2010-05-04 17:31:02 +00:00
Daniel Dunbar
648d1ae783 MC/X86: Add "support" for matching ATT style mnemonic prefixes.
- The idea is that when a match fails, we just try to match each of +'b', +'w',
   +'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
   it. If all match, we assume it is width generic, and take the 'l' form.

 - This would be a horrible hack, if it weren't so simple. Therefore it is an
   elegant solution! Chris gets the credit for this particular elegant
   solution. :)

 - Next step to making this more robust is to have the X86 matcher generate the
   mnemonic prefix information. Ideally we would also compute up-front exactly
   which mnemonic to attempt to match, but this may require more custom code in
   the matcher than is really worth it.

llvm-svn: 103012
2010-05-04 16:12:42 +00:00
Kevin Enderby
ce7a24a57f Changed llvm-mc to use the same suffixes with floating point compare
instructions as the Mac OS X darwin assembler.  Some of which like 'fcoml'
assembled to different opcodes.  While some of the suffixes were just different.

llvm-svn: 102958
2010-05-03 21:31:40 +00:00
Kevin Enderby
be2804f752 Fixed the encoding of two of the X86 movq instuctions. The Move quadword from
mm to mm/m64 and the Move quadword from xmm2/mem64 to xmm1 had the incorrect
encodings.

llvm-svn: 102952
2010-05-03 21:03:31 +00:00
Kevin Enderby
c1eeb061e7 Fixed the encoding of the x86 push instructions. Using a 32-bit immediate value
caused the a pushl instruction to be incorrectly encoding using only two bytes
of immediate, causing the following 2 instruction bytes to be part of the 32-bit
immediate value.  Also fixed the one byte form of push to be used when the
immediate would fit in a signed extended byte.  Lastly changed the names to not
include the 32 of PUSH32 since they actually push the size of the stack pointer.

llvm-svn: 102951
2010-05-03 20:45:05 +00:00
Kevin Enderby
58bed5a913 Fixed the word sized Bit Scan Forward/Reverse instructions, they needed the
Operand size override prefix to be part of their records.

llvm-svn: 102556
2010-04-28 23:20:40 +00:00
Chris Lattner
65d1e40895 teach the x86 asm parser how to handle segment prefixes
in memory operands.  rdar://7874844

llvm-svn: 101661
2010-04-17 18:56:34 +00:00
Chris Lattner
42337931b2 a bunch of ssse3 instructions are misencoded to think they have an
i8 field when they really do not.  This fixes rdar://7840289

llvm-svn: 101629
2010-04-17 07:38:24 +00:00
Chris Lattner
124dc743bc implement mc asmparser support for '.', which gets the
current PC.  rdar://7834775

We now produce an identical .o file compared to the cctools
assembler for something like this:

_f0:
L0:
        jmp L1
        .long . - L0
L1:
        jmp A
        .long . - L1

        .zerofill __DATA,_bss,A,0

llvm-svn: 101227
2010-04-14 04:40:28 +00:00
Bob Wilson
04e9ff15cb Reapply Kevin's change 94440, now that Chris has fixed the limitation on
opcode values fitting in one byte (svn r99494).

llvm-svn: 99514
2010-03-25 16:36:14 +00:00
Bob Wilson
d5673d9f1f Speculatively revert this to see if it fixes buildbot failures.
--- Reverse-merging r99440 into '.':
U    test/MC/AsmParser/X86/x86_32-bit_cat.s
U    test/MC/AsmParser/X86/x86_32-encoding.s
U    include/llvm/IntrinsicsX86.td
U    include/llvm/CodeGen/SelectionDAGNodes.h
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86ISelLowering.h

llvm-svn: 99450
2010-03-24 23:26:29 +00:00
Kevin Enderby
9cab7fdb12 Added the Advanced Encryption Standard (AES) Instructions.
llvm-svn: 99440
2010-03-24 22:33:33 +00:00
Kevin Enderby
8d8cb5c491 Fixed the SS42AI template for the SSE 4.2 instructions with TA prefix so it does
not get an "Unknown immediate size" assert failure when used.  All instructions 
of this form have an 8-bit immediate.  Also added a test case of an example
instruction that is of this form.

llvm-svn: 99435
2010-03-24 22:28:42 +00:00
Kevin Enderby
766909ae3b Fixed the encoding problems of the crc32 instructions. All had the Operand size
override prefix and only the r/m16 forms should have had that.  Also for variant
one, the AT&T syntax, added suffixes to all forms.  Also added the missing
64-bit form for 'CRC32 r64, r/m8'.  Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.

llvm-svn: 98980
2010-03-19 20:04:42 +00:00
Daniel Dunbar
f803121396 MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher.
llvm-svn: 98972
2010-03-19 18:07:48 +00:00
Daniel Dunbar
3ef39d497f X86: Fix encoding for TEST64rr.
llvm-svn: 98919
2010-03-19 01:15:03 +00:00
Daniel Dunbar
1a50b05aff X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we
were missing it on some movq instructions and were not including the appropriate
PCrel bias.

llvm-svn: 98880
2010-03-18 21:53:54 +00:00
Daniel Dunbar
ab14df376a MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a
temporary workaround for matching inc/dec on x86_64 to the correct instruction.
 - This hack will eventually be replaced with a robust mechanism for handling
   matching instructions based on the available target features.

llvm-svn: 98858
2010-03-18 20:06:02 +00:00
Chris Lattner
bf3e096258 fix an x86-64 encoding bug Daniel found.
llvm-svn: 98855
2010-03-18 20:04:36 +00:00
Chris Lattner
45ab55ccec add a special relocation type for movq loads for object
files that produce special relocation types where the 
linker changes movq's into lea's.

llvm-svn: 98839
2010-03-18 18:10:56 +00:00
Chris Lattner
3e251f1db0 xfail these tests temporarily to get teh buildbots back to happy land.
llvm-svn: 98476
2010-03-14 07:32:48 +00:00
Daniel Dunbar
a6526284f4 X86: Fix ADD64i32 encoding.
llvm-svn: 98457
2010-03-13 22:49:39 +00:00
Daniel Dunbar
6d5fa0c9d6 MC/X86_64: Fix matching of leaq.
llvm-svn: 98444
2010-03-13 19:31:44 +00:00
Daniel Dunbar
de2f4ae158 MC/X86_64: Fix matching of callq.
llvm-svn: 98443
2010-03-13 19:31:38 +00:00
Daniel Dunbar
9ffe22ec23 MC/X86: Add temporary hack to match shrl $1,%eax correctly, to support testing
other functionality on 403.gcc compiled at -O0.

llvm-svn: 98405
2010-03-13 00:47:29 +00:00
Daniel Dunbar
3eab04b641 MC/X86: Add an XFAIL test where we aren't matching the correct instruction
because we don't understand how the specific instruction is doing sign
extension.

llvm-svn: 98404
2010-03-13 00:47:25 +00:00