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Commit Graph

163179 Commits

Author SHA1 Message Date
Matt Arsenault
aa010de3db AMDGPU: Move a flawed assert when spilling SGPRs
It's possible to validly spill the frame offset register
in a call sequence to a VGPR. There are definitely issues
with SGPR spilling to memory, so move the assert later.

llvm-svn: 330612
2018-04-23 16:13:30 +00:00
Simon Pilgrim
6cb6c63128 [X86] Replace x87 instregex with instrs if they only match one instruction
llvm-svn: 330611
2018-04-23 16:10:50 +00:00
Adrian Prantl
354f803ed7 Fix computeSymbolSizes SEGFAULT on invalid file
We use llvm-symbolizer in some production systems, and we run it
against all possibly related files, including some that are not
ELF. We noticed that for some of those invalid files, llvm-symbolizer
would crash with SEGFAULT. Here is an example of such a file.

It is due to that in computeSymbolSizes, a loop uses condition

  for (unsigned I = 0, N = Addresses.size() - 1; I < N; ++I) {

where if Addresses.size() is 0, N would overflow and causing the loop
to access invalid memory.

Instead of patching the loop conditions, the commit makes so that the
function returns early if Addresses is empty.

Validated by checking that llvm-symbolizer no longer crashes.

Patch by Teng Qin!

Differential Revision: https://reviews.llvm.org/D44285

llvm-svn: 330610
2018-04-23 16:08:01 +00:00
Matt Arsenault
1873962565 AMDGPU: Assign enum name to stack ID
Also assert that it is correct for SGPRs. There is currently a bug
where stack slot coloring replaces SGPR spill FIs with one with
the default ID, which results in a more confusing assert later
about a dead object.

llvm-svn: 330607
2018-04-23 15:51:26 +00:00
Matt Arsenault
d8dea8f9d3 StackSlotColoring: Fix missing skipFunction check
llvm-svn: 330606
2018-04-23 15:51:21 +00:00
Daniel Neilson
90b8483e64 [SelectionDAG] Refactor lowering of atomic memory intrinsics.
Summary:
This just refactors the lowering of the atomic memory intrinsics to more
closely match the code patterns used in the lowering of the non-atomic
memory intrinsics. Specifically, we encapsulate the lowering in
SelectionDAG::getAtomicMem*() functions rather than embedding
the code directly in the SelectionDAGBuilder code.

llvm-svn: 330603
2018-04-23 15:40:37 +00:00
Robert Widmann
44ea8a8a00 [LLVM-C] DIBuilderBindings for Subrange and Arrays
Summary: Move Go bindings for subranges and DINode arrays.

Reviewers: harlanhaskins, whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45933

llvm-svn: 330594
2018-04-23 14:29:33 +00:00
Nico Weber
0825a0ac3d Sort a target list a bit better.
llvm-svn: 330593
2018-04-23 14:28:49 +00:00
Alexey Bataev
48b6344ddf [DEBUGINFO, NVPTX] Add the test for the debug info of the local
variables, NFC.

llvm-svn: 330592
2018-04-23 14:00:53 +00:00
Robert Widmann
c74871fc07 [LLVM-C] Finish Up Scope Bindings
Summary: Adds bindings for Module and NameSpace scopes and LLVMDIBuilderCreateForwardDecl, a counterpart to LLVMDIBuilderCreateReplaceableCompositeType.

Reviewers: harlanhaskins, whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45934

llvm-svn: 330591
2018-04-23 13:51:43 +00:00
Marianne Mailhot-Sarrasin
8bbfcd7f9f [doc] Removed obsolete -count-aa from AliasAnalysis documentation
Summary:
This patch removes references to AliasAnalysisCounter pass from the AliasAnalysis documentation. That pass have been eliminated in 2015, at revision trunk@247167.

Reviewed By: hfinkel

Differential Revision: https://reviews.llvm.org/D45876

llvm-svn: 330590
2018-04-23 13:45:28 +00:00
Simon Pilgrim
205b188e49 [X86] Remove instregex matching from CLAC/STAC.
Note - noticed this as the STAC case as it was unintentionally matching against *STACK* pseudo instructions.

llvm-svn: 330588
2018-04-23 13:24:17 +00:00
Nico Weber
b0b543aff2 List cpp file only once (was added in 147117 and 147117 as build fix each).
llvm-svn: 330587
2018-04-23 13:11:51 +00:00
Nicolai Haehnle
d9d126499c AMDGPU: Fix SDWA peephole for V_AND_B32
Summary:
Found by inspection. We care about the operand that *doesn't*
contain the immediate.

I believe this is currently not hit because we fold 0xff / 0xffff
immediates only later.

Change-Id: Ic3cf8538bc7da5eff3200d96eccf9d339e6345a7

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45886

llvm-svn: 330586
2018-04-23 13:06:03 +00:00
Nicolai Haehnle
626212884c AMDGPU: Fix a corner case crash in SIOptimizeExecMasking
Summary:
See the new test case; this is really unlikely to happen with real code,
but I ran into this while attempting to bugpoint-reduce a different issue.

Change-Id: I9ade1dc1aa8fd9c4d9fc83661d7b80e310b5c4a6

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45885

llvm-svn: 330585
2018-04-23 13:05:50 +00:00
Nico Weber
98dfb0aa3a Consistently sort add_subdirectory calls in lib/Target/*/CMakeLists.txt
llvm-svn: 330584
2018-04-23 12:49:34 +00:00
Sander de Smalen
ea3ff683e2 [AArch64][SVE] Asm: Support for contiguous, non-faulting LDNF1 (scalar+imm) load instructions
Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: rengolin

Subscribers: tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45684

llvm-svn: 330583
2018-04-23 12:43:19 +00:00
Max Kazantsev
a0b76b6fbb [LoopRotate] Fix incorrect SCEV invalidation in loop rotation
LoopRotate only invalidates innermost loops while the changes that it makes may
also affert any of this parents. With patch rL329047, SCEV becomes much smarter
about calculation of exit counts for outer loops, so we cannot assume that they are
not affected.

Differential Revision: https://reviews.llvm.org/D45945

llvm-svn: 330582
2018-04-23 12:33:31 +00:00
Simon Pilgrim
a2c00eb146 [X86] Remove unnecessary MMX reg-mem InstRW scheduler overrides.
llvm-svn: 330581
2018-04-23 11:57:15 +00:00
Max Kazantsev
d2dd32f947 [LoopUnroll] Fix potentially incorrect SCEV invalidation in UnrollRuntime
Current runtime unrolling invalidates parent loop saying that it might have changed
after the inner loop has changed, but it doesn't bother to do the same to its parents.
With patch rL329047, SCEV becomes much smarter about calculation of exit counts for
outer loops. We might need to invalidate not only the immediate parent, but also
any of its parents as well.

There is no clear evidence that there is some miscompile happening because of this
(at least I don't have such test), but the common sense says that the current code
is wrong.

Differential Revision: https://reviews.llvm.org/D45940
Reviewed By: chandlerc

llvm-svn: 330577
2018-04-23 10:39:38 +00:00
Max Kazantsev
460e952639 [LoopSimplify] Fix incorrect SCEV invalidation
In the function `simplifyOneLoop` we optimistically assume that changes in the
inner loop only affect this very loop and have no impact on its parents. In fact,
after rL329047 has been merged, we can now calculate exit counts for outer
loops which may depend on inner loops. Thus, we need to invalidate all parents
when we do something to a loop.

There is an evidence of incorrect behavior of `simplifyOneLoop`: when we insert
`SE->verify()` check in the end of this funciton, it fails on a bunch of existing
test, in particular:

    LLVM :: Transforms/LoopUnroll/peel-loop-not-forced.ll
    LLVM :: Transforms/LoopUnroll/peel-loop-pgo.ll
    LLVM :: Transforms/LoopUnroll/peel-loop.ll
    LLVM :: Transforms/LoopUnroll/peel-loop2.ll

Note that previously we have fixed issues of this variety, see rL328483.
This patch makes this function invalidate the outermost loop properly.

Differential Revision: https://reviews.llvm.org/D45937
Reviewed By: chandlerc

llvm-svn: 330576
2018-04-23 10:32:37 +00:00
Simon Tatham
d6b1d9a9cf Fix BNF nits in TableGen language reference.
Summary:
In the course of writing an experimental ANTLR grammar based on this
document, I found three errors in the documented BNF:

SimpleValues of dag type are allowed to have no operands at all after
the initial DagArg specifying the operator. For example, the value
(outs) is extremely common in backends; an example in the test suite
is test/TableGen/AsmVariant.td line 30. But the BNF doesn't allow
DagArgList to expand to the empty string (it must contain at least one
DagArg), and therefore the DagArgList specifying the operands in the
dag-shaped production for SimpleValue should be optional.

In the production for BodyItem with a 'let' and an optional RangeList,
the RangeList should have braces around it if it's present, matching
code such as "let E{7-0} = ..." on test/TableGen/BitsInit.td line 42.
Those braces aren't included in the RangeList nonterminal itself, so
instead they need to be part of the optional segment of the BodyItem
production.

Finally, the identifier after 'defm' should be optional. Again, this
is very common in the real back end .td files; an example in the test
suite is in test/TableGen/defmclass.td line 49.

Reviewers: rengolin, nhaehnle, stoklund

Reviewed By: nhaehnle

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45818

llvm-svn: 330570
2018-04-23 09:15:47 +00:00
Simon Tatham
74cb5781ea Test commit access.
Should be a harmless trimming of trailing whitespace from a
documentation file.

(There are other instances of trailing whitespace in this file alone.
I've only fixed one of them, on the basis that that way the rest are
still available for other people's commit-access tests :-)

llvm-svn: 330567
2018-04-23 08:41:53 +00:00
Sander de Smalen
af2c7aacb9 [AArch64][SVE] Asm: Support for structured ST2, ST3 and ST4 (scalar+imm) store instructions.
Reviewers: fhahn, rengolin, javed.absar, SjoerdMeijer, t.p.northover, echristo, evandro, huntergr

Reviewed By: rengolin

Subscribers: tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45681

llvm-svn: 330565
2018-04-23 07:50:35 +00:00
Chandler Carruth
589447ee6c [PM/LoopUnswitch] Remove a buggy assert in the new loop unswitch.
The condition this was asserting doesn't actually hold. I've added
comments to explain why, removed the assert, and added a fun test case
reduced out of 403.gcc.

llvm-svn: 330564
2018-04-23 06:58:36 +00:00
Craig Topper
b0f56ae63b [X86] Add VEX_WIG to VEX encoded version of VCMPPSY/VCMPPDY.
llvm-svn: 330563
2018-04-23 04:50:01 +00:00
Chandler Carruth
1ab8e22481 [PM/LoopUnswitch] Fix comment typo. NFC.
llvm-svn: 330560
2018-04-23 00:48:42 +00:00
Simon Pilgrim
8553c2135a [X86][Znver1] Remove unnecessary BMI1 ANDN InstRW overrides.
llvm-svn: 330558
2018-04-22 21:37:08 +00:00
Simon Pilgrim
baebd2e83a [llvm-mca][X86] Add BMI/LZCNT/POPCNT resource tests to all relevant models
The SandyBridge BMI tests are actually run on IvyBridge as that's the first lowest CPU that actually support the ISAs (but still use the SandyBridge model).

llvm-svn: 330556
2018-04-22 20:42:24 +00:00
Robert Widmann
d3e65518df [LLVM-C] Add DIBuilder Bindings For Variable Creation
Summary: Wrap LLVMDIBuilderCreateAutoVariable, LLVMDIBuilderCreateParameterVariable, LLVMDIBuilderCreateExpression, and move and correct LLVMDIBuilderInsertDeclareBefore and LLVMDIBuilderInsertDeclareAtEnd from the Go bindings to the C bindings.

Reviewers: harlanhaskins, whitequark, deadalnix

Reviewed By: harlanhaskins, whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45928

llvm-svn: 330555
2018-04-22 19:24:44 +00:00
Simon Pilgrim
f7303ab0d0 [X86] Remove unnecessary WriteFBlend/WriteBlend InstRW overrides.
Fixed a lot of the default classes which were being completely overridden.

llvm-svn: 330554
2018-04-22 18:35:53 +00:00
Simon Pilgrim
e2c48a1b5c [X86] Remove unnecessary WriteFMul/WriteFRcp/WriteFRsqrt InstRW overrides.
llvm-svn: 330553
2018-04-22 18:09:50 +00:00
Simon Pilgrim
b2e5ced9b1 [X86] Remove unnecessary CVT instrw overrides.
llvm-svn: 330552
2018-04-22 17:54:58 +00:00
Andres Freund
e85d8ff3b7 Test commit access.
Remove trailing whitespace.

llvm-svn: 330551
2018-04-22 17:53:34 +00:00
Sanjay Patel
454315178c [PatternMatch] allow undef elements when matching a vector zero
This is the last step in getting constant pattern matchers to allow
undef elements in constant vectors.

I'm adding a dedicated m_ZeroInt() function and building m_Zero() from
that. In most cases, calling code can be updated to use m_ZeroInt()
directly when there's no need to match pointers, but I'm leaving that
efficiency optimization as a follow-up step because it's not always
clear when that's ok.

There are just enough icmp folds in InstSimplify that can be used for 
integer or pointer types, that we probably still want a generic m_Zero()
for those cases. Otherwise, we could eliminate it (and possibly add a
m_NullPtr() as an alias for isa<ConstantPointerNull>()).

We're conservatively returning a full zero vector (zeroinitializer) in
InstSimplify/InstCombine on some of these folds (see diffs in InstSimplify),
but I'm not sure if that's actually necessary in all cases. We may be 
able to propagate an undef lane instead. One test where this happens is 
marked with 'TODO'.
 

llvm-svn: 330550
2018-04-22 17:07:44 +00:00
Simon Pilgrim
22d7d248b6 [X86][SkylakeServer] Remove unnecessary PMULLD instrw overrides.
llvm-svn: 330549
2018-04-22 16:51:12 +00:00
Simon Pilgrim
0bd59db959 [X86][Atom] Remove unnecessary scalar/vector load/move instrw overrides.
llvm-svn: 330548
2018-04-22 16:49:35 +00:00
Sanjay Patel
4de4f60b53 [InstCombine] add vector test with undef elts; NFC
llvm-svn: 330547
2018-04-22 15:59:14 +00:00
Simon Pilgrim
237f2154b7 [X86] Fix (completely overridden) WriteFHAdd/WritePHAdd classes to allow us to remove unnecessary instrw overrides.
llvm-svn: 330546
2018-04-22 15:25:59 +00:00
Simon Pilgrim
95e7e6933f [X86][MMX][SSE] Tag missed PHADD/PHSUB instructions with WritePHAdd
llvm-svn: 330545
2018-04-22 15:02:23 +00:00
Simon Pilgrim
93235e334a [X86] Remove unnecessary WriteFVarBlend/WriteVarBlend InstRW overrides.
This also fixes some of the ReadAfterLd issues due to InstRW.

llvm-svn: 330544
2018-04-22 14:43:12 +00:00
Sanjay Patel
dcdc24c017 [InstSimplify, InstCombine] add vector tests with undef elts; NFC
llvm-svn: 330543
2018-04-22 14:19:37 +00:00
Simon Pilgrim
89f86ff724 [X86] Fix WriteMPSAD/WritePSADBW values to allow us to remove unnecessary instrw overrides.
llvm-svn: 330542
2018-04-22 10:39:16 +00:00
Simon Pilgrim
fcb80e3122 [X86][SandyBridge] Remove unnecessary WritePOPCNTLd overrides by fixing load latency.
llvm-svn: 330541
2018-04-22 10:03:52 +00:00
Simon Pilgrim
a96a6505c6 [llvm-mca][X86] Add POPCNT resource test
llvm-svn: 330540
2018-04-22 09:58:00 +00:00
Jonas Devlieghere
c1062e3d3c [test] Fix MC/ELF/nocompression.s
Unbreak the linux build bots:
  http://lab.llvm.org:8011/builders/clang-lld-x86_64-2stage/builds/5165/
  http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/28775
  http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/8227

llvm-svn: 330539
2018-04-22 08:46:27 +00:00
Jonas Devlieghere
659684fd3b [lli] Fix syntax error: missing ';'
Fixes build issue on the windows bots:
  error C2143: syntax error: missing ';'

llvm-svn: 330538
2018-04-22 08:35:00 +00:00
Jonas Devlieghere
44f381c219 [lli] Make error handling more consistent.
Makes error handling more consistent by using the helpers in support.

llvm-svn: 330537
2018-04-22 08:02:11 +00:00
Jonas Devlieghere
44196f9fa0 [llvm-mc] Make error handling more consistent.
Makes error handling more consistent by using the helpers in support.

llvm-svn: 330536
2018-04-22 08:01:35 +00:00
Jonas Devlieghere
1d9884d205 [Support] Fix prefix logic in WithColor.
When a prefix is passed, we need to print a colon a space after it, not
just the prefix.

llvm-svn: 330535
2018-04-22 08:01:01 +00:00