Chris Lattner
cd4eadce11
add a terrible hack to allow out with dx is parens, a gas bug.
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This fixes PR8114
llvm-svn: 113894
2010-09-14 23:34:29 +00:00
Chris Lattner
46844daf49
add a missed cmov alias, part of rdar://8416805
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llvm-svn: 113693
2010-09-11 17:08:22 +00:00
Chris Lattner
57c170e15b
add support for all the setCC aliases. Part of rdar://8416805
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llvm-svn: 113692
2010-09-11 17:06:05 +00:00
Chris Lattner
7cb9d276e0
add support for pushfd/popfd which are aliases for pushfl/popfl.
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This fixes rdar://8408129 - pushfd and popfd get invalid instruction mnemonic errors
llvm-svn: 113690
2010-09-11 16:39:16 +00:00
Chris Lattner
1fd69dd039
implement rdar://8407928 - support for in/out with a missing "a" register.
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llvm-svn: 113689
2010-09-11 16:32:12 +00:00
Chris Lattner
43c86a062c
fix rdar://8407548, I missed the commuted form of xchg/test without a suffix.
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llvm-svn: 113427
2010-09-08 22:27:05 +00:00
Chris Lattner
5234733554
fix bugs in push/pop segment support, rdar://8407242
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llvm-svn: 113422
2010-09-08 22:13:08 +00:00
Chris Lattner
4e8c89174f
add support for the commuted form of the test instruction, rdar://8018260.
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llvm-svn: 113352
2010-09-08 05:51:12 +00:00
Chris Lattner
752daa9624
implement proper support for sysret{,l,q}, rdar://8403907
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llvm-svn: 113350
2010-09-08 05:45:34 +00:00
Chris Lattner
40f9f0fdba
implement the iret suite of instructions properly,
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fixing rdar://8403974
llvm-svn: 113349
2010-09-08 05:38:31 +00:00
Chris Lattner
05818145f8
add support for instruction prefixes on the same line as the instruction,
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implementing rdar://8033482 and PR7254.
llvm-svn: 113348
2010-09-08 05:17:37 +00:00
Chris Lattner
7435beb421
gas accepts xchg <mem>, <reg> as a synonym for xchg <reg>, <mem>.
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Add this to the mc assembler, fixing PR8061
llvm-svn: 113346
2010-09-08 04:53:27 +00:00
Chris Lattner
8f621d5039
fix the encoding of the "jump on *cx" family of instructions,
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rdar://8061602
llvm-svn: 113343
2010-09-08 04:30:51 +00:00
Chris Lattner
fd65cfd3eb
add missing cmov aliases, this resolves rdar://8208499
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llvm-svn: 113189
2010-09-07 00:05:45 +00:00
Chris Lattner
5a696fb3ca
"sldt <mem>" is ambiguous in 64-bit mode, but should
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always be disambiguated as sldtw. sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact. Force it to sldtw, resolving rdar://8017530
llvm-svn: 113186
2010-09-06 23:51:44 +00:00
Chris Lattner
3377802111
fix rdar://8017621 - llvm-mc can't guess encoding for "push $(1000)"
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llvm-svn: 113184
2010-09-06 23:40:56 +00:00
Chris Lattner
6ecbbff857
fix the operand constraints of the immediate form of in/out,
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allowing unsigned 8-bit operands. This fixes rdar://8208481
llvm-svn: 113182
2010-09-06 23:29:05 +00:00
Chris Lattner
b6eee35ca6
fixme accomplished
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llvm-svn: 112386
2010-08-28 20:40:28 +00:00
Daniel Dunbar
1a881a3eca
X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / clang -O3.
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llvm-svn: 112089
2010-08-25 21:11:02 +00:00
Daniel Dunbar
b96b0c40d3
MC/X86: Tweak imul recognition, previous hack only applies for the imul form
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taking immediates.
llvm-svn: 111950
2010-08-24 19:37:56 +00:00
Daniel Dunbar
3b74f75d13
MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends.
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llvm-svn: 111947
2010-08-24 19:24:18 +00:00
Daniel Dunbar
75e77b0063
MC/X86: Warn on scale factors > 1 without index register, instead of erroring,
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for 'as' compatibility.
llvm-svn: 111945
2010-08-24 19:13:38 +00:00
Chris Lattner
355d472093
fix PR7465, mishandling of lcall and ljmp: intersegment long
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call and jumps.
llvm-svn: 111496
2010-08-19 01:18:43 +00:00
Daniel Dunbar
4f45de1b1e
MC/X86/AsmParser: Give an explicit error message when we reject an instruction
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because it could have an ambiguous suffix.
llvm-svn: 110890
2010-08-12 00:55:42 +00:00
Bruno Cardoso Lopes
632295a03c
Support x86 "eiz" and "riz" pseudo index registers in the assembler.
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llvm-svn: 109295
2010-07-24 00:06:39 +00:00
Bruno Cardoso Lopes
8907fcd2b5
Move AVX encoding tests to different files
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llvm-svn: 109269
2010-07-23 21:25:26 +00:00
Bruno Cardoso Lopes
a80b57e5fc
Add AVX version of CLMUL instructions
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llvm-svn: 109248
2010-07-23 18:41:12 +00:00
Bruno Cardoso Lopes
b9182e3051
Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual
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llvm-svn: 109204
2010-07-23 00:54:35 +00:00
Bruno Cardoso Lopes
7722724eee
Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step
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llvm-svn: 109168
2010-07-22 21:18:49 +00:00
Bruno Cardoso Lopes
5920e38cd2
Add more 256-bit forms for a bunch of regular AVX instructions
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Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)
llvm-svn: 109063
2010-07-21 23:53:50 +00:00
Bruno Cardoso Lopes
eea3b7ed83
Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it
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llvm-svn: 109039
2010-07-21 21:37:59 +00:00
Bruno Cardoso Lopes
d13d8c2562
Add AVX only vzeroall and vzeroupper instructions
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llvm-svn: 109002
2010-07-21 08:56:24 +00:00
Bruno Cardoso Lopes
c4d93a5a34
Add new AVX vpermilps, vpermilpd and vperm2f128 instructions
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llvm-svn: 108984
2010-07-21 03:07:42 +00:00
Bruno Cardoso Lopes
a7efb29695
Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it
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llvm-svn: 108983
2010-07-21 02:46:58 +00:00
Bruno Cardoso Lopes
e0dce1c741
Add new AVX vextractf128 instructions
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llvm-svn: 108964
2010-07-20 23:19:02 +00:00
Bruno Cardoso Lopes
b677cbc9b2
Add new AVX instruction vinsertf128
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llvm-svn: 108892
2010-07-20 19:44:51 +00:00
Bruno Cardoso Lopes
a4ef0f6f09
x86_32 tests for vbroadcast
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llvm-svn: 108789
2010-07-20 00:11:50 +00:00
Bruno Cardoso Lopes
88869cb4db
Add AVX vbroadcast new instruction
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llvm-svn: 108788
2010-07-20 00:11:13 +00:00
Bruno Cardoso Lopes
4ca44dda21
Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!
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llvm-svn: 108769
2010-07-19 23:32:44 +00:00
Daniel Dunbar
1dd74c37c5
X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same
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instruction, we only want to allow the one for the current subtarget.
- This also fixes suffix matching for jmp instructions, because it eliminates
the ambiguity between 'jmpl' and 'jmpq'.
llvm-svn: 108746
2010-07-19 20:44:16 +00:00
Daniel Dunbar
220bd809bf
X86-64: Mark WINCALL and more tail call instructions as code gen only.
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llvm-svn: 108685
2010-07-19 07:21:07 +00:00
Daniel Dunbar
3b0ff3bac3
MC/X86: We now match instructions like "incl %eax" correctly for the arch we are
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assembling; remove crufty custom cleanup code.
llvm-svn: 108681
2010-07-19 06:14:54 +00:00
Bruno Cardoso Lopes
0616a418b6
Add AVX 256-bit compare instructions and a bunch of testcases
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llvm-svn: 108286
2010-07-13 22:06:38 +00:00
Bruno Cardoso Lopes
7bc71d2d0a
AVX 256-bit conversion instructions
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Add the x86 VEX_L form to handle special cases where VEX_L must be set.
llvm-svn: 108274
2010-07-13 21:07:28 +00:00
Bruno Cardoso Lopes
ae37153b05
Add AVX 256-bit packed logical forms
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llvm-svn: 108224
2010-07-13 02:38:35 +00:00
Bruno Cardoso Lopes
495ae629bb
Add AVX 256-bit unop arithmetic instructions
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llvm-svn: 108223
2010-07-13 01:53:31 +00:00
Bruno Cardoso Lopes
852e3bf472
Add AVX 256 binary arithmetic instructions
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llvm-svn: 108207
2010-07-12 23:04:15 +00:00
Bruno Cardoso Lopes
a4889e6f93
Add AVX 256-bit MOVMSK forms
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llvm-svn: 108184
2010-07-12 20:06:32 +00:00
Bruno Cardoso Lopes
f4180a9a7b
Add AVX 256-bit packed MOVNT variants
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llvm-svn: 108021
2010-07-09 21:42:42 +00:00
Bruno Cardoso Lopes
6ca8dc935c
Add AVX 256-bit unpack and interleave
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llvm-svn: 108017
2010-07-09 21:20:35 +00:00