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165 Commits

Author SHA1 Message Date
Dale Johannesen
81d6ecb886 Enhance APFloat to retain bits of NaNs (fixes oggenc). 
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.

llvm-svn: 41632
 2007-08-31 04:03:46 +00:00
Dan Gohman
2390ff5060 When x86 addresses matching exceeds its recursion limit, check to 
see if the base register is already occupied before assuming it can be
used. This fixes bogus code generation in the accompanying testcase.

llvm-svn: 41049
 2007-08-13 20:03:06 +00:00
Christopher Lamb
7e52a97df5 Use subregs to improve any_extend code generation when feasible. 
llvm-svn: 41013
 2007-08-10 22:22:41 +00:00
Christopher Lamb
450f6815b9 Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)). 
llvm-svn: 41010
 2007-08-10 21:48:46 +00:00
Evan Cheng
a58ebc46dd divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the instruction requires a rex prefix (i.e. outputs to r8b, etc.). So issue shift right by 8 on AX and then truncate it to 8 bits instead. 
llvm-svn: 40972
 2007-08-09 21:59:35 +00:00
Dale Johannesen
6b8e91e7e3 Long double patch 8 of N: make it partially work in 
SSE mode (all but conversions <-> other FP types, I think):
>>Do not mark all-80-bit operations as "Requires[FPStack]"
(which really means "not SSE").
>>Refactor load-and-extend to facilitate this.
>>Update comments.
>>Handle long double in SSE when computing FP_REG_KILL.

llvm-svn: 40906
 2007-08-07 20:29:26 +00:00
Dale Johannesen
3ea9879011 Get X86 long double calling convention to work 
(on Darwin, anyway).  Fix some table omissions for
LD arithmetic.

llvm-svn: 40877
 2007-08-06 21:31:06 +00:00
Evan Cheng
3163814591 Switch some multiplication instructions over to the new scheme for testing. 
llvm-svn: 40723
 2007-08-02 05:48:35 +00:00
Evan Cheng
0fa6cdbff5 Mac OS X X86-64 low 4G address not available. 
llvm-svn: 40701
 2007-08-01 23:45:51 +00:00
Christopher Lamb
919ce03da6 Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource. 
llvm-svn: 40578
 2007-07-29 01:24:57 +00:00
Evan Cheng
9802b13b38 Minor bug. 
llvm-svn: 40535
 2007-07-26 17:02:45 +00:00
Evan Cheng
413d222576 Same goes for constantpool, etc. 
llvm-svn: 40517
 2007-07-26 07:35:15 +00:00
Evan Cheng
9588231d34 Mac OS X x86-64 lower 4G address is not available. 
llvm-svn: 40502
 2007-07-25 23:41:36 +00:00
Dan Gohman
1444c5840b Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask. 
llvm-svn: 40480
 2007-07-24 23:00:27 +00:00
Dale Johannesen
7af19491d3 Fix for PR 1505 (and 1489). Rewrite X87 register 
model to include f32 variants.  Some factoring
improvments forthcoming.

llvm-svn: 37847
 2007-07-03 00:53:03 +00:00
Dan Gohman
a62327ea40 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.

llvm-svn: 37704
 2007-06-22 14:59:07 +00:00
Chris Lattner
b97b122176 Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
llvm-svn: 35926
 2007-04-11 22:29:46 +00:00
Anton Korobeynikov
1a8740c88b Oops :) 
llvm-svn: 35438
 2007-03-28 18:38:33 +00:00
Anton Korobeynikov
d59c4e54c7 Don't allow MatchAddress recurse too much. This trims exponential 
behaviour in some cases.

llvm-svn: 35437
 2007-03-28 18:36:33 +00:00
Chris Lattner
b9cc0ade43 Two changes: 
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll

llvm-svn: 35204
 2007-03-20 06:08:29 +00:00
Chris Lattner
3e01807e87 Fix a miscompilation in the addr mode code trying to implement X | C and 
X + C to promote LEA formation.  We would incorrectly apply it in some cases
(test) and miss it in others.

This fixes CodeGen/X86/2007-02-04-OrAddrMode.ll

llvm-svn: 33884
 2007-02-04 20:18:17 +00:00
Evan Cheng
818c6bdfa2 Linux GOT indirect reference is only necessary in PIC mode. 
llvm-svn: 33441
 2007-01-22 21:34:25 +00:00
Reid Spencer
09efdecc2d Adjust #includes to compensate for lost of DerivedTypes.h in 
TargetLowering.h

llvm-svn: 33154
 2007-01-12 23:22:14 +00:00
Anton Korobeynikov
548b9af9c2 * PIC codegen for X86/Linux has been implemented 
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)

llvm-svn: 33136
 2007-01-12 19:20:47 +00:00
Anton Korobeynikov
2b39939053 Really big cleanup. 
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin

llvm-svn: 32833
 2007-01-03 11:43:14 +00:00
Chris Lattner
8896b6cb46 eliminate static ctors for Statistic objects. 
llvm-svn: 32703
 2006-12-19 22:59:26 +00:00
Evan Cheng
f5c9f4c3c9 Fix for PR1062 by Dan Gohman. 
llvm-svn: 32688
 2006-12-19 21:31:42 +00:00
Bill Wendling
f13d78d3b8 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Chris Lattner
a531ce882e Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.

llvm-svn: 32279
 2006-12-06 17:46:33 +00:00
Evan Cheng
40a5de9cd9 Revert an unintended change. 
llvm-svn: 32239
 2006-12-05 22:03:40 +00:00
Evan Cheng
adeea85f7d - Switch X86-64 JIT to large code size model. 
- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.

llvm-svn: 32238
 2006-12-05 19:50:18 +00:00
Evan Cheng
2c35691a02 - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit 
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.

llvm-svn: 32215
 2006-12-05 04:01:03 +00:00
Evan Cheng
456101ebb9 - Use a different wrapper node for RIP-relative GV, etc. 
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.

llvm-svn: 32046
 2006-11-30 21:55:46 +00:00
Evan Cheng
1e3f41acde Clean up. 
llvm-svn: 32027
 2006-11-29 23:46:27 +00:00
Evan Cheng
7e20347607 Fix for PR1018 - Better support for X86-64 Linux in small code model. 
llvm-svn: 32026
 2006-11-29 23:19:46 +00:00
Evan Cheng
98fa7ab4d7 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.

llvm-svn: 31947
 2006-11-27 23:37:22 +00:00
Evan Cheng
a9176b38f9 For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while 
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.

llvm-svn: 31832
 2006-11-17 22:10:14 +00:00
Bill Wendling
b6061e32fa Removed even more std::cerr and #include <iostream> things. 
llvm-svn: 31813
 2006-11-17 07:52:03 +00:00
Evan Cheng
0e82270ff2 Matches MachineInstr changes. 
llvm-svn: 31712
 2006-11-13 23:36:35 +00:00
Evan Cheng
b9e2ae9e37 Add implicit use / def operands to created MI's. 
llvm-svn: 31676
 2006-11-11 10:21:44 +00:00
Evan Cheng
f880ed86ff Add all implicit defs to FP_REG_KILL mi. 
llvm-svn: 31674
 2006-11-11 07:19:36 +00:00
Evan Cheng
3a017e8abd Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a 
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.

llvm-svn: 31641
 2006-11-10 21:23:04 +00:00
Evan Cheng
736a8eb3cd Match tblegen changes. 
llvm-svn: 31571
 2006-11-08 20:34:28 +00:00
Jeff Cohen
e1003da1a2 Unbreak VC++ build. 
llvm-svn: 31464
 2006-11-05 19:31:28 +00:00
Chris Lattner
24e8fdc1f6 silence warning 
llvm-svn: 31393
 2006-11-03 01:13:15 +00:00
Evan Cheng
c73547a71d SelectScalarSSELoad should call CanBeFoldedBy as well. 
llvm-svn: 30973
 2006-10-16 06:34:55 +00:00
Evan Cheng
6c8de88f88 Corrected load folding check. We need to start from the root of the sub-dag 
being matched and ensure there isn't a non-direct path to the load (i.e. a
path that goes out of the sub-dag.)

llvm-svn: 30958
 2006-10-14 08:33:25 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
llvm-svn: 30945
 2006-10-13 21:14:26 +00:00
Evan Cheng
76d365ac84 Doh. This wasn't causing problems by luck. 
llvm-svn: 30914
 2006-10-12 19:13:59 +00:00
Chris Lattner
fde6859201 fix compilation failure of smg2000 
llvm-svn: 30900
 2006-10-12 03:55:48 +00:00