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Commit Graph

217159 Commits

Author SHA1 Message Date
zhijian
ad7e1ecf68 [AIX][XCOFF] emit vector info of traceback table.
Summary:

emit vector info of traceback table.

Reviewers: Jason Liu,Hubert Tong
Differential Revision: https://reviews.llvm.org/D93659
2021-06-14 11:15:22 -04:00
Florian Hahn
bc6a656349 [ADT] Use unnamed argument for unused arg in StringMapEntryStorage.
This silences an 'unsused argument' warning.

Similar to c2006f857d80f54b90ed7d911d3e7acf4f46001b.
2021-06-14 15:54:57 +01:00
Jingu Kang
d8d1189bdb [AArch64] Improve SAD pattern
Given a vecreduce_add node, detect the below pattern and convert it to the node
sequence with UABDL, [S|U]ADB and UADDLP.

i32 vecreduce_add(
 v16i32 abs(
   v16i32 sub(
    v16i32 [sign|zero]_extend(v16i8 a), v16i32 [sign|zero]_extend(v16i8 b))))
=================>
i32 vecreduce_add(
  v4i32 UADDLP(
    v8i16 add(
      v8i16 zext(
        v8i8 [S|U]ABD low8:v16i8 a, low8:v16i8 b
      v8i16 zext(
        v8i8 [S|U]ABD high8:v16i8 a, high8:v16i8 b

Differential Revision: https://reviews.llvm.org/D104042
2021-06-14 15:48:51 +01:00
LLVM GN Syncbot
4f6c145c6a [gn build] Port c820b494d6e1 2021-06-14 14:41:33 +00:00
Roman Lebedev
7a71822528 [NFC][DAGCombine] Extract getFirstIndexOf() lambda back into a function
Not all supported compilers like such lambdas, at least one buildbot is unhappy.
2021-06-14 16:25:59 +03:00
Roman Lebedev
9f4eaf3945 [DAGCombine] reduceBuildVecToShuffle(): sort input vectors by decreasing size
The sorting, obviously, must be stable, else we will have random assembly fluctuations.

Apparently there was no test coverage that would benefit from that,
so i've added one test.

The sorting consists of two parts - just sort the input vectors,
and recompute the shuffle mask -> input vector mapping.
I don't believe we need to do anything else.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D104187
2021-06-14 16:18:37 +03:00
Jeroen Dobbelaere
c08eaddde6 Intrinsic::getName: require a Module argument
Ensure that we provide a `Module` when checking if a rename of an intrinsic is necessary.

This fixes the issue that was detected by https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=32288
(as mentioned by @fhahn), after committing D91250.

Note that the `LLVMIntrinsicCopyOverloadedName` is being deprecated in favor of `LLVMIntrinsicCopyOverloadedName2`.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D99173
2021-06-14 14:52:29 +02:00
Florian Hahn
68369fae88 [VPlan] Add additional tests for region merging.
Add additional tests suggested in D100260.

Also drop the unneeded `indvars.` prefix from induction phi name.
2021-06-14 11:25:06 +01:00
Guillaume Chatelet
9aa4a5f77d [llvm] remove Sequence::asSmallVector()
There's no need for `toSmallVector()` as `SmallVector.h` already provides a `to_vector` free function that takes a range.

Reviewed By: Quuxplusone

Differential Revision: https://reviews.llvm.org/D104024
2021-06-14 08:28:05 +00:00
Simon Moll
91d4645488 [VP] Binary floating-point intrinsics.
This patch implements vector-predicated intrinsics on IR level for fadd,
fsub, fmul, fdiv and frem.  There operate in the default floating-point
environment. We will use constrained fp operand bundles for constrained
vector-predicated fp math (D93455).

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D93470
2021-06-14 08:51:41 +02:00
Mindong Chen
65590a4d7a [LoopVectorize] precommit pr50686.ll for D104148 2021-06-14 13:58:25 +08:00
Xuanda Yang
a66f237758 [LLParser] Remove outdated deplibs
The comment mentions deplibs should be removed in 4.0. Removing it in this patch.

Reviewed By: compnerd, dexonsmith, lattner

Differential Revision: https://reviews.llvm.org/D102763
2021-06-14 12:46:12 +08:00
RamNalamothu
a2306da6e0 Implement DW_CFA_LLVM_* for Heterogeneous Debugging
Add support in MC/MIR for writing/parsing, and DebugInfo.

This is part of the Extensions for Heterogeneous Debugging defined at
https://llvm.org/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.html

Specifically the CFI instructions implemented here are defined at
https://llvm.org/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.html#cfa-definition-instructions

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D76877
2021-06-14 08:51:50 +05:30
Aditya Kumar
d436515539 Calculate getTerminator only when necessary
Differential Revision: https://reviews.llvm.org/D104202
2021-06-13 20:16:07 -07:00
Juneyoung Lee
2f184e9475 [Utils] Add missing freeze and poison keyword highlights
This patch adds missing keyword highlights for freeze and poison

Reviewed By: MaskRay, porglezomp

Differential Revision: https://reviews.llvm.org/D104017
2021-06-14 09:21:26 +09:00
Eric Astor
d15098fdc8 [ms] [llvm-ml] When parsing MASM, "jmp short" instructions are case insensitive
Handle "short" in a case-insensitive fashion in MASM.

Required to correctly parse z_Windows_NT-586_asm.asm from the OpenMP runtime.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D104195
2021-06-13 18:36:00 -04:00
Eric Astor
679dc9bc3b [ms] [llvm-ml] Fix capitalization of the ignored CPU directives
These directives are matched in lowercase, so make sure to use lowercase for their P suffix.

Differential Revision: https://reviews.llvm.org/D104206
2021-06-13 18:34:42 -04:00
Eric Astor
3e051c60b8 Fix misspelled instruction in X86 assembly parser
Did not correctly handle "jecxz short <address>".

Discovered while working on LLVM-ML; shows up in z_Windows_NT-586_asm.asm from the OpenMP runtime

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D104194
2021-06-13 18:34:15 -04:00
David Green
a615d4a362 [DSE] Extra multiblock loop tests, NFC.
Some of these can be DSE'd, some of which cannot. Useful in D100464.
2021-06-13 22:30:42 +01:00
LemonBoy
71d85d4af9 [SPARC] Legalize truncation and extension between fp128 and half
Lower truncations and expansions between fp128 and half values into libcalls.
Expand truncating stores into two separate truncation and a store operations.

Reviewed By: jrtc27

Differential Revision: https://reviews.llvm.org/D104185
2021-06-13 20:05:15 +02:00
Nikita Popov
478596b756 [LoopUnroll] Test multi-exit runtime unrolling with predictable exit (NFC)
The (prior to prologue insertion) predictable exit shouldn't get
folded here. Make sure it isn't...
2021-06-13 18:48:38 +02:00
Simon Pilgrim
0b64dd4442 RawError.h - remove unused <string> include. NFCI. 2021-06-13 17:32:57 +01:00
Simon Pilgrim
3f3834f7e5 BoundsChecking.cpp - tidy implicit header dependencies. NFCI.
We don't use <vector> but we do use std::pair (<utility>)
2021-06-13 17:08:15 +01:00
Simon Pilgrim
836026294d DIPrinter.h - tidy implicit header dependencies. NFCI.
We don't use <string> but we do use std::unique_ptr (<memory>) and llvm::Optional<>
2021-06-13 17:00:15 +01:00
Simon Pilgrim
910cf30f57 DetailedRecordsBackend.cpp - printSectionHeading - avoid std::string creation/copies.
Don't create std::string from constant c-strings or pass std::string by value - we can use StringRef instead.
2021-06-13 16:49:40 +01:00
Simon Pilgrim
9ec7689e46 DetailedRecordsBackend.cpp - tidy implicit header dependencies. NFCI.
We don't use <algorithm>, <set> or <vector>, but we do use std::pair (<utility>).
2021-06-13 16:27:17 +01:00
Simon Pilgrim
fdadecc8f8 ProfiledCallGraph.h - remove unused <string> include. NFCI. 2021-06-13 15:19:25 +01:00
Simon Pilgrim
20d33f98a5 RegUsageInfoPropagate.cpp - remove unused <string> and <map> includes. NFCI. 2021-06-13 15:19:24 +01:00
Simon Pilgrim
f71e5f90f8 MachOObjectFile.cpp - remove unused <string> include. NFCI. 2021-06-13 15:19:24 +01:00
Simon Pilgrim
cf2264bfb7 DWARFDebugFrame.cpp - remove unused <string> include. NFCI. 2021-06-13 15:19:24 +01:00
Simon Pilgrim
052e3ea653 GVN.cpp - remove unused <vector> include. NFCI. 2021-06-13 14:06:32 +01:00
Simon Pilgrim
8c6f5b0343 LoopUnrollAndJamPass.cpp - remove unused <vector> include. NFCI. 2021-06-13 14:06:32 +01:00
David Green
9fd9749580 [ARM] Introduce t2WhileLoopStartTP
This adds t2WhileLoopStartTP, similar to the t2DoLoopStartTP added in
D90591. It keeps a reference to both the tripcount register and the
element count register, so that the ARMLowOverheadLoops pass in the
backend can pick the correct one without having to search for it from
the operand of a VCTP.

Differential Revision: https://reviews.llvm.org/D103236
2021-06-13 13:55:34 +01:00
Sanjay Patel
416150a164 [InstCombine] fold ctlz/cttz of bool types
https://alive2.llvm.org/ce/z/tX4pUT
2021-06-13 08:26:40 -04:00
Simon Pilgrim
cf219f88a5 ArgumentPromotion.cpp - remove unused <string> include. NFCI. 2021-06-13 13:03:47 +01:00
Simon Pilgrim
d6c6c4cfea VPlanSLP.cpp - tidy implicit header dependencies. NFCI.
We don't use std::string and std::vector, but we do use std::pair and std::max.
2021-06-13 12:37:17 +01:00
Lang Hames
d271ed7707 [JITLink][MachO] Add missing testcase.
This test was accidentally left out of f9649d123db.
2021-06-13 20:43:49 +10:00
Kristina Bessonova
9a828c143e [ARM][NEON] Combine base address updates for vld1Ndup intrinsics
Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D103836
2021-06-13 11:18:32 +02:00
Luo, Yuanke
426a9ac6ee [X86] Check immediate before get it.
For CMP imm instruction, when the operand 1 is symbol address we should
check if it is immediate first. Here is the example code.
`CMP64mi32 $noreg, 8, killed renamable $rcx, @d, $noreg, @a, implicit-def
$eflags`
Many thanks to Craig, Topper for the test case to reproduce this issue.

Differential Revision: https://reviews.llvm.org/D104037
2021-06-13 15:40:52 +08:00
Luo, Yuanke
c9854fe645 Revert "[X86] Check immediate before get it."
This reverts commit 9eb2f723c24523194b833779d20b027bf89a4f55.
2021-06-13 13:55:38 +08:00
Shoaib Meenai
2f43148446 [runtimes] Fix umbrella component targets
When we're building the runtimes for multiple platform targets, we
create umbrella build targets for each distribution component, but those
targets didn't have any dependencies and were just no-ops. Make the
umbrella target depend on the sub-targets for each platform to fix this,
which is consistent with the behavior of the umbrella targets for each
runtime, and also consistent with the behavior when we've only specified
the default target.
2021-06-12 19:49:44 -07:00
David Blaikie
d3ee11b29a llvm-objcopy: fix section size truncation/extension when dumping sections
Since this only comes up with inputs containing sections at least 4GB
large (I guess I could use a bzero section or something, so the input
file doesn't have to be 4GB, but even then the output file would have to
be 4GB, right?) I've skipped testing this. If there's a nice way to test
this without needing 4GB inputs or output files.

The subtlety here is demonstrated by this code:

struct t { operator uint64_t(); };
static_assert(std::is_same_v<int, decltype(std::declval<bool>() ? 0 : std::declval<t>())>);
static_assert(std::is_same_v<uint64_t, decltype(std::declval<bool>() ? 0 : std::declval<uint64_t>())>);

Because of this difference, the original source code was getting an int
type (truncating the actual size) and then extending it again, resulting
in bogus values (I haven't thought through this hard enough to explain
why the resulting value was 0xffff... - sign extension, possible UB, but
in any case it's the wrong answer - in this particular case I was
looking at that resulted in a size so large that we couldn't open a file
large enough to write to and ended up with a rather vague:

error: 'file_name.o': Invalid argument
2021-06-12 19:00:10 -07:00
Luo, Yuanke
4f7d0be5fe [X86] Check immediate before get it.
For CMP imm instruction, when the operand 1 is symbol address we should
check if it is immediate first. Here is the example code.
`CMP64mi32 $noreg, 8, killed renamable $rcx, @d, $noreg, @a, implicit-def
$eflags`
Many thanks to Craig, Topper for the test case to reproduce this issue.

Differential Revision: https://reviews.llvm.org/D104037
2021-06-13 09:08:40 +08:00
Roman Lebedev
209d27cb4a [NFC][X86][Codegen] Add shuffle test that would benefit from sorting in reduceBuildVecToShuffle() 2021-06-13 00:07:48 +03:00
Ian McIntyre
78819ccd55 [llvm-objcopy] Exclude empty sections in IHexWriter output
IHexWriter was evaluating a section's physical address when deciding if
that section should be written to an output. This approach does not
account for a zero-sized section that has the same physical address as a
sized section. The behavior varies from GNU objcopy, and may result in a
HEX file that does not include all program sections.

The IHexWriter now excludes zero-sized sections when deciding what
should be written to the output. This affects the contents of the
writer's `Sections` collection; we will not try to insert multiple
sections that could have the same physical address. The behavior seems
consistent with GNU objcopy, which always excludes empty sections,
no matter the address.

The new test case evaluates the IHexWriter behavior when provided a
variety of empty sections that overlap or append a filled section. See
the input file's comments for more information. Given that test input,
and the change to the IHexWriter, GNU objcopy and llvm-objcopy produce
the same output.

Reviewed By: jhenderson, MaskRay, evgeny777

Differential Revision: https://reviews.llvm.org/D101332
2021-06-12 12:23:07 -07:00
Xun Li
ab9fd44679 [CHR] Don't run ControlHeightReduction if any BB has address taken
This patch is to address https://bugs.llvm.org/show_bug.cgi?id=50610.
In computed goto pattern, there are usually a list of basic blocks that are all targets of indirectbr instruction, and each basic block also has address taken and stored in a variable.
CHR pass could potentially clone these basic blocks, which would generate a cloned version of the indirectbr and clonved version of all basic blocks in the list.
However these basic blocks will not have their addresses taken and stored anywhere. So latter SimplifyCFG pass will simply remove all tehse cloned basic blocks, resulting in incorrect code.
To fix this, when searching for scopes, we skip scopes that contains BBs with addresses taken.
Added a few test cases.

Reviewed By: aeubanks, wenlei, hoy

Differential Revision: https://reviews.llvm.org/D103867
2021-06-12 10:29:53 -07:00
Craig Topper
e263936592 [X86] Add ISD::FREEZE and ISD::AssertAlign to the list of opcodes that don't guarantee upper 32 bits are zero.
The freeze issue was reported here
https://llvm.discourse.group/t/bug-or-feature-freeze-instruction/3639

I don't have a test for AssertAlign. I just noticed it was missing
and assume it should be similar to the other two Asserts.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D104178
2021-06-12 09:52:29 -07:00
Florian Hahn
c1b8ea5789 [VPlan] Add more sinking/merging tests with predicated loads/stores. 2021-06-12 15:36:51 +01:00
Florian Hahn
a3f4e168f5 Revert "Allow signposts to take advantage of deferred string substitution"
This reverts commit 4fc93a3a1f95ef5a0a57750fc621f2411ea445a8 because it
breaks LLDB builds on certain macOS platform & SDK combinations, e.g.
http://green.lab.llvm.org/green/job/lldb-cmake-standalone/3288/consoleFull#-195476041949ba4694-19c4-4d7e-bec5-911270d8a58c
2021-06-12 12:08:25 +01:00
Kristina Bessonova
175bc341a3 [lit] Attempt for fix tests failing because of 'warning: non-portable path to file'
This is an attempt to fix clang test failures due to 'nonportable-include-path'
warnings on Windows when a path to llvm-project's base directory contains some
uppercase letters (excluding a drive letter).

The issue originates from 2 problems:
* discovery.py loads site config in lower case causing all the paths
based on __file__ and requested within the config file to be in lowercase as well,
* neither os.path.abspath() nor os.path.realpath() (both used to obtain paths of
config files, sources, object directories, etc) do not return paths in the correct
case for Windows (at least consistently for all python versions).

As os.path library doesn't seem to provide any relaible way to restore
the case for paths on Windows, this patch proposes to use pathlib.resolve().
pathlib is a part of Python 3.4 while llvm lit requires Python 3.6.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D103014
2021-06-12 12:49:03 +02:00