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Author SHA1 Message Date
Cameron Zwarich
af47f4a117 A CCState was being created without setting whether it is in the Call or Prologue state, 
causing an assertion failure downstream. This fixes <rdar://problem/9562908>.

This really seems like it should always be set at CCState creation time, so mistakes like
this can never happen. I'll take a look at doing that.

llvm-svn: 132811
 2011-06-09 22:30:07 +00:00
Eli Friedman
14c6ce9041 Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://9562809. 
The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now.

llvm-svn: 132809
 2011-06-09 22:14:44 +00:00
Rafael Espindola
4b78a41c8c AnalyzeBranch modifies the bb, but we don't want to modify a bb with 
eh edges. Swap the order of the checks to avoid it.

llvm-svn: 132806
 2011-06-09 21:43:25 +00:00
Rafael Espindola
5fd95a9c94 A PHI in this basic block is a use in another basic block. 
llvm-svn: 132805
 2011-06-09 20:55:41 +00:00
John McCall
1cf92d93f0 When deleting a basic block, remove call edges only for non-intrinsics. 
llvm-svn: 132803
 2011-06-09 20:31:09 +00:00
Roman Divacky
9b1aea9b45 Fix emission of PPC64 assembler on non-darwin platforms by splitting 
VK_PPC_{HA,LO}16 into darwin and gas variants.

Darwin wants {ha,lo}16(symbol) while gnu as wants symbol@{ha,l}.

llvm-svn: 132802
 2011-06-09 20:25:38 +00:00
Johnny Chen
5f63b7b4c1 Modify comment. 
llvm-svn: 132800
 2011-06-09 20:11:46 +00:00
John McCall
806ec47668 SplitCriticalEdge can sometimes split the edge from an invoke to a landing 
pad, separating the exception and selector calls from the new lpad.  Teaching
it not to do that, or to properly adjust the CFG afterwards, is out of
scope because it would require the other edges to the landing pad to be split
as well (effectively).  Instead, just recover from the most likely cases
during inlining.  The best long-term solution is to change the exception
representation and commit to either requiring or not requiring the more
complex edge-splitting logic;  this is just a shorter-term hack.

llvm-svn: 132799
 2011-06-09 20:06:24 +00:00
Rafael Espindola
b39a7c9540 Refactor some checks into shouldTailDuplicate. Update comments. 
No functionality change.

llvm-svn: 132798
 2011-06-09 19:54:42 +00:00
John McCall
d31a1b8de1 Teach the CallGraph to ignore calls to intrinsics. 
llvm-svn: 132797
 2011-06-09 19:46:27 +00:00
Eli Friedman
f2dbd3e767 Revert 132789; it breaks tests. My mistake. 
llvm-svn: 132795
 2011-06-09 19:33:30 +00:00
Jason W Kim
a5b62f4fc7 Remove an uneeded switch - Turns out reloc results are identical w/o the switch. (face+palm) 
llvm-svn: 132790
 2011-06-09 19:13:45 +00:00
Eli Friedman
d04e75fca2 Add a check to make sure we don't crash with strange configurations where we do fast-isel, then try to fold instructions. PR10092. 
llvm-svn: 132789
 2011-06-09 18:55:00 +00:00
Jakob Stoklund Olesen
a096524531 Move TableGen's register bank classes to their own source file. 
I'll be moving some more code there to gather all of the
register-specific stuff in one place. Currently it is shared between
CodeGenTarget and RegisterInfoEmitter.

The plan is that CodeGenRegisters can compute the full register bank
structure while RegisterInfoEmitter only will handle the printing part.

llvm-svn: 132788
 2011-06-09 18:42:07 +00:00
Galina Kistanova
6f214c237a Added dg.exp to run FrontendC ARM-dependent tests; updated inline-asm-multichar.c test per this change. 
llvm-svn: 132785
 2011-06-09 17:18:37 +00:00
Bob Wilson
c8dc6c21a7 Add special-case range checking for VCVT_N intrinsic immediate operands. 
Radar 9558930.

llvm-svn: 132782
 2011-06-09 16:57:29 +00:00
Jakob Stoklund Olesen
164dc685e5 Remove custom allocation order boilerplate that is no longer needed. 
The register allocators automatically filter out reserved registers and
place the callee saved registers last in the allocation order, so custom
methods are no longer necessary just for that.

Some targets still use custom allocation orders:

ARM/Thumb: The high registers are removed from GPR in thumb mode. The
NEON allocation orders prefer to use non-VFP2 registers first.

X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble.

SystemZ: Some of the allocation orders are omitting R12 aliases without
explanation. I don't understand this target well enough to fix that. It
looks like all the boilerplate could be removed by reserving the right
registers.

llvm-svn: 132781
 2011-06-09 16:56:59 +00:00
Eric Christopher
24dafa3dbc Speculatively revert 132758 and 132768 to try to fix the Windows buildbots. 
llvm-svn: 132777
 2011-06-09 16:03:19 +00:00
Eric Christopher
88088d9b8a Recommit r132764 since it didn't cause the windows buildbot failures. 
llvm-svn: 132776
 2011-06-09 15:39:01 +00:00
Rafael Espindola
0cab70db0d Improve the handling of available_externally and llvm.global_ctors. 
llvm-svn: 132775
 2011-06-09 14:38:09 +00:00
Duncan Sands
a0c88a5dd5 Enable printf() to iprintf() optimization for the TCE target. 
Patch by Pekka Jaaskelainen. 

llvm-svn: 132774
 2011-06-09 11:11:45 +00:00
Chris Lattner
af60d3ba93 add another sandybridge alias. 
llvm-svn: 132772
 2011-06-09 06:38:17 +00:00
Eric Christopher
386e80f51e Temporarily revert 132764 to see if it fixes the Windows buildbot. 
llvm-svn: 132771
 2011-06-09 06:29:54 +00:00
Eric Christopher
9fb6aad029 Have the JIT tutorial use IRBuilder for the IR. 
Patch by Jake Waskett!

llvm-svn: 132770
 2011-06-09 05:58:50 +00:00
Akira Hatanaka
33ec063f3b Initial support for inline asm memory operand constraints. 
llvm-svn: 132768
 2011-06-09 03:31:05 +00:00
Cameron Zwarich
ca3f5d4844 Remove a vacuous condition. 
llvm-svn: 132767
 2011-06-09 01:52:44 +00:00
Cameron Zwarich
72cd0d1b5b Fix PR10104 by adding a bounds check on a vector element access check. It was 
assuming that all offsets are legal vector accesses, and thus trying to access
the float member of { <2 x float>, float } as the 3rd element of the first
member.

llvm-svn: 132766
 2011-06-09 01:45:33 +00:00
Eric Christopher
65f7ea8a35 If the alignment of the byval argument is greater than the alignment 
of the frame then increase the maximum alignment of the frame to
match.

Fixes PR6965

llvm-svn: 132764
 2011-06-09 00:15:19 +00:00
Eric Christopher
1ae9ec6124 Add a parameter to CCState so that it can access the MachineFunction. 
No functional change.

Part of PR6965

llvm-svn: 132763
 2011-06-08 23:55:35 +00:00
Cameron Zwarich
68f8e98b8e Fix an assymmetry between ConvertScalar_ExtractValue and ConvertScalar_InsertValue. The 
former was using the size of the entire alloca, whereas the latter was correctly using
the allocated size of the immediate type being converted (which may differ from the size
of the alloca). This fixes PR10082.

llvm-svn: 132759
 2011-06-08 22:08:31 +00:00
Akira Hatanaka
38115eb019 Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of the 
dynamically allocated stack area was not set.

llvm-svn: 132758
 2011-06-08 21:28:09 +00:00
Akira Hatanaka
ea8ce56dbb Reorganize code in MipsTargetLowering::LowerCall to improve readability. 
llvm-svn: 132756
 2011-06-08 17:39:33 +00:00
Andrew Trick
1de3fe7311 Remove a temporary test case probe in CheckForLiveRegDef. 
llvm-svn: 132751
 2011-06-08 15:19:49 +00:00
Rafael Espindola
e987e93aa0 Fix count. 
llvm-svn: 132749
 2011-06-08 14:23:19 +00:00
Rafael Espindola
c96d74d84e Count how many phis we are creating. 
llvm-svn: 132748
 2011-06-08 14:13:31 +00:00
Cameron Zwarich
e7e6bc3a33 Fix an issue where the two-address conversion pass incorrectly rewrites untied 
operands to an early clobber register. This fixes <rdar://problem/9566076>.

llvm-svn: 132738
 2011-06-07 23:54:00 +00:00
Rafael Espindola
12efa298a0 Fix a silly error I introduce in r131951. 
Fixes PR10095.

llvm-svn: 132735
 2011-06-07 23:26:45 +00:00
Eric Christopher
dc8fe755e3 Create a new ARM directory for FrontendC tests and use it. 
llvm-svn: 132734
 2011-06-07 22:20:13 +00:00
Chad Rosier
e69f7a381a Fixed a few illegal paths with llvm_unreachable. Patch by Cameron McInally. 
llvm-svn: 132732
 2011-06-07 20:41:31 +00:00
Chad Rosier
dde3ea46e9 Typo. 
llvm-svn: 132730
 2011-06-07 20:03:13 +00:00
Akira Hatanaka
101d50423a Refactor MipsTargetLowering::EmitInstrWithCustomInserter. 
llvm-svn: 132726
 2011-06-07 19:28:39 +00:00
Akira Hatanaka
e56d1fa083 Put back removed line. 
llvm-svn: 132725
 2011-06-07 19:03:14 +00:00
Akira Hatanaka
3b7982650c Coding style fixes. 
- Fix indentation.
- Move comments.
- Fit lines in 80 columns.
- Remove dead code.

llvm-svn: 132724
 2011-06-07 18:58:42 +00:00
Akira Hatanaka
f56f544d80 Use tabs to separate opcode and operand strings. 
llvm-svn: 132718
 2011-06-07 18:16:51 +00:00
Akira Hatanaka
fe54bb9de1 Add comments for wrapper node patterns in MipsInstrInfo.td. 
llvm-svn: 132717
 2011-06-07 18:00:14 +00:00
Roman Divacky
478976c99b Test that ".byte 1, 2, 3, 4" does the right thing. 
Requested by nbjoerg!

llvm-svn: 132716
 2011-06-07 17:32:17 +00:00
Roman Divacky
0a62f9906f Make EmitIntValue() work properly on big-endian targets. 
llvm-svn: 132715
 2011-06-07 17:31:02 +00:00
Stuart Hastings
ddd47ea403 Tweak this test for ARM-hosted 'bot. 
llvm-svn: 132711
 2011-06-07 15:23:11 +00:00
Lang Hames
642b95ac13 Switched to DenseMap for allowed sets in PBQP. Reduces total LLC time by 15% on CINT2006 for x86-32. 
llvm-svn: 132707
 2011-06-07 06:05:58 +00:00
Nadav Rotem
0f5e672008 Move the legalizer tests to the X86 directory because the test uses the x86 
codegen. Thanks Galina.

llvm-svn: 132706
 2011-06-07 05:23:58 +00:00