5 Commits

Author	SHA1	Message	Date
Simon Dardis	ec8cfdd35b	[mips] Optimize materialization of i64 constants ... Avoid MipsAnalyzeImmediate usage if the constant fits in an 32-bit integer. This allows us to generate the same instructions for the materialization of the same constants regardless the width of their type. Patch by: Vasileios Kalintiris Contributions by: Simon Dardis Reviewers: Daniel Sanders Differential Review: https://reviews.llvm.org/D21689 llvm-svn: 276628	2016-07-25 09:57:28 +00:00
Daniel Sanders	a4a46c15fe	[mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point ... Summary: Two exceptions to this: test/CodeGen/Mips/octeon.ll test/CodeGen/Mips/octeon_popcnt.ll these test extensions to MIPS64 One test is altered for MIPS-IV: test/CodeGen/Mips/mips64countleading.ll Tests dclo/dclz which were added in MIPS64. The MIPS-IV version tests that dclo/dclz are not emitted. Four tests fail and are not in this patch: test/CodeGen/Mips/abicalls.ll test/CodeGen/Mips/fcopysign-f32-f64.ll test/CodeGen/Mips/fcopysign.ll test/CodeGen/Mips/stack-alignment.ll Depends on D3343 Reviewers: matheusalmeida, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3344 llvm-svn: 206185	2014-04-14 16:00:28 +00:00
Akira Hatanaka	6880302ac2	Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. ... Add a test case to show fewer instructions are needed to load an immediate with the new way of loading immediates. llvm-svn: 148908	2012-01-25 03:01:35 +00:00
Akira Hatanaka	e54da3bfa2	Add patterns for matching immediates whose lower 16-bit is cleared. These ... patterns emit a single LUi instruction instead of a pair of LUi and ORi. llvm-svn: 146900	2011-12-19 20:21:18 +00:00
Akira Hatanaka	19d6cd4d0e	Fix 64-bit immediate patterns. ... llvm-svn: 146059	2011-12-07 20:10:24 +00:00