1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 11:33:24 +02:00
Commit Graph

53443 Commits

Author SHA1 Message Date
Craig Topper
b1f171a213 Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
llvm-svn: 152997
2012-03-17 18:46:09 +00:00
Benjamin Kramer
ad7378e585 MachineInstr: Inline the fast path (non-bundle instruction) of hasProperty.
This is particularly helpful as both arguments tend to be constants.

llvm-svn: 152991
2012-03-17 17:03:45 +00:00
Craig Topper
bb72c24507 Fix some copy and paste remnants of Cell and SPU in Hexagon files.
llvm-svn: 152981
2012-03-17 09:39:20 +00:00
Craig Topper
41786f284d Fix typo in file header.
llvm-svn: 152980
2012-03-17 09:28:37 +00:00
Craig Topper
3d39a3e5ba Pass TargetOptions to HexagonTargetMachine constructor by reference to match other targets and the base class.
llvm-svn: 152979
2012-03-17 09:24:09 +00:00
Craig Topper
0534d071b7 Reorder includes to match coding standards. Fix an issue or two exposed by that.
llvm-svn: 152978
2012-03-17 07:33:42 +00:00
Jim Grosbach
138c2143c3 MC asm parser macro argument count was wrong when empty.
evaluated to '1' when the argument list was empty (should be '0').

rdar://11057257

llvm-svn: 152967
2012-03-17 00:11:42 +00:00
Bill Wendling
b427a9f177 Check if we can handle the arguments of a call (and therefore the call) in
fast-isel before emitting code. If the program bails after code was emitted,
then it could lead to the stack being adjusted more than once (two
CALLSEQ_BEGINs emitted) but being adjuste back only once after the call. This
leads to general badness and gnashing of teeth.
<rdar://problem/11050630>

llvm-svn: 152959
2012-03-16 23:11:07 +00:00
Jim Grosbach
7ab12a079f ARM fix silly typo in optional operand alias.
rdar://11065671

llvm-svn: 152954
2012-03-16 22:18:29 +00:00
Jim Grosbach
99aef428f3 ARM divided syntax fmrx/fmxr mnemonics.
llvm-svn: 152946
2012-03-16 21:06:13 +00:00
Jim Grosbach
af19922301 ARM ldm/stm register lists can be out of order.
It's not a good style idea, as the registers will be laid down in memory in
numerical order, not the order they're in the list, but it's legal. vldm/vstm
are stricter.

rdar://11064740

llvm-svn: 152943
2012-03-16 20:48:38 +00:00
Bill Wendling
9343ed10c6 Revert r152907.
llvm-svn: 152935
2012-03-16 18:20:54 +00:00
Benjamin Kramer
98c952b1e4 ScheduleDAGInstrs: When adding uses we add them into a set that's empty at the beginning, no need to maintain another set for the added regs.
llvm-svn: 152934
2012-03-16 17:38:19 +00:00
Benjamin Kramer
4874db4be8 Limit the number of memory operands in MachineInstr to 2^16 and store the number in padding.
Saves one machine word on MachineInstr (88->80 bytes on x86_64, 48->44 on i386).

llvm-svn: 152930
2012-03-16 16:39:27 +00:00
Benjamin Kramer
6ca1163b8e CriticalAntiDepBreaker: BasicBlock::size is an expensive operation, reuse the cached value.
No functionality change.

llvm-svn: 152927
2012-03-16 15:46:47 +00:00
Bill Wendling
3c44ed8385 The alignment of the pointer part of the store instruction may have an
alignment. If that's the case, then we want to make sure that we don't increase
the alignment of the store instruction. Because if we increase it to be "more
aligned" than the pointer, code-gen may use instructions which require a greater
alignment than the pointer guarantees.
<rdar://problem/11043589>

llvm-svn: 152907
2012-03-16 07:40:08 +00:00
Chandler Carruth
e0a21944a1 Rip out support for 'llvm.noinline'. This thing has a strange history...
It was added in 2007 as the first cut at supporting no-inline
attributes, but we didn't have function attributes of any form at the
time. However, it was added without any mention in the LangRef or other
documentation.

Later on, in 2008, Devang added function notes for 'inline=never' and
then turned them into proper function attributes. From that point
onward, as far as I can tell, the world moved on, and no one has touched
'llvm.noinline' in any meaningful way since.

It's time has now come. We have had better mechanisms for doing this for
a long time, all the frontends I'm aware of use them, and this is just
holding back progress. Given that it was never a documented feature of
the IR, I've provided no auto-upgrade support. If people know of real,
in-the-wild bitcode that relies on this, yell at me and I'll add it, but
I *seriously* doubt anyone cares.

llvm-svn: 152904
2012-03-16 06:10:15 +00:00
Chandler Carruth
1d0b0955da Start removing the use of an ad-hoc 'never inline' set and instead
directly query the function information which this set was representing.
This simplifies the interface of the inline cost analysis, and makes the
always-inline pass significantly more efficient.

Previously, always-inline would first make a single set of every
function in the module *except* those marked with the always-inline
attribute. It would then query this set at every call site to see if the
function was a member of the set, and if so, refuse to inline it. This
is quite wasteful. Instead, simply check the function attribute directly
when looking at the callsite.

The normal inliner also had similar redundancy. It added every function
in the module with the noinline attribute to its set to ignore, even
though inside the cost analysis function we *already tested* the
noinline attribute and produced the same result.

The only tricky part of removing this is that we have to be able to
correctly remove only the functions inlined by the always-inline pass
when finalizing, which requires a bit of a hack. Still, much less of
a hack than the set of all non-always-inline functions was. While I was
touching this function, I switched a heavy-weight set to a vector with
sort+unique. The algorithm already had a two-phase insert and removal
pattern, we were just needlessly paying the uniquing cost on every
insert.

This probably speeds up some compiles by a small amount (-O0 compiles
with lots of always-inline, so potentially heavy libc++ users), but I've
not tried to measure it.

I believe there is no functional change here, but yell if you spot one.
None are intended.

Finally, the direction this is going in is to greatly simplify the
inline cost query interface so that we can replace its implementation
with a much more clever one. Along the way, all the APIs get simplified,
so it seems incrementally good.

llvm-svn: 152903
2012-03-16 06:10:13 +00:00
Chandler Carruth
366e612e2c Pull the implementation of the code metrics out of the inline cost
analysis implementation. The header was already separated. Also cleanup
all the comments in the header to follow a nice modern doxygen form.

There is still plenty of cruft here, but some of that will fall out in
subsequent refactorings and this was an easy step in the right
direction. No functionality changed here.

llvm-svn: 152898
2012-03-16 05:51:52 +00:00
Andrew Trick
8955837ead misched: add DAG edges from vreg defs to ExitSU.
These edges are not really necessary, but it is consistent with the
way we currently create physreg edges. Scheduler heuristics that
expect a DAG edge to the block terminator could benefit from this
change. Although in the future I hope we have a better mechanism for
modeling latency across scheduling regions.

llvm-svn: 152895
2012-03-16 05:04:25 +00:00
Andrew Trick
719339e40f LSR fix: Add isSimplifiedLoopNest to IVUsers analysis.
Only record IVUsers that are dominated by simplified loop
headers. Otherwise SCEVExpander will crash while looking for a
preheader.

I previously tried to work around this in LSR itself, but that was
insufficient. This way, LSR can continue to run if some uses are not
in simple loops, as long as we don't attempt to analyze those users.

Fixes <rdar://problem/11049788> Segmentation fault: 11 in LoopStrengthReduce

llvm-svn: 152892
2012-03-16 03:16:56 +00:00
Chad Rosier
f90a9fa7a3 Revert r152705, which reapplied r152486 as this appears to be causing failures
on our internal nightly testers.  So, basically revert r152486 again.

Abbreviated original commit message:
Implement a more intelligent way of spilling uses across an invoke boundary.

It looks as if Chander's inlining work, r152737, exposed an issue.

llvm-svn: 152887
2012-03-16 01:04:00 +00:00
Eli Friedman
0763584d78 In InstCombiner::visitOr, make sure we reverse the operand swap used for checking for or-of-xor operations after those checks; a later check expects that any constant will be in Op1. PR12234.
llvm-svn: 152884
2012-03-16 00:52:42 +00:00
Jim Grosbach
a5d57ea09e ARM optional operand on MRC/MCR assembly instructions.
rdar://11058464

llvm-svn: 152883
2012-03-16 00:45:58 +00:00
Jim Grosbach
77151885af ARM vmrs system registers mvfr0 and mvfr1 handling.
rdar://11058464

llvm-svn: 152881
2012-03-16 00:27:18 +00:00
Eric Christopher
40cd87af9e Do the right thing on NULL uint64 fields.
Patch by Clemens Hammacher!

Fixes PR12243

llvm-svn: 152880
2012-03-16 00:21:54 +00:00
NAKAMURA Takumi
4a8d3b5eb5 Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." for workaround of g++-4.4's miscompilation.
It caused MSP430DAGToDAGISel::SelectIndexedBinOp() to be miscompiled.
When two ReplaceUses()'s are expanded as inline, vtable in base class is stored to latter (ISelUpdater)ISU.

llvm-svn: 152877
2012-03-16 00:01:55 +00:00
Eric Christopher
1fb8e7458e For types with a parent of the compile unit make sure and emit
the DECL information.

rdar://10855921

llvm-svn: 152876
2012-03-15 23:55:40 +00:00
Jim Grosbach
e821ce3e5f Remove inadvertant commit.
llvm-svn: 152870
2012-03-15 23:00:30 +00:00
Chad Rosier
e007850778 [fast-isel] Address Eli's comments for r152847. Specifically, add a test case
and still allow immediate encoding, just not with cmn.
rdar://11038907

llvm-svn: 152869
2012-03-15 22:54:20 +00:00
Chad Rosier
103b276e74 [fast-isel] Don't try to encode LONG_MIN using cmn instructions.
rdar://11038907

llvm-svn: 152847
2012-03-15 21:40:23 +00:00
Jim Grosbach
3812c82b92 ARM case-insensitive checking for APSR_nzcv.
rdar://11056591

llvm-svn: 152846
2012-03-15 21:34:14 +00:00
Eric Christopher
b5497338fa We actually handle AllocaInst via getRegForValue below just fine.
Part of rdar://8905263

llvm-svn: 152845
2012-03-15 21:33:47 +00:00
Eric Christopher
f744ea65be Add some debugging output into fast isel as well.
llvm-svn: 152844
2012-03-15 21:33:44 +00:00
Eric Christopher
8e8e61bae8 Add another debug statement.
llvm-svn: 152843
2012-03-15 21:33:41 +00:00
Eric Christopher
18f776b323 Tabs.
llvm-svn: 152842
2012-03-15 21:33:39 +00:00
Eric Christopher
081dee38cc Typo.
llvm-svn: 152841
2012-03-15 21:33:35 +00:00
Jim Grosbach
04f671dced ARM aliases for pre-unified syntax fcmpz[sd] mnemonics.
rdar://11056647

llvm-svn: 152834
2012-03-15 20:48:18 +00:00
Duncan Sands
53ae2e1cdc Type sizes and fields offsets inside structs are unsigned. This is a highly
theoretical fix since it only matters for types with >= 2^63 bits (!) and also
only matters if pointers have more than 64 bits, which is not supported anyway.

llvm-svn: 152831
2012-03-15 20:14:42 +00:00
Lang Hames
7918b0b225 Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
register allocation by allowing all 32 D-registers to be used. Patch by Cameron
Zwarich.

llvm-svn: 152824
2012-03-15 18:49:02 +00:00
Kristof Beyls
5f7d669c67 Fix VCVT decoding (between floating-point and fixed-point, Floating-point). Patch by Richard Barton.
llvm-svn: 152814
2012-03-15 17:50:29 +00:00
Michael J. Spencer
bff63f6e96 Fix bug found by warning.
llvm-svn: 152812
2012-03-15 17:49:29 +00:00
Rafael Espindola
ac42573389 Short term fix for pr12270 before we change dominates to handle unreachable
code.
While here, reduce indentation.

llvm-svn: 152803
2012-03-15 15:52:59 +00:00
Bill Wendling
92dc871aad Use an iterator instead of calling .size() on the worklist every time, which is wasteful.
llvm-svn: 152794
2012-03-15 11:19:41 +00:00
Michael J. Spencer
e8ce31af5d Implement relocation-overflow behavior for PE/COFF.
This needs a test, but it will take some time to figure
out the best way to get an input that will produce > 2^16 relocs.

Patch by Graydon Hoare!

llvm-svn: 152787
2012-03-15 09:03:03 +00:00
Nadav Rotem
8cf9105f96 When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add the new node into the work list because there is a potential for further optimizations.
llvm-svn: 152784
2012-03-15 08:49:06 +00:00
Eric Christopher
0711b41ec6 Revert the removal of DW_AT_MIPS_linkage_name when we aren't putting
out the DW_AT_name. Older gdbs unfortunately still use it to
disambiguate member functions in templated classes (gdb.cp/templates.exp).

rdar://11043421 (which is now deferred for a bit)

llvm-svn: 152782
2012-03-15 08:19:33 +00:00
Bill Wendling
c42492d6fa Add a xform to the DAG combiner.
Transform:

        (fsub x, (fadd x, y)) -> (fneg y) and
        (fsub x, (fadd y, x)) -> (fneg y)

if 'unsafe math' is specified.
<rdar://problem/7540295>

llvm-svn: 152777
2012-03-15 05:12:00 +00:00
Chandler Carruth
02f89bdb9c Remove the basic inliner. This was added in 2007, and hasn't really
changed since. No one was using it. It is yet another consumer of the
InlineCost interface that I'd like to change.

llvm-svn: 152769
2012-03-15 01:37:56 +00:00
Chandler Carruth
a9f0dc35d3 Make the swap code here a bit more obvious what its doing... We're
essentially sorting the pair's arguments. I'd love to actually call sort
here, but I'm just not that crazy. ;]

llvm-svn: 152764
2012-03-15 00:55:51 +00:00