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Commit Graph

156608 Commits

Author SHA1 Message Date
Adam Nemet
b23a7a202a Adjust test after r318159
llvm-svn: 318160
2017-11-14 17:12:36 +00:00
Adam Nemet
5bd1eddf91 [llvm-profdata] Report if profile data file is IR- or FE-level
Differential Revision: https://reviews.llvm.org/D39997

llvm-svn: 318159
2017-11-14 16:59:18 +00:00
Craig Topper
36f9788b9b [X86] Fix typo in comment. NFC
llvm-svn: 318156
2017-11-14 16:14:00 +00:00
Oliver Stannard
e5be0665b2 [Docs] Add tablegen backend for target opcode documentation
This is a tablegen backend to generate documentation for the opcodes that exist
for each target. For each opcode, it lists the assembly string, the names and
types of all operands, and the flags and predicates that apply to the opcode.

Differential revision: https://reviews.llvm.org/D31025

llvm-svn: 318155
2017-11-14 15:35:15 +00:00
Ilya Biryukov
4972520f3e Use input redirection in WebAssembly/comdat.ll test.
To match how the other tests do it.

llvm-svn: 318153
2017-11-14 14:26:42 +00:00
Simon Pilgrim
e130623578 [X86][AVX] Add scheduling test for vmovntdq 256-bit store
Needs to use inline asm as domain will otherwise be changed to float (vmovntps)

llvm-svn: 318151
2017-11-14 14:03:29 +00:00
Gil Rapaport
b162077a3d [LV] Introduce VPBlendRecipe, VPWidenMemoryInstructionRecipe
This patch is part of D38676.

The patch introduces two new Recipes to handle instructions whose vectorization
involves masking. These Recipes take VPlan-level masks in D38676, but still rely
on ILV's existing createEdgeMask(), createBlockInMask() in this patch.

VPBlendRecipe handles intra-loop phi nodes, which are vectorized as a sequence
of SELECTs. Its execute() code is refactored out of ILV::widenPHIInstruction(),
which now handles only loop-header phi nodes.

VPWidenMemoryInstructionRecipe handles load/store which are to be widened
(but are not part of an Interleave Group). In this patch it simply calls
ILV::vectorizeMemoryInstruction on execute().

Differential Revision: https://reviews.llvm.org/D39068

llvm-svn: 318149
2017-11-14 12:09:30 +00:00
Tim Northover
b0212a65f3 ARM: correctly update CFG when splitting BB to fix branch.
Because the block-splitting code is multi-purpose, we have to meddle with the
branches when using it to fixup a conditional branch destination. We got the
code right, but forgot to update the CFG so the verifier complained when
expensive checks were on.

Probably harmless since constant-islands comes so late, but best to fix it
anyway.

llvm-svn: 318148
2017-11-14 11:43:54 +00:00
Diana Picus
c02cd6836a [ARM GlobalISel] Remove C++ code for G_CONSTANT
Get rid of the handwritten instruction selector code for handling
G_CONSTANT. This code wasn't checking all the preconditions correctly
anyway, so it's better to leave it to TableGen, which can handle at
least some cases correctly (e.g. MOVi, MOVi16, folding into binary
operations). Also add tests to cover those cases.

llvm-svn: 318146
2017-11-14 11:20:32 +00:00
Momchil Velikov
778c45dc64 [ARM] Fix incorrect conversion of a tail call to an ordinary call
When we emit a tail call for Armv8-M, but then discover that the caller needs to
save/restore `LR`, we convert the tail call to an ordinary one, since restoring
`LR` takes extra instructions, which may negate the benefits of the tail
call. If the callee, however, takes stack arguments, this conversion is
incorrect, since nothing has been done to pass the stack arguments.

Thus the patch reverts https://reviews.llvm.org/rL294000

Also, we improve the instruction sequence for popping `LR` in the case when we
couldn't immediately find a scratch low register, but we can use as a temporary
one of the callee-saved low registers and restore `LR` before popping other
callee-saves.

Differential Revision: https://reviews.llvm.org/D39599

llvm-svn: 318143
2017-11-14 10:36:52 +00:00
Matt Arsenault
4fccc8afbe AMDGPU: Fix test
llvm-svn: 318138
2017-11-14 06:40:00 +00:00
Adam Nemet
3b431cbfd5 [opt-viewer] Truncate long remark text in source view
The table is changed to fixed layout[1] and the lines use ellipses if they
would overflow their cell.

[1] https://css-tricks.com/fixing-tables-long-strings/

llvm-svn: 318136
2017-11-14 04:48:18 +00:00
Adam Nemet
addb9996d4 [opt-viewer] With hotness only show max 1000 entries on the index page
Adjustable with an option.

llvm-svn: 318135
2017-11-14 04:37:32 +00:00
Dylan McKay
b26578d2be [AVR] Remove the select-mbb-placement-bug.ll test
This test was originally added when an old bug was fixed that caused
broken iterator code to break basic block placement.

The issue has an extremely low chance of every being a problem again.

This specific test is very flaky and fails often due to upstream
changes.

I have removed this test because it negates more value than it returns.

llvm-svn: 318134
2017-11-14 04:32:49 +00:00
Matt Arsenault
285994c1a5 AMDGPU: Fix producing saveexec when the copy is spilled
If the register from the copy from exec was spilled,
the copy before the spill was deleted leaving a spill
of undefined register verifier error and miscompiling.
Check for other use instructions of the copy register.

llvm-svn: 318132
2017-11-14 02:16:54 +00:00
Chandler Carruth
fbddfc3717 [PM] Port BoundsChecking to the new PM.
Registers it and everything, updates all the references, etc.

Next patch will add support to Clang's `-fexperimental-new-pass-manager`
path to actually enable BoundsChecking correctly.

Differential Revision: https://reviews.llvm.org/D39084

llvm-svn: 318128
2017-11-14 01:30:04 +00:00
Rafael Espindola
fd481586ab Use TempFile in llvm-ar. NFC.
llvm-svn: 318127
2017-11-14 01:21:15 +00:00
Chandler Carruth
16dc127ebd [PM] Refactor BoundsChecking further to prepare it to be exposed both as
a legacy and new PM pass.

This essentially moves the class state to parameters and re-shuffles the
code to make that reasonable. It also does some minor cleanups along the
way and leaves some comments.

Differential Revision: https://reviews.llvm.org/D39081

llvm-svn: 318124
2017-11-14 01:13:59 +00:00
Sam Clegg
782c56cec3 [WebAssembly] Explicily disable comdat support for wasm output
For now at least.  We clearly need some kind of comdat or
linkonce_odr support for wasm but currently COMDAT is not
supported.

Disable COMDAT support in the same way we do the Mach-O.  This
also causes clang not to generated COMDATs.

Differential Revision: https://reviews.llvm.org/D39873

llvm-svn: 318123
2017-11-14 00:49:16 +00:00
Rafael Espindola
75c22a4a7c Add a move assignment operator to TempFile. NFC.
llvm-svn: 318122
2017-11-14 00:31:28 +00:00
Hans Wennborg
462bb76a57 Update some code.google.com links
llvm-svn: 318115
2017-11-13 23:47:58 +00:00
Zachary Turner
3bd8031c4f Revert "Update test_debuginfo.pl script to point to new tree location."
This reverts the aforementioned patch and 2 subsequent follow-ups,
as some buildbots are still failing 2 tests because of it.
Investigation is ongoing into the cause of the failures.

llvm-svn: 318112
2017-11-13 23:33:29 +00:00
Rafael Espindola
a7f8cc317f Simplify and rename variable.
std::error_code can represent success, so we don't need a
Optional<std::error_code>.

Rename the variable to avoid confusion with the type Error.

llvm-svn: 318111
2017-11-13 23:32:19 +00:00
Matt Arsenault
13769949ee AMDGPU: Fix not converting d16 load/stores to offset
Fixes missed optimization with new MUBUF instructions.

llvm-svn: 318106
2017-11-13 23:24:26 +00:00
Rafael Espindola
b492fdb4c9 Simplify. NFC.
llvm-svn: 318104
2017-11-13 23:06:54 +00:00
Daniel Sanders
052a3d35ec [tablegen] Handle atomic predicates for ordering inside tablegen. NFC.
Similar to r315841, GlobalISel and SelectionDAG require different code for the
common atomic predicates due to differences in the representation.
Even without that, differences in the IR (SDNode vs MachineInstr) require
differences in the C++ predicate.

This patch moves the implementation of the common atomic predicates related to
ordering into tablegen so that it can handle these differences.

It's NFC for SelectionDAG since it emits equivalent code and it's NFC for
GlobalISel since the rules involving the relevant predicates are still
rejected by the importer.

llvm-svn: 318102
2017-11-13 23:03:47 +00:00
Matt Arsenault
5cd1df1dd6 AMDGPU: Implement computeKnownBitsForTargetNode for mbcnt
llvm-svn: 318100
2017-11-13 22:55:05 +00:00
Daniel Sanders
5d4ac8cff2 [tablegen] Handle atomic predicates for memory type inside tablegen. NFC.
Similar to r315841, GlobalISel and SelectionDAG require different code for the
common atomic predicates due to differences in the representation.
Even without that, differences in the IR (SDNode vs MachineInstr) require
differences in the C++ predicate.

This patch moves the implementation of the common atomic predicates related to
memory type into tablegen so that it can handle these differences.

It's NFC for SelectionDAG since it emits equivalent code and it's NFC for
GlobalISel since the rules involving the relevant predicates are still
rejected by the importer.

llvm-svn: 318095
2017-11-13 22:26:13 +00:00
Jake Ehrlich
adbdf83687 [llvm-objcopy] Add --strip-debug
Many projects use this option. There are two ways to use it. You can
either a) Just use --strip-debug and keep the old file with debug
content or b) you can use --strip-debug, --only-keep-debug, and
--add-gnu-debuglink all in conjunction to create two separate files, the
stripped file and the debug file. --only-keep-debug is more complicated
than --strip-debug because it keeps the section headers without keeping
section contents. That's not really supported by llvm-objcopy at the
moment but I plan on adding it. So this change just supports a) and
options to support b) will come soon.

Differential Revision: https://reviews.llvm.org/D39919

llvm-svn: 318094
2017-11-13 22:13:08 +00:00
Jake Ehrlich
917785f184 [llvm-objcopy] Add --strip-all option to llvm-objcopy
This change adds a slightly less extreme form of stripping. It should
remove any section that starts with ".debug" and should remove any
symbol table or relocations. In general this strips out most of the
stuff you don't need to execute but leaves a number of things around.
This behavior has been designed to be compatible with GNU strip/objcopy
--strip-all so that anywhere you currently use --strip-all you should be
able to use llvm-objcopy as a drop in replacement.

Differential Revision: https://reviews.llvm.org/D39769

llvm-svn: 318092
2017-11-13 22:02:07 +00:00
Serge Guelton
b911a43217 Fix -Werror when compiling rL318083 (ter)
Statically assert the result and remove a runtime comparison, a direct consequence of the optimization introduced in rL318083.

llvm-svn: 318091
2017-11-13 21:55:01 +00:00
Serge Guelton
38483c5e48 Fix -Werror when compiling rL318083 (bis)
Statically assert the result and remove a runtime comparison, a direct consequence of the optimization introduced in rL318083.

llvm-svn: 318090
2017-11-13 21:40:57 +00:00
Serge Guelton
f34cc96def Fix -Werror when compiling rL318083
Statically assert the result and remove a runtime comparison, a direct consequence of the optimization introduced in rL318083.

llvm-svn: 318087
2017-11-13 21:25:35 +00:00
Adrian Prantl
0158b7603e Fix an assertion in SelectionDAG::transferDbgValues()
when transferring debug info describing the lower bits of an extended SDNode.

rdar://problem/35504722

llvm-svn: 318086
2017-11-13 21:24:54 +00:00
Serge Guelton
08adcffc74 Reorder Value.def to optimize code size
If the first values in Value.def is the range of constant, then the code
generated by `isa<Constant>` is smaller by one operation (basically, an add is
removed). It turns out this small optimization reduces the size of the
statically linked clang binary by 400ko on my laptop. The theoritical
performance gain is non visible from my benchmarks, but the size dropdown is.

Differential Revision: https://reviews.llvm.org/D39373

llvm-svn: 318083
2017-11-13 20:57:40 +00:00
Evgeniy Stepanov
6f223f4f2b [arm] Fix Unnecessary reloads from GOT.
Summary:
This fixes PR35221.
Use pseudo-instructions to let MachineCSE hoist global address computation.

Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D39871

llvm-svn: 318081
2017-11-13 20:45:38 +00:00
Sanjay Patel
6858327840 [Reassociation] regenerate test checks; NFC
llvm-svn: 318076
2017-11-13 19:46:28 +00:00
Reid Kleckner
0a45055b07 Fix clang -Wsometimes-uninitialized warning in SCEV code
I don't believe this was a problem in practice, as it's likely that the
boolean wasn't checked unless the backend condition was non-null.

llvm-svn: 318073
2017-11-13 18:43:11 +00:00
Dinar Temirbulatov
3465d1c0e1 NFC, Allow SystemZ SLP tests only when SystemZ is supported.
llvm-svn: 318070
2017-11-13 18:35:43 +00:00
Rafael Espindola
e14d4e63de Create a TempFile class.
This just adds a TempFile class and replaces the use in
FileOutputBuffer with it.

The only difference for now is better error handling. Followup work includes:

- Convert other user of temporary files to it.
- Add support for automatically deleting on windows.
- Add a createUnnamed method that returns a potentially unnamed
  file. It would be actually unnamed on modern linux and have a
  unknown name on windows.

llvm-svn: 318069
2017-11-13 18:33:44 +00:00
Daniel Sanders
e654279a2a [globalisel][tablegen] Add support for extload.
llvm-svn: 318068
2017-11-13 18:30:23 +00:00
Petar Jovanovic
31379532fd fix printing of alias instructions by removing redundant spacing
Some alias instructions are printed with an extra space after the tab
character. Fix this by skipping that space when the tab character is printed
so that the instructions are aligned with the rest of the code.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D35946

llvm-svn: 318059
2017-11-13 18:00:24 +00:00
Sanjay Patel
c7b29108bf [ValueTracking] use 'auto' with 'dyn_cast'; NFC
llvm-svn: 318058
2017-11-13 17:56:23 +00:00
Craig Topper
fac7ae20e3 [X86] Allow X86ISD::Wrapper to be folded into the base of gather/scatter address
If the base of our gather corresponds to something contained in X86ISD::Wrapper we should be able to fold it into the address.

This patch refactors some of the address matching to more fully use the X86ISelAddressMode struct and the getAddressOperands helper. A new helper function matchVectorAddress is added to call matchWrapper or fall back to matchAddressBase.

We should also be able to support constant offsets from a wrapper, but I'll look into that in a future patch. We may even be able to completely reuse matchAddress here, but I wanted to start simple and work up to it.

Differential Revision: https://reviews.llvm.org/D39927

llvm-svn: 318057
2017-11-13 17:53:59 +00:00
Sanjay Patel
1d05d01aea [ValueTracking] simplify code in CannotBeNegativeZero() with match(); NFCI
llvm-svn: 318055
2017-11-13 17:40:47 +00:00
Sanjay Patel
d6b8e8276a [Reassociate] add tests with 'reassoc' FMF; NFC
llvm-svn: 318053
2017-11-13 17:29:11 +00:00
Jan Vesely
ef07cc017a AMDGPU: Drop duplicate setOperationAction
These are set with other scalar int ops few lines up

Differential Revision: https://reviews.llvm.org/D39928

llvm-svn: 318051
2017-11-13 16:46:07 +00:00
Jatin Bhateja
b020a5ea70 [SCEV] Handling for ICmp occuring in the evolution chain.
Summary:
 If a compare instruction is same or inverse of the compare in the
 branch of the loop latch, then return a constant evolution node.
 This shall facilitate computations of loop exit counts in cases
 where compare appears in the evolution chain of induction variables.

 Will fix PR 34538

Reviewers: sanjoy, hfinkel, junryoungju

Reviewed By: sanjoy, junryoungju

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D38494

llvm-svn: 318050
2017-11-13 16:43:24 +00:00
Simon Dardis
c113ee0cce Revert "[CodeGenPrepare] Check that erased sunken address are not reused"
This reverts commit r318032. The test broke some sanitizer bots.

llvm-svn: 318049
2017-11-13 16:41:17 +00:00
Diana Picus
47b4fbad40 [ARM GlobalISel] Update legalizer test
Make one of the legalizer tests a bit more robust by making sure all
values we're interested in are used (either in a store or a return) and
by using loads instead of constants for obtaining values on fewer than
32 bits. This should make the test less fragile to changes in the
legalize combiner, since those loads are legal (as opposed to the
constants, which were being widened and thus produced opportunities for
the legalize combiner).

llvm-svn: 318047
2017-11-13 16:02:42 +00:00