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Commit Graph

12358 Commits

Author SHA1 Message Date
Bill Wendling
b396532e98 The "ReadOnlyWithRel" enum seems to apply more to what Darwin does with the EH
exception table than DataRel.

llvm-svn: 89279
2009-11-19 00:09:14 +00:00
Richard Osborne
fc2d5141a4 Add XCore support for indirectbr / blockaddress.
llvm-svn: 89273
2009-11-18 23:20:42 +00:00
Bill Wendling
5ab3ea88a2 Attempt #2:
Place the EH table in the __TEXT section on MachO. It saves space.

llvm-svn: 89270
2009-11-18 23:18:46 +00:00
Viktor Kutuzov
036656936e Added getDefaultSubtargetFeatures method to SubtargetFeatures class which returns a correct feature string for given triple.
llvm-svn: 89236
2009-11-18 20:20:05 +00:00
David Goodwin
6b56e77397 Add ARMv6 itineraries.
llvm-svn: 89218
2009-11-18 18:39:57 +00:00
Bob Wilson
6993e5d049 Fix a few places that were missed when we converted to unified syntax.
llvm-svn: 89214
2009-11-18 18:10:35 +00:00
Bob Wilson
6b68bd153a Add a target hook to allow changing the tail duplication limit based on the
contents of the block to be duplicated.  Use this for ARM Cortex A8/9 to
be more aggressive tail duplicating indirect branches, since it makes it
much more likely that they will be predicted in the branch target buffer.
Testcase coming soon.

llvm-svn: 89187
2009-11-18 03:34:27 +00:00
Bill Wendling
03a196010e The llvm-gcc front-end and the pass manager use two separate TargetData objects.
This is probably not confined to *just* these two things.

Anyway, the llvm-gcc front-end may look up the structure layout information for
an abstract type. That information will be stored into a table with the FE's
TD. Instruction combine can come along and also ask for information on that
abstract type, but for a separate TD (the one associated with the pass manager).

After the type is refined, the old structure layout information in the pass
manager's TD file is out of date. If a new type is allocated in the same space
as the old-unrefined type, then the structure type information in the pass
manager's TD file will be wrong, but won't know it.

Fix this by making the TD's structure type information an abstract type user.

llvm-svn: 89176
2009-11-18 01:03:56 +00:00
Jim Grosbach
d4db2d58ae Enable arm jumpt table adjustment.
llvm-svn: 89143
2009-11-17 21:24:11 +00:00
Anton Korobeynikov
f8557956d7 Both Darwin as and GNU as violate ARM docs wrt printing of addrmode6
alignment imm (in the same way). Fix asmprinting for non-darwin platforms.

llvm-svn: 89137
2009-11-17 20:04:59 +00:00
Johnny Chen
81b3815eb2 Set Inst{15-12} (Rd/Rt) to 0b1111 (PC) for BR_JTadd, BR_JTr, and BR_JTm to
distinguish between them and the more generic instructions (add, mov, and ldr).

llvm-svn: 89108
2009-11-17 17:17:50 +00:00
Evan Cheng
d7cf6167f1 Re-apply 89011. It's not to be blamed.
llvm-svn: 89081
2009-11-17 09:51:18 +00:00
Evan Cheng
52159ba00a Revert 89011. Buildbot thinks it might be breaking stuff.
llvm-svn: 89076
2009-11-17 09:20:28 +00:00
Jim Grosbach
7fc73a45da When moving a block for table jumps, make sure the prior block terminator
is analyzable so it can be updated. If it's not, be safe and don't move the
block.

llvm-svn: 89022
2009-11-17 01:21:04 +00:00
Evan Cheng
6e4430374e MOV64rm should be marked isReMaterializable.
llvm-svn: 89019
2009-11-17 00:55:55 +00:00
Evan Cheng
382a91041b A few more instructions that should be marked re-materializable.
llvm-svn: 89011
2009-11-17 00:23:22 +00:00
Johnny Chen
d530046ed3 Set Rm bits of BX_RET to 0b1110 (R14); and set condition code bits of BRIND to
0b1110 (ALways).  This is so that the disassembler decoder can distinguish among
BX_RET, BRIND, and BXr9.

llvm-svn: 89000
2009-11-16 23:57:56 +00:00
Jeffrey Yasskin
0f846dbb3e Make X86-64 in the Large model always emit 64-bit calls.
The large code model is documented at
http://www.x86-64.org/documentation/abi.pdf and says that calls should
assume their target doesn't live within the 32-bit pc-relative offset
that fits in the call instruction.

To do this, we turn off the global-address->target-global-address
conversion in X86TargetLowering::LowerCall(). The first attempt at
this broke the lazy JIT because it can separate the movabs(imm->reg)
from the actual call instruction. The lazy JIT receives the address of
the movabs as a relocation and needs to record the return address from
the call; and then when that call happens, it needs to patch the
movabs with the newly-compiled target. We could thread the call
instruction into the relocation and record the movabs<->call mapping
explicitly, but that seems to require at least as much new
complication in the code generator as this change.

To fix this, we make lazy functions _always_ go through a call
stub. You'd think we'd only have to force lazy calls through a stub on
difficult platforms, but that turns out to break indirect calls
through a function pointer. The right fix for that is to distinguish
between calls and address-of operations on uncompiled functions, but
that's complex enough to leave for someone else to do.

Another attempt at this defined a new CALL64i pseudo-instruction,
which expanded to a 2-instruction sequence in the assembly output and
was special-cased in the X86CodeEmitter's emitInstruction()
function. That broke indirect calls in the same way as above.

This patch also removes a hack forcing Darwin to the small code model.
Without far-call-stubs, the small code model requires things of the
JITMemoryManager that the DefaultJITMemoryManager can't provide.

Thanks to echristo for lots of testing!

llvm-svn: 88984
2009-11-16 22:41:33 +00:00
Evan Cheng
78be20d62e - Check memoperand alignment instead of checking stack alignment. Most load / store folding instructions are not referencing spill stack slots.
- Mark MOVUPSrm re-materializable.

llvm-svn: 88974
2009-11-16 21:56:03 +00:00
Jim Grosbach
2c6e8c5ccc Make the pass class name more explicit.
llvm-svn: 88964
2009-11-16 21:13:22 +00:00
Jim Grosbach
736ee00309 make pass name a bit more clear
llvm-svn: 88961
2009-11-16 21:03:58 +00:00
Jim Grosbach
62cd0707dd Simplify thumb2 jump table adjustments. Remove unnecessary calculation and
usage of block sizes and offsets.

llvm-svn: 88935
2009-11-16 18:58:52 +00:00
Jim Grosbach
eef0542edc clarify comment
llvm-svn: 88933
2009-11-16 18:55:47 +00:00
Jim Grosbach
2d074ac39b back off for a bit. tracking down weirdness
llvm-svn: 88919
2009-11-16 17:17:48 +00:00
Jim Grosbach
71539bfab0 Analyze has to be before checking the condition, obviously. Properly construct an iterator for prior.
llvm-svn: 88917
2009-11-16 17:10:56 +00:00
Bruno Cardoso Lopes
f87fd996e2 Disable ldc1/sdc1 instructions for mips1 targets.
llvm-svn: 88887
2009-11-16 04:35:29 +00:00
Bruno Cardoso Lopes
21ca44ba49 - Fix a small bug while handling target constant pools (one param was missing).
- Add a smarter constant pool loading, instead of:

lui $2, %hi($CPI1_0)
addiu $2, $2, %lo($CPI1_0)
lwc1 $f0, 0($2)

Generate:

lui $2, %hi($CPI1_0)
lwc1 $f0, %lo($CPI1_0)($2)

llvm-svn: 88886
2009-11-16 04:33:42 +00:00
Jim Grosbach
1aa571da3c Detect need for autoalignment of the stack earlier to catch spills more
conservatively. eliminateFrameIndex() machinery adjust to handle addr mode
6 (vld1/vst1) used for spills. Fix tests to expect aligned Q-reg spilling

llvm-svn: 88874
2009-11-15 21:45:34 +00:00
Jim Grosbach
8e55bb8826 set the def of the VLD1q64 properly
llvm-svn: 88873
2009-11-15 21:05:07 +00:00
Nick Lewycky
b73208f294 Add a complex missed optimization opportunity I came across while investigating
bug 5438.

llvm-svn: 88855
2009-11-15 17:51:23 +00:00
Jim Grosbach
4882bbfe05 cleanup.
llvm-svn: 88812
2009-11-14 21:33:37 +00:00
Jim Grosbach
4175b4fbf2 Cleanup flow, and only update the jump table we're analyzing when replacing a destination MBB.
llvm-svn: 88805
2009-11-14 20:10:18 +00:00
Richard Osborne
8748f55236 Add XCore support for arbitrary-sized aggregate returns.
llvm-svn: 88802
2009-11-14 19:33:35 +00:00
Anton Korobeynikov
b290c6b8f7 Temporary disable the error - it seems to be too conservative.
llvm-svn: 88800
2009-11-14 18:01:41 +00:00
Daniel Dunbar
59040c2825 Add llvm::sys::getHostCPUName, for detecting the LLVM name for the host CPU.
- This is an initial step towards -march=native support in Clang, and towards
   eliminating host dependencies in the targets. See PR5389.

 - Patch by Roman Divacky!

llvm-svn: 88768
2009-11-14 10:09:12 +00:00
Sanjiv Gupta
b38d6287b8 revert 88761 as it fails builds.
llvm-svn: 88762
2009-11-14 07:22:25 +00:00
Sanjiv Gupta
3db18af363 Fix debug info crashes for PIC16.
llvm-svn: 88761
2009-11-14 06:19:49 +00:00
Evan Cheng
9b46e74f42 - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.
- If destination is a physical register and it has a subreg index, use the
  sub-register instead.
This fixes PR5423.

llvm-svn: 88745
2009-11-14 02:55:43 +00:00
Evan Cheng
e43198c166 When expanding t2STRDi8 r, r to two stores, add kill markers correctly.
llvm-svn: 88734
2009-11-14 01:50:00 +00:00
Jakob Stoklund Olesen
a077364caa The instruction pointer %RIP is a reserved register on x86_64.
llvm-svn: 88705
2009-11-13 21:56:01 +00:00
David Greene
97a1f550d1 Move DebugInfo checks into EmitComments and remove them from
target-specific AsmPrinters.  Not all comments need DebugInfo.

Re-enable the line numbers comment test.

llvm-svn: 88697
2009-11-13 21:34:57 +00:00
David Goodwin
e1d06f2239 Allow target to specify regclass for which antideps will only be broken along the critical path.
llvm-svn: 88682
2009-11-13 19:52:48 +00:00
Bruno Cardoso Lopes
e3686712f7 Support fp64 immediate zero, this fixes only part of PR5445
because the testcase is triggering one more bug.

llvm-svn: 88674
2009-11-13 18:49:59 +00:00
Dale Johannesen
f57a58c4fe Adjust isConstantSplat to allow for big-endian targets.
PPC is such a target; make it work.

llvm-svn: 87060
2009-11-13 01:45:18 +00:00
Jim Grosbach
c15c777f81 Block renumbering
llvm-svn: 87056
2009-11-13 01:19:24 +00:00
Jim Grosbach
85faa3cff1 use lower case for readability
llvm-svn: 87054
2009-11-13 01:17:22 +00:00
David Greene
1a5969d74c Fix a bootstrap failure.
Provide special isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE
interfaces to explicitly request checking for post-frame ptr elimination
operands.  This uses a heuristic so it isn't reliable for correctness.

llvm-svn: 87047
2009-11-13 00:29:53 +00:00
David Greene
9934b1d063 Make the MachineFunction argument of getFrameRegister const.
This also fixes a build error.

llvm-svn: 87027
2009-11-12 21:00:03 +00:00
David Greene
ea251ed2b9 Add hasLoadFromStackSlot and hasStoreToStackSlot to return whether a
machine instruction loads or stores from/to a stack slot.  Unlike
isLoadFromStackSlot and isStoreFromStackSlot, the instruction may be
something other than a pure load/store (e.g. it may be an arithmetic
operation with a memory operand).  This helps AsmPrinter determine when
to print a spill/reload comment.

This is only a hint since we may not be able to figure this out in all
cases.  As such, it should not be relied upon for correctness.

Implement for X86.  Return false by default for other architectures.

llvm-svn: 87026
2009-11-12 20:55:29 +00:00
David Greene
58e7c6145b Add a bool flag to StackObjects telling whether they reference spill
slots.  The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values.  It's too easy to pass a wrong argument
value when multiple arguments have default values.  Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..

llvm-svn: 87022
2009-11-12 20:49:22 +00:00