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b4102c0250
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4216 Commits

Author SHA1 Message Date
Andrew Lenharth
b4102c0250 typeo 
llvm-svn: 25060
 2006-01-02 21:15:53 +00:00
Chris Lattner
9f51967a78 Remove a 'using namespace std'. 
llvm-svn: 25059
 2006-01-01 22:20:31 +00:00
Andrew Lenharth
8291285388 Add support for brcond 
llvm-svn: 25058
 2006-01-01 22:16:43 +00:00
Andrew Lenharth
33a683c939 Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel. 
llvm-svn: 25057
 2006-01-01 22:16:14 +00:00
Andrew Lenharth
1f84cd6920 clean this function up some 
llvm-svn: 25055
 2006-01-01 22:13:54 +00:00
Andrew Lenharth
3441657fb4 improve constant loading. Still sucks, but oh well 
llvm-svn: 25047
 2005-12-30 02:30:02 +00:00
Nate Begeman
ec7c28a28c Add support for generating v4i32 altivec code 
llvm-svn: 25046
 2005-12-30 00:12:56 +00:00
Nate Begeman
e1fdcf5a20 Remove a fixme 
llvm-svn: 25045
 2005-12-30 00:11:07 +00:00
Andrew Lenharth
13a01d794b let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean 
llvm-svn: 25040
 2005-12-29 01:06:12 +00:00
Andrew Lenharth
b87ac716bc Fix up immediate handling 
llvm-svn: 25039
 2005-12-29 00:50:08 +00:00
Duraid Madina
ad3a82e21c yet more C++ standards-compliance stuff. 
llvm-svn: 25028
 2005-12-27 10:40:34 +00:00
Duraid Madina
2ea271c8bf nasty paste-o, calls passing more than 8 arguments along were having 
args >8 put into the wrong place

llvm-svn: 25027
 2005-12-27 10:17:03 +00:00
Andrew Lenharth
bea3ab432b Restore some happiness to the JIT 
llvm-svn: 25026
 2005-12-27 06:25:50 +00:00
Andrew Lenharth
b48bdd4aae Fix alpha regressions. 
llvm-svn: 25025
 2005-12-27 03:53:58 +00:00
Chris Lattner
cee6093ca8 Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc 
llvm-svn: 25024
 2005-12-27 03:02:18 +00:00
Evan Cheng
231b11ba87 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Andrew Lenharth
f8a6d19367 add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG 
llvm-svn: 25011
 2005-12-25 17:36:48 +00:00
Duraid Madina
303d3f1f96 unbreak calls, a few more tests should run. Tomorrow: bugpoint! 
llvm-svn: 25010
 2005-12-25 14:09:08 +00:00
Duraid Madina
00fbe7a7e4 we don't feed our call instructions extra operands 
llvm-svn: 25009
 2005-12-25 14:07:01 +00:00
Andrew Lenharth
9e8f45d185 All that just to lower div and rem 
llvm-svn: 25008
 2005-12-25 01:34:27 +00:00
Andrew Lenharth
b42cc57048 support targetexternalsym 
llvm-svn: 25005
 2005-12-24 23:36:59 +00:00
Evan Cheng
cd69c81c5e Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass. 
llvm-svn: 25004
 2005-12-24 09:48:35 +00:00
Andrew Lenharth
1e6795bc0c All addressing modes are now exposed. The only remaining relocated forms 
are for function prologue.

TODO: move external symbols over to using RelLit.
    : have a pattern that matches constpool|globaladdr
    : have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
 2005-12-24 08:29:32 +00:00
Andrew Lenharth
588bd3f659 Unify the patterns for loads and stores. Now offset addressing should be 
supported.  This almost completes memory operations.

llvm-svn: 25002
 2005-12-24 07:34:33 +00:00
Andrew Lenharth
f4c74093bb Let's see if we can break things. 
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.

llvm-svn: 25001
 2005-12-24 05:36:33 +00:00
Andrew Lenharth
5ce2a6c2cf move loads and stores over. Smart addr selection comming 
llvm-svn: 25000
 2005-12-24 03:41:56 +00:00
Nate Begeman
96c7e22231 Fix one of the things in the todo file, and get a bit closer to folding 
constant offsets from statics into the address arithmetic.

llvm-svn: 24999
 2005-12-24 01:00:15 +00:00
Evan Cheng
d87688fe72 * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997
 2005-12-23 22:14:32 +00:00
Chris Lattner
738cec7a6e not a good idea 
llvm-svn: 24991
 2005-12-23 07:37:47 +00:00
Evan Cheng
995503fc91 More X86 floating point patterns. 
llvm-svn: 24990
 2005-12-23 07:31:11 +00:00
Evan Cheng
74cf3e8823 Operand 1 of TRUNCSTORE can be any of integer and floating point types. 
llvm-svn: 24989
 2005-12-23 07:30:30 +00:00
Chris Lattner
2e386f9d46 fix something-o 
llvm-svn: 24987
 2005-12-23 07:08:39 +00:00
Chris Lattner
a4a2d4c3fe implement vaarg. Varargs now should work. 
llvm-svn: 24986
 2005-12-23 06:37:38 +00:00
Chris Lattner
4e8124bd9b implement vastart. The dag isel compiles this: 
void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24985
 2005-12-23 06:24:04 +00:00
Chris Lattner
73db2dc9fc remove benchmark list, remove issues addressed by the dag-dag isel 
llvm-svn: 24984
 2005-12-23 06:09:30 +00:00
Chris Lattner
8e80a247ff make sure bit_convert's are expanded 
llvm-svn: 24979
 2005-12-23 05:15:23 +00:00
Chris Lattner
8b2bd265f4 make sure bit_converts are expanded 
llvm-svn: 24978
 2005-12-23 05:13:35 +00:00
Chris Lattner
e47f28d044 fix the int<->fp instructions, which apparently take a single float register 
to represent the int part (because it's always 32-bits)

llvm-svn: 24976
 2005-12-23 05:00:16 +00:00
Chris Lattner
aaeb6774c7 Use BIT_CONVERT to simplify this code 
llvm-svn: 24975
 2005-12-23 02:31:39 +00:00
Chris Lattner
3c4a3dd86e Simplify some code by using BIT_CONVERT 
llvm-svn: 24974
 2005-12-23 00:59:59 +00:00
Chris Lattner
1cbff1f3cd clean up .td file by using evan's new FLAG thing 
llvm-svn: 24967
 2005-12-22 21:18:39 +00:00
Chris Lattner
73f38507d9 remove dead code 
llvm-svn: 24965
 2005-12-22 21:16:08 +00:00
Chris Lattner
8c2622a14e fix handling of weak linkage 
llvm-svn: 24964
 2005-12-22 21:15:17 +00:00
Chris Lattner
f7ed832fcf move some random notes out of my email into someplace useful 
llvm-svn: 24956
 2005-12-22 17:19:28 +00:00
Duraid Madina
e009e40008 this is a hack, which may or may not hang around. In short: 
whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.

BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952
 2005-12-22 13:29:14 +00:00
Duraid Madina
325c2cc07b we can't do this directly in lowering, so we need this case 
llvm-svn: 24951
 2005-12-22 07:14:45 +00:00
Duraid Madina
bf2a5de0d5 oops, back this out 
llvm-svn: 24950
 2005-12-22 07:13:51 +00:00
Duraid Madina
d87738a097 we can't all have brains now, can we 
llvm-svn: 24948
 2005-12-22 06:41:39 +00:00
Duraid Madina
b43dc0ff5b this should take care of calls to varadic functions, but it doesn.,t 
BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string, etce

llvm-svn: 24947
 2005-12-22 06:39:57 +00:00
Duraid Madina
d1c9d5ae4d we need to emit the getf.d instruction in lowering, so add it 
to IA64ISD

llvm-svn: 24946
 2005-12-22 06:38:38 +00:00