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4216 Commits

Author SHA1 Message Date
Chris Lattner
4de7491c52 Implement ret with operand, giving us this: 
int %test(int %A) {
  ret int %A
}

llvm-svn: 24773
 2005-12-17 08:15:09 +00:00
Chris Lattner
b877ae7929 Add a pattern for 'ret'. This now compiles: 
void %test() { ret void }

:)

llvm-svn: 24772
 2005-12-17 08:08:42 +00:00
Chris Lattner
e7408707fd Add empty patterns for F3_2 instructions 
llvm-svn: 24771
 2005-12-17 08:06:43 +00:00
Chris Lattner
3fca9488d2 Implement LowerArguments, at least for the first 6 integer args 
llvm-svn: 24770
 2005-12-17 08:03:24 +00:00
Chris Lattner
62aadddb9d Add the framework for a dag-dag isel 
llvm-svn: 24769
 2005-12-17 07:47:01 +00:00
Evan Cheng
a3ff796fda Remove a few lines of dead code. 
llvm-svn: 24768
 2005-12-17 07:18:44 +00:00
Chris Lattner
adf84860db asmprinter done, added crucial missing step 
llvm-svn: 24767
 2005-12-17 07:17:59 +00:00
Chris Lattner
91e36127ed Use the AsmPrinter for global variable init printing. This eliminates a 
bunch of code and causes V8 to start using the fancy .asciz directive that
the sun assembler supports.

llvm-svn: 24766
 2005-12-17 07:17:08 +00:00
Chris Lattner
2b66656dd9 Switch constant pool printing over to use the Shared AsmPrinter version 
llvm-svn: 24765
 2005-12-17 07:11:43 +00:00
Chris Lattner
9fcfd38a6d Use the shared AsmPrinter code for some basic stuff. No functionality 
change except for fewer .section directives emitted

llvm-svn: 24764
 2005-12-17 07:04:29 +00:00
Evan Cheng
de142995a1 Added an idea about any_extend for performance tuning. 
llvm-svn: 24763
 2005-12-17 06:54:43 +00:00
Chris Lattner
cf47f48fe0 Convert the remaining instructions over, branches and calls. Fix a couple 
minor bugs

llvm-svn: 24762
 2005-12-17 06:54:41 +00:00
Chris Lattner
b3456f1885 convert FP instructions to use an asmstring and operand list, allowing FP 
programs to work on V8 again

llvm-svn: 24761
 2005-12-17 06:32:52 +00:00
Evan Cheng
c308dfb801 Added truncate. 
llvm-svn: 24760
 2005-12-17 02:02:50 +00:00
Evan Cheng
6a94c77c55 Added anyext, modelled as zext on X86. 
llvm-svn: 24759
 2005-12-17 01:47:57 +00:00
Evan Cheng
19550821d1 Added some isel ideas. 
llvm-svn: 24757
 2005-12-17 01:25:19 +00:00
Evan Cheng
5d90b26707 Added support for cmp, test, and conditional move instructions. 
llvm-svn: 24756
 2005-12-17 01:24:02 +00:00
Evan Cheng
566600c17d Only lower SELECT when using DAG based isel. 
llvm-svn: 24755
 2005-12-17 01:22:13 +00:00
Evan Cheng
d51da93a03 X86 lowers SELECT to a cmp / test followed by a conditional move. 
llvm-svn: 24754
 2005-12-17 01:21:05 +00:00
Jim Laskey
37957b1ad3 Added source file/line correspondence for dwarf (PowerPC only at this point.) 
llvm-svn: 24748
 2005-12-16 22:45:29 +00:00
Chris Lattner
ba98d302be Weak and linkonce global vars should still have a .globl emitted for them 
llvm-svn: 24747
 2005-12-16 21:46:14 +00:00
Nate Begeman
69da94a1b9 Add a second vector type to the VRRC register class, and fix some patterns 
so that tablegen can infer all types.

llvm-svn: 24746
 2005-12-16 09:19:13 +00:00
Chris Lattner
2c9fd95c73 add some notes 
llvm-svn: 24745
 2005-12-16 07:20:53 +00:00
Chris Lattner
86914b7f4e Add a couple more instrs 
llvm-svn: 24744
 2005-12-16 07:18:48 +00:00
Chris Lattner
29c644f929 remove some dead code 
llvm-svn: 24743
 2005-12-16 07:16:02 +00:00
Chris Lattner
a7ead87ba4 asmprint pseudo instrs 
llvm-svn: 24742
 2005-12-16 07:13:26 +00:00
Chris Lattner
16896ce1ed Autogenerate asmprinter for F3_2 instructions 
llvm-svn: 24741
 2005-12-16 07:10:02 +00:00
Chris Lattner
b9b7b057d6 Switch F3_1 instructions over to use AsmStrings 
llvm-svn: 24740
 2005-12-16 06:52:00 +00:00
Chris Lattner
8fd4bf0ac7 Plug in basic hooks for an autogenerated asm printer to fill in. 
llvm-svn: 24739
 2005-12-16 06:34:17 +00:00
Chris Lattner
60e5e47904 Add operand info for F3_[12] instructions, getting V8 back to basic functionality. 
With this, Regression/CodeGen/SparcV8/basictest.ll now passes.  Lets hear it
for regression tests :)

llvm-svn: 24738
 2005-12-16 06:25:42 +00:00
Chris Lattner
44de5f7807 Remove JIT support, which doesn't work. 
llvm-svn: 24736
 2005-12-16 06:06:07 +00:00
Chris Lattner
a795cdbfcd add some simple operand info 
llvm-svn: 24735
 2005-12-16 06:02:58 +00:00
Chris Lattner
890fd4e66c Update the darwin handling of linkonce & weak functions and GV stubs. This 
should work in all permutations.

llvm-svn: 24728
 2005-12-16 00:22:14 +00:00
Chris Lattner
71443a0e36 Don't globalize internal functions 
llvm-svn: 24727
 2005-12-16 00:07:30 +00:00
Evan Cheng
43152cb8b6 * Promote all 1 bit entities to 8 bit. 
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.

llvm-svn: 24726
 2005-12-15 19:49:23 +00:00
Evan Cheng
f72e7055c0 Added frameindex, constpool, globaladdr, and externalsym as root nodes of 
leaaddr.

llvm-svn: 24724
 2005-12-15 08:31:04 +00:00
Evan Cheng
9c0d7cacf7 Added constpool, frameindex, and externalsym nodes. 
llvm-svn: 24723
 2005-12-15 08:29:48 +00:00
Evan Cheng
cc6efa8b6f Handling zero extension of 1 bit value. 
llvm-svn: 24722
 2005-12-15 01:02:48 +00:00
Evan Cheng
576b826f71 Use MOV8rm to load 1 bit value. 
llvm-svn: 24721
 2005-12-15 00:59:17 +00:00
Nate Begeman
f5ac708070 Remove a now unused statistic. 
llvm-svn: 24720
 2005-12-14 22:56:16 +00:00
Nate Begeman
fe7a3f28e3 Use the new predicate support that Evan Cheng added to remove some code 
from the DAGToDAG cpp file.  This adds pattern support for vector and
scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and
does the right thing in the presence of -disable-excess-fp-precision.

Allows us to match:
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  %tmp3 = add <4 x float> %tmp2, %tmp1
  store <4 x float> %tmp3, <4 x float> *%a
  ret void
}

As:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vmaddfp v0, v0, v0, v0
        stvx v0, r2, r3
        blr

Or, with llc -disable-excess-fp-precision,

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v1, v0, v0, v1
        vaddfp v0, v1, v0
        stvx v0, r2, r3
        blr

llvm-svn: 24719
 2005-12-14 22:54:33 +00:00
Evan Cheng
40e397521c Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure. 
llvm-svn: 24717
 2005-12-14 22:28:18 +00:00
Evan Cheng
fbc29bb3dd Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS. 
llvm-svn: 24716
 2005-12-14 22:07:12 +00:00
Evan Cheng
297c23d2e7 Added support to specify predicates. 
llvm-svn: 24715
 2005-12-14 22:02:59 +00:00
Evan Cheng
bcdd22c501 Fixed extload type profile. The 4th operand is a ValueType node with type 
OtherVT, it cannot be compare to type of 1st operand which is an integer type.

llvm-svn: 24713
 2005-12-14 19:40:54 +00:00
Evan Cheng
3b094e89fb Added sext and zext patterns. 
llvm-svn: 24705
 2005-12-14 02:22:27 +00:00
Evan Cheng
8abe109550 Added sextld + zextld DAG nodes. 
llvm-svn: 24703
 2005-12-14 02:21:01 +00:00
Nate Begeman
09855eafd1 Add support for fmul node of type v4f32. 
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

Is selected to:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v0, v0, v0, v1
        stvx v0, r2, r3
        blr

llvm-svn: 24701
 2005-12-14 00:34:09 +00:00
Nate Begeman
1700fe3f71 Prepare support for AltiVec multiply, divide, and sqrt. 
llvm-svn: 24700
 2005-12-13 22:55:22 +00:00
Evan Cheng
ad1e2fd14a Add load + store folding srl and sra patterns. 
llvm-svn: 24696
 2005-12-13 07:24:22 +00:00
Chris Lattner
95555853ad Use the shared asmprinter code for printing special llvm globals 
llvm-svn: 24695
 2005-12-13 06:32:50 +00:00
Chris Lattner
0975e89328 Add ELF and darwin support for static ctors and dtors 
llvm-svn: 24693
 2005-12-13 04:53:51 +00:00
Chris Lattner
1468c52811 reindent a loop, unswitch a loop. No functionality changes 
llvm-svn: 24692
 2005-12-13 04:33:58 +00:00
Evan Cheng
63f60d3edb Beautify a few patterns. 
llvm-svn: 24690
 2005-12-13 02:40:18 +00:00
Evan Cheng
95d46be9e6 Some shl patterns which do load + store folding. 
llvm-svn: 24689
 2005-12-13 02:34:51 +00:00
Evan Cheng
6beadf1c29 A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility. 
llvm-svn: 24688
 2005-12-13 01:57:51 +00:00
Evan Cheng
d233c28d29 Add and, or, and xor patterns which fold load + stores. 
llvm-svn: 24687
 2005-12-13 01:41:36 +00:00
Evan Cheng
62999d6c5d Add inc + dec patterns which fold load + stores. 
llvm-svn: 24686
 2005-12-13 01:02:47 +00:00
Evan Cheng
7f9fb7b095 Add neg and not patterns which fold load + stores. 
llvm-svn: 24685
 2005-12-13 00:54:44 +00:00
Evan Cheng
240071c011 Missed a couple redundant explicit type casts. 
llvm-svn: 24684
 2005-12-13 00:25:07 +00:00
Evan Cheng
e80ec06aaf Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc. 
llvm-svn: 24683
 2005-12-13 00:14:11 +00:00
Evan Cheng
ea7f208813 * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands. 
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.

llvm-svn: 24682
 2005-12-13 00:01:09 +00:00
Evan Cheng
0ee9dc460a Add some integer mul patterns. 
llvm-svn: 24681
 2005-12-12 23:47:46 +00:00
Evan Cheng
6c9f9ea7ec Add some sub patterns. 
llvm-svn: 24675
 2005-12-12 21:54:05 +00:00
Evan Cheng
76923d3512 When SelectLEAAddr() fails, it shouldn't cause the side effect of having the 
base or index operands being selected.

llvm-svn: 24674
 2005-12-12 21:49:40 +00:00
Evan Cheng
cf34770b28 For ISD::RET, if # of operands >= 2, try selection the real data dep. operand 
first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)

llvm-svn: 24673
 2005-12-12 20:32:18 +00:00
Andrew Lenharth
0a966ac994 fix FP selects 
llvm-svn: 24672
 2005-12-12 20:30:09 +00:00
Chris Lattner
08c38b28db remove some never-completed and now-obsolete code. 
llvm-svn: 24671
 2005-12-12 20:12:20 +00:00
Evan Cheng
145318aefb Add a few more add / store patterns. e.g. ADD32mi8. 
llvm-svn: 24670
 2005-12-12 19:45:23 +00:00
Andrew Lenharth
7b9648492b restore a more restricted select 
llvm-svn: 24668
 2005-12-12 17:43:52 +00:00
Chris Lattner
dc802c4f4c Fix typo :( 
llvm-svn: 24664
 2005-12-11 18:43:13 +00:00
Chris Lattner
6f047565cb add selectcc 
llvm-svn: 24662
 2005-12-11 08:35:54 +00:00
Chris Lattner
6d4db7c732 Remove type casts that are no longer needed 
llvm-svn: 24661
 2005-12-11 07:45:47 +00:00
Chris Lattner
762fb5e2f2 Realize the constant pool & global addrs must always be ptr type 
llvm-svn: 24660
 2005-12-11 07:45:04 +00:00
Chris Lattner
d27c96f723 Fix the JIT failures from last night. 
llvm-svn: 24659
 2005-12-11 07:37:41 +00:00
Andrew Lenharth
c432a93381 FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself 
llvm-svn: 24658
 2005-12-11 03:54:31 +00:00
Nate Begeman
a0e26b25f4 Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
 2005-12-10 02:36:00 +00:00
Evan Cheng
191d0954ff Use SDTCisPtrTy type property for store address. 
llvm-svn: 24656
 2005-12-10 01:59:36 +00:00
Evan Cheng
56f62789d7 * Added X86 store patterns. 
* Added X86 dec patterns.

llvm-svn: 24654
 2005-12-10 00:48:20 +00:00
Nate Begeman
5c6a84b5fc Add support patterns to many load and store instructions which will 
hopefully use patterns in the near future.

llvm-svn: 24651
 2005-12-09 23:54:18 +00:00
Chris Lattner
ee29c75c65 Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load 
must be a pointer.  This removes a type check out of the code generated by
tblgen for load matching.

llvm-svn: 24650
 2005-12-09 22:58:42 +00:00
Evan Cheng
6610545b7e Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al 
llvm-svn: 24648
 2005-12-09 22:48:48 +00:00
Chris Lattner
cdeeb94947 Teach the PPC backend about the ctor and dtor list when not using __main and 
linking the entire program into one bc file.

llvm-svn: 24645
 2005-12-09 18:24:29 +00:00
Andrew Lenharth
ae37aa2550 it helps if your conditionals are not reversed 
llvm-svn: 24641
 2005-12-09 00:45:42 +00:00
Chris Lattner
9d9313e3c1 Add another important case we miss 
llvm-svn: 24639
 2005-12-08 07:13:28 +00:00
Evan Cheng
e121d9f3d7 Added support for ComplexPattern. 
llvm-svn: 24638
 2005-12-08 04:28:48 +00:00
Evan Cheng
6eb25df63a Added explicit type field to ComplexPattern. 
llvm-svn: 24637
 2005-12-08 02:15:07 +00:00
Evan Cheng
1712ee5ab9 * Added intelligence to X86 LEA addressing mode matching routine so it returns 
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.

llvm-svn: 24635
 2005-12-08 02:01:35 +00:00
Chris Lattner
5df0bce13a X86 doesn't support sextinreg for 8-bit things either. 
llvm-svn: 24631
 2005-12-07 17:59:14 +00:00
Andrew Lenharth
3b3088c410 fix divide and remainder 
llvm-svn: 24628
 2005-12-06 23:27:39 +00:00
Chris Lattner
46ca9774fc Silence another annoying GCC warning 
llvm-svn: 24627
 2005-12-06 20:56:18 +00:00
Andrew Lenharth
368c8ccc9a more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp 
llvm-svn: 24625
 2005-12-06 20:43:30 +00:00
Andrew Lenharth
b294ecae1b OK, this does wonders for broken stuff 
llvm-svn: 24624
 2005-12-06 20:40:34 +00:00
Chris Lattner
68a0fed879 Use new PPC-specific nodes to represent shifts which require the 6-bit 
amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.

llvm-svn: 24615
 2005-12-06 02:10:38 +00:00
Andrew Lenharth
b86d70f50a added instructions with inverted immediates 
llvm-svn: 24614
 2005-12-06 00:33:53 +00:00
Andrew Lenharth
fe52ed77e2 yea, it helps to have your path set right when testing 
llvm-svn: 24613
 2005-12-05 23:41:45 +00:00
Andrew Lenharth
0fdfe40762 These never trigger, but whatever 
llvm-svn: 24612
 2005-12-05 23:19:44 +00:00
Evan Cheng
60cc8da341 Remove unnecessary let hasCtrlDep=1 now it can be inferred. 
llvm-svn: 24611
 2005-12-05 23:09:43 +00:00
Andrew Lenharth
0573bb5fd4 move this over to the dag 
llvm-svn: 24609
 2005-12-05 20:50:53 +00:00
Andrew Lenharth
d819ad516e fix constant pool loads 
llvm-svn: 24607
 2005-12-05 17:51:02 +00:00
Chris Lattner
3583f5337b Several things: 
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly.  The port number really
   *is* a 16-bit value, but the patterns should only match if the number
   is 0-255.  Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
   i8, not an i16 as they were believed to be before.  This previous fib
   stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.

llvm-svn: 24599
 2005-12-05 02:40:25 +00:00
Chris Lattner
440e97cb1f On some targets (e.g. X86), shift amounts are not the same as the value 
being shifted.  Don't assume they are.

llvm-svn: 24598
 2005-12-05 02:37:26 +00:00
Chris Lattner
487742bf85 Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted. 
llvm-svn: 24595
 2005-12-05 02:34:29 +00:00
Chris Lattner
b2d4850394 Add some explicit type casts so that tblgen knows the type of the shift 
amount, which is not necessarily the same as the type being shifted.

llvm-svn: 24594
 2005-12-05 02:34:05 +00:00
Chris Lattner
e6daa0e5bc The basic fneg cases are already autogen'd 
llvm-svn: 24592
 2005-12-04 19:04:38 +00:00
Chris Lattner
f38170bbd2 Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen 
improvements.

llvm-svn: 24591
 2005-12-04 19:01:59 +00:00
Chris Lattner
a8af34937b Finish moving uncond br over to .td file, remove from .cpp file. 
llvm-svn: 24590
 2005-12-04 18:48:01 +00:00
Chris Lattner
b62b05bde6 Define BR in the .td file now that Evan made tblgen smarter. 
llvm-svn: 24589
 2005-12-04 18:42:54 +00:00
Evan Cheng
1ce02890ce Added isel patterns for RET, JMP, and WRITEPORT. 
llvm-svn: 24588
 2005-12-04 08:19:43 +00:00
Evan Cheng
7580d9229f * Added instruction property hasCtrlDep for those which r/w control-flow 
chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
  chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.

llvm-svn: 24586
 2005-12-04 08:13:17 +00:00
Chris Lattner
4d34819930 Fix PR672 another way which should be more robust 
llvm-svn: 24585
 2005-12-04 06:03:50 +00:00
Chris Lattner
1b8459d092 Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672. 
This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on.  Given a clean nightly tester run, we should be able to turn it
on by default!

llvm-svn: 24578
 2005-12-03 07:15:55 +00:00
Chris Lattner
a2a404ff3a add a note 
llvm-svn: 24572
 2005-12-02 00:11:20 +00:00
Chris Lattner
b86aeb6db6 IA64 doesn't support the LOCATION node, and for some reason the ISelPattern 
stuff isn't using ISelLowering.cpp

llvm-svn: 24567
 2005-12-01 18:19:53 +00:00
Chris Lattner
046761f312 Make sure these get added into the codegenmap when appropriate 
llvm-svn: 24566
 2005-12-01 18:09:22 +00:00
Andrew Lenharth
9d6eddefaf major think-o 
llvm-svn: 24564
 2005-12-01 17:48:51 +00:00
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Nate Begeman
5de40afc43 Cosmetic change, better reflects actual values 
llvm-svn: 24562
 2005-12-01 04:48:26 +00:00
Chris Lattner
1b8cb77fea Fix a regression caused by a patch earlier today 
llvm-svn: 24561
 2005-12-01 03:50:19 +00:00
Andrew Lenharth
22f34d275f Flags where I think I need them, quick, before the nightly tester starts 
llvm-svn: 24560
 2005-12-01 01:53:10 +00:00
Evan Cheng
f1352fa7d6 Proper support for shifts with register shift value. 
llvm-svn: 24559
 2005-12-01 00:43:55 +00:00
Evan Cheng
363ad8bbc4 Use a getCopyToReg() variant to generate a flaggy CopyToReg node. 
llvm-svn: 24558
 2005-12-01 00:41:50 +00:00
Chris Lattner
258dc29d7f SelectNodeTo now returns its result, we must pay attention to it. 
llvm-svn: 24552
 2005-11-30 23:04:38 +00:00
Chris Lattner
a7d31504f9 Pay attn to the node returned by SelectNodeTo 
llvm-svn: 24551
 2005-11-30 23:02:08 +00:00
Chris Lattner
b88f251144 SelectNodeTo now returns its result, we must pay attention to it. 
llvm-svn: 24550
 2005-11-30 22:59:19 +00:00
Chris Lattner
06fbfe625c SelectNodeTo now returns N. Use it instead of return N directly. 
llvm-svn: 24549
 2005-11-30 22:53:06 +00:00
Chris Lattner
90a87cc2f1 Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll 
llvm-svn: 24547
 2005-11-30 20:40:54 +00:00
Nate Begeman
47bb0eba00 Fix a typo in my latest change 
llvm-svn: 24542
 2005-11-30 18:57:39 +00:00
Nate Begeman
84be54b731 No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
 2005-11-30 18:54:35 +00:00
Andrew Lenharth
a758caed46 remove redundant code 
llvm-svn: 24538
 2005-11-30 17:14:11 +00:00
Andrew Lenharth
431d24abaf Make typesafe that which isn't: FCMOVxx 
llvm-svn: 24536
 2005-11-30 17:11:20 +00:00
Andrew Lenharth
114fb4cdb1 FPSelect and more custom lowering 
llvm-svn: 24535
 2005-11-30 16:10:29 +00:00
Nate Begeman
31121419c8 First chunk of actually generating vector code for packed types. These 
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}

llvm-svn: 24534
 2005-11-30 08:22:07 +00:00
Andrew Lenharth
dd3477b285 All sorts of stuff. 
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy.  They should be custom lowered though.

Lots more stuff compiles now (go go single source!).  Of course, none of it
probably works, but that is what the nightly tester can find out :)

llvm-svn: 24533
 2005-11-30 07:19:56 +00:00
Chris Lattner
fdc786b18f Fix a bug in a recent patch that broke shifts 
llvm-svn: 24526
 2005-11-30 05:11:18 +00:00
Evan Cheng
bc51bc83b6 Added support to STORE and shifts to DAG to DAG isel. 
llvm-svn: 24525
 2005-11-30 02:51:20 +00:00
Evan Cheng
16b8b9d532 Fixed a minor bug: - -offset != offset iff offset == MININT 
llvm-svn: 24522
 2005-11-30 01:59:00 +00:00
Nate Begeman
ebafe9c6d8 Represent the encoding of the SPR instructions as they actually are, so 
that we can use the correct SPR numbers in the InstrInfo.td file.  This is
necessary to support VRsave.

llvm-svn: 24521
 2005-11-29 22:42:50 +00:00
Evan Cheng
f412b7ba0c Add more X86 ISel patterns. 
llvm-svn: 24520
 2005-11-29 19:38:52 +00:00
Nate Begeman
9a781caa20 Hook up one type, v4f32, to the VR RegisterClass for now. 
llvm-svn: 24517
 2005-11-29 08:17:20 +00:00
Nate Begeman
16a1c53abc Add the remainder of the AltiVec 4 x float instructions. Further 
enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.

llvm-svn: 24516
 2005-11-29 08:04:45 +00:00
Chris Lattner
47feb1ecbb No targets support line number info yet. 
llvm-svn: 24513
 2005-11-29 06:16:21 +00:00
Nate Begeman
a1c2df2471 Add the majority of the vector machien value types we expect to support, 
and make a few changes to the legalization machinery to support more than
16 types.

llvm-svn: 24511
 2005-11-29 05:45:29 +00:00
Evan Cheng
c23716c268 Fixed a comment bug: 
createPPCPatternInstructionSelector -> createPPCISelPattern

llvm-svn: 24510
 2005-11-29 04:59:46 +00:00
Chris Lattner
c90cd9e5e8 refix typo 
llvm-svn: 24505
 2005-11-29 00:42:30 +00:00
Chris Lattner
2e375c1847 don't say this is i128, because it isn't yet. Hopefully nate will change 
this to be something sane, but in the mean time it is unused, so safe to
make something bogus.

llvm-svn: 24504
 2005-11-29 00:41:40 +00:00
Chris Lattner
7bc9c0d389 revert my change for the time being, which broke the build 
llvm-svn: 24503
 2005-11-29 00:24:08 +00:00
Chris Lattner
9e47c9a37a fix a typo :) 
llvm-svn: 24501
 2005-11-28 22:42:15 +00:00
Chris Lattner
0edc0fd222 Add a missed optimization 
llvm-svn: 24495
 2005-11-28 04:52:39 +00:00
Nate Begeman
84cac055ad Small tweaks noticed while on the plane. 
llvm-svn: 24492
 2005-11-26 22:39:34 +00:00
Duraid Madina
9c2283e7c7 add support for dynamic_stackalloc to the dag isel (thanks andrew ;) 
next up: support argument passing in memory, not just registers

llvm-svn: 24490
 2005-11-25 07:49:25 +00:00
Nate Begeman
687456dd7a Some first bits of AltiVec stuff: Instruction Formats, Encodings, and 
Registers.  Apologies to Jim if the scheduling info so far isn't accurate.

There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.

llvm-svn: 24489
 2005-11-23 05:29:52 +00:00
Andrew Lenharth
8b7596a557 Fix warning, the better way. Really, this is what this instruction is for, so use it 
llvm-svn: 24486
 2005-11-22 20:59:00 +00:00
Andrew Lenharth
5de23ee89a Fix warning 
llvm-svn: 24485
 2005-11-22 20:56:05 +00:00
Andrew Lenharth
33e8022557 massive DAGISel patch. lots and lots more stuff compiles now 
llvm-svn: 24483
 2005-11-22 04:20:06 +00:00
Nate Begeman
d2f6fcf327 Rather than attempting to legalize 1 x float, make sure the SD ISel never 
generates it.  Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.

The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.

llvm-svn: 24482
 2005-11-22 01:29:36 +00:00
Chris Lattner
3efe6171f1 Use HasDotTypeDotSizeDirective instead of forELF 
llvm-svn: 24481
 2005-11-21 23:06:54 +00:00
Chris Lattner
fb4a026c32 Remove a level of indentation by using a continue. 
llvm-svn: 24479
 2005-11-21 22:48:18 +00:00
Chris Lattner
d17b6f1f1f Simplify the subtarget info, allow the asmwriter to do some target sensing 
based on TargetType.

llvm-svn: 24478
 2005-11-21 22:43:58 +00:00
Chris Lattner
77bd127e14 Use subtarget information computed by X86Subtarget instead of rolling our own. 
llvm-svn: 24477
 2005-11-21 22:39:40 +00:00
Chris Lattner
4e1e8b180b Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin, 
or native Win32

llvm-svn: 24476
 2005-11-21 22:31:58 +00:00
Chris Lattner
0a2fc68b8a Add a forELF flag, allowing the removal of forCygwin and simplification of 
conditionals.

llvm-svn: 24475
 2005-11-21 22:19:48 +00:00
Chris Lattner
fe8b9b90d4 simplify and genericize this code 
llvm-svn: 24473
 2005-11-21 19:50:31 +00:00
Duraid Madina
5fe9d39b8d add support for div/rem to the dag->dag isel. yay. 
llvm-svn: 24472
 2005-11-21 14:14:54 +00:00
Chris Lattner
f4b9a79b79 Eliminate unneeded intermediate class. Move doFinalizeMethod to bottom of 
file.

llvm-svn: 24470
 2005-11-21 08:40:17 +00:00
Chris Lattner
b24983c574 Start using shared asmprinter Constant Pool emitter, use shorter cpi names. 
llvm-svn: 24469
 2005-11-21 08:38:26 +00:00
Chris Lattner
9a74c980e8 prune #include 
llvm-svn: 24468
 2005-11-21 08:33:17 +00:00
Chris Lattner
03d9332c4f Switch to using the shared constant pool printer, along with using shorter 
CPI ids

llvm-svn: 24467
 2005-11-21 08:32:23 +00:00
Chris Lattner
0392a281e0 Switch to using the generic constant pool emitter impl, use shorter 
CPI names

llvm-svn: 24466
 2005-11-21 08:29:17 +00:00
Chris Lattner
a5ec3d8e81 Use generic constant pool emission code in the AsmPrinter class. 
llvm-svn: 24465
 2005-11-21 08:26:15 +00:00
Chris Lattner
31197fa019 Use the FunctionNumber provided by the AsmPrinter class 
llvm-svn: 24462
 2005-11-21 08:14:07 +00:00
Chris Lattner
d7ae8bcf66 Use CommentString where possible, fix a bug where aix mode wouldn't assemble 
due to basic blocks being misnamed.

llvm-svn: 24459
 2005-11-21 08:02:41 +00:00
Chris Lattner
f3af64b478 unify the darwin and aix constant pool printers 
llvm-svn: 24458
 2005-11-21 07:57:37 +00:00
Chris Lattner
3e2c6c1d15 Adjust to capitalized AsmPrinter method names 
llvm-svn: 24456
 2005-11-21 07:51:23 +00:00
Chris Lattner
0716cec311 Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwin 
port to properly use L for the bb prefix instead of .

llvm-svn: 24454
 2005-11-21 07:43:59 +00:00
Chris Lattner
b4955ba62b use PrivateGlobalPrefix for basic blocks 
llvm-svn: 24453
 2005-11-21 07:41:05 +00:00
Chris Lattner
a0905b348a Use PrivateGlobalPrefix for basic block labels 
llvm-svn: 24452
 2005-11-21 07:39:22 +00:00
Chris Lattner
28504fdac0 Use PrivateGlobalPrefix for basic blocks 
llvm-svn: 24451
 2005-11-21 07:38:08 +00:00
Chris Lattner
13902c24bd Switch to the new shared SwitchSection 
llvm-svn: 24450
 2005-11-21 07:30:28 +00:00
Chris Lattner
b273e59ae8 Start using SwitchSection, allowing globals and functions to be emitted 
to specific sections.  Delete some dead functions copied from the X86 backend.

llvm-svn: 24449
 2005-11-21 07:26:04 +00:00
Chris Lattner
83215f8935 convert the rest of this over to use SwitchSection 
llvm-svn: 24448
 2005-11-21 07:16:34 +00:00
Chris Lattner
a19d2349b1 Start using the AsmPrinter shared SwitchSection code. This allows the X86 
backend to implement global variables in sections.

llvm-svn: 24447
 2005-11-21 07:11:11 +00:00
Chris Lattner
bc917fe899 This is now implemented in common codegen code 
llvm-svn: 24446
 2005-11-21 07:06:58 +00:00
Chris Lattner
e5d0064a9d Rename SwitchSection -> switchSection to avoid conflicting with a future 
change.

llvm-svn: 24443
 2005-11-21 06:55:27 +00:00
Chris Lattner
07ea769304 Start using PrivateGlobalPrefix correctly 
llvm-svn: 24442
 2005-11-21 06:51:52 +00:00
Chris Lattner
78bb97af59 set PrivateGlobalPrefix on darwin, use it when printing out CP references 
llvm-svn: 24441
 2005-11-21 06:47:58 +00:00
Chris Lattner
00a2d1554b Naturally align doubles in the constant pool, set PrivateGlobalPrefix on 
darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.

llvm-svn: 24440
 2005-11-21 06:46:22 +00:00
Chris Lattner
d122fc01dd Lower READCYCLECOUNTER correctly, preserving the chain result 
llvm-svn: 24438
 2005-11-20 22:57:19 +00:00
Chris Lattner
5d9ecff961 encode rdtsc correctly 
llvm-svn: 24435
 2005-11-20 22:13:18 +00:00
Chris Lattner
f4f66fafd9 use chain operands to ensure the copies don't wander from the rdtsc instruction. 
llvm-svn: 24434
 2005-11-20 22:01:40 +00:00
Andrew Lenharth
a369904fc5 The second patch of X86 support for read cycle counter. 
llvm-svn: 24430
 2005-11-20 21:41:10 +00:00
Chris Lattner
af79013023 Teach the x86 backend about the register constraints of its addressing mode. 
Patch by Evan Cheng

llvm-svn: 24423
 2005-11-19 07:01:30 +00:00
Chris Lattner
bec2158e66 Capture more operand info, patch by Evan Cheng 
llvm-svn: 24422
 2005-11-19 07:00:10 +00:00
Chris Lattner
6e0171ba8b Add load and other support to the dag-dag isel. Patch contributed by Evan 
Cheng!

llvm-svn: 24419
 2005-11-19 02:11:08 +00:00
Andrew Lenharth
b8ad89c2a4 prevent latent switch creation 
llvm-svn: 24413
 2005-11-18 13:57:03 +00:00
Chris Lattner
72fa26a85b add more patterns, patch by Evan Cheng. 
llvm-svn: 24406
 2005-11-18 01:04:42 +00:00
Nate Begeman
4567e9baf6 Also add the new vector value type here, for completeness. 
llvm-svn: 24405
 2005-11-18 00:53:32 +00:00
Chris Lattner
da306413bb only use dyld stubs if not in ppc-static mode. This completes support for 
non-static codegen.

llvm-svn: 24403
 2005-11-17 19:40:30 +00:00
Chris Lattner
25e065cc46 refactor call operand handling to eliminate special cases from printOp. 
llvm-svn: 24401
 2005-11-17 19:25:59 +00:00
Chris Lattner
02522dc4e6 disentangle call operands from branch operands a bit 
llvm-svn: 24400
 2005-11-17 19:16:08 +00:00