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1479 Commits

Author SHA1 Message Date
Rafael Espindola
5589bebfa5 Add stack alignment information for Sparc. 
This matches the data in clang which was added by Jakob Stoklund Olesen in
r179596.

Thanks for erikjv on irc for pointing me to the relevant documents:
http://sparc.com/standards/64.psabi.1.35.ps.Z
page 25: Every stack frame must be 16-byte aligned.

http://sparc.com/standards/psABI3rd.pdf
page 3-10: Although the architecture requires only word alignment, software convention and the operating system require every stack frame to be doubleword aligned.

I tried to add a test, but it looks like sparc doesn't implement dynamic stack
realignment. This will be tested in clang shortly.

llvm-svn: 197646
 2013-12-19 02:21:16 +00:00
Rafael Espindola
559bceac20 The preferred alignment defaults to the abi alignment. Omit if it is the same. 
llvm-svn: 197400
 2013-12-16 18:01:51 +00:00
Rafael Espindola
65c80ee4a2 On DataLayout, omit the default of p:64:64:64. 
llvm-svn: 197397
 2013-12-16 17:15:29 +00:00
Rafael Espindola
2bd13393e0 Assume defaults to produce smaller datalayout strings. 
llvm-svn: 197249
 2013-12-13 17:56:11 +00:00
Rafael Espindola
082ec7aafe Move Sparc's getDataLayout out of line and add comments. 
llvm-svn: 196990
 2013-12-11 01:07:43 +00:00
NAKAMURA Takumi
54fa39136d Prune redundant dependencies in LLVMBuild.txt. 
llvm-svn: 196988
 2013-12-11 00:30:57 +00:00
Venkatraman Govindaraju
700f24667b [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9. 
llvm-svn: 196755
 2013-12-09 05:13:25 +00:00
Venkatraman Govindaraju
c918055fdb [Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error. 
llvm-svn: 196751
 2013-12-09 04:02:15 +00:00
Venkatraman Govindaraju
0ab9fc8dbd [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9. 
This fixes PR18150.

llvm-svn: 196735
 2013-12-08 22:06:07 +00:00
Rafael Espindola
5f33387c40 Refactor the setting of PrivateGlobalPrefix. 
No functionality change.

llvm-svn: 196170
 2013-12-02 23:39:26 +00:00
Rafael Espindola
427ca8d886 Change the default of AsmWriterClassName and isMCAsmWriter. 
llvm-svn: 196065
 2013-12-02 04:55:42 +00:00
NAKAMURA Takumi
9b851e876f [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too. 
I think, in principle, intrinsics_gen may be added explicitly.
That said, it can be added incidentally, since each target already has dependencies to llvm-tblgen.
Almost all source files depend on both CommonTaleGen and intrinsics_gen.

Explicit add_dependencies() have been pruned under lib/Target.

llvm-svn: 195929
 2013-11-28 17:04:31 +00:00
NAKAMURA Takumi
99f544b37e [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen. 
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.

llvm-svn: 195927
 2013-11-28 17:04:04 +00:00
NAKAMURA Takumi
5dbd3bcf3d [CMake] Prune include_directories() in llvm/lib/Target. add_llvm_target() sets them. 
llvm-svn: 195921
 2013-11-28 14:53:30 +00:00
NAKAMURA Takumi
035ff3c7bf SparcFrameLowering.cpp: Prune 'DL' [-Wunused-variable] 
llvm-svn: 195590
 2013-11-25 00:52:46 +00:00
Venkatraman Govindaraju
d0d03fae95 [Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64. 
llvm-svn: 195576
 2013-11-24 20:23:25 +00:00
Venkatraman Govindaraju
71233183a9 [Sparc]: Implement LEA pattern for sparcv9. 
llvm-svn: 195575
 2013-11-24 20:07:35 +00:00
Venkatraman Govindaraju
73dd53211d [SparcV9]: Do not emit .register directives for global registers that are clobbered by calls but not used in the function itself. 
llvm-svn: 195574
 2013-11-24 18:41:49 +00:00
Venkatraman Govindaraju
0c27a5ac2c [SparcV9] Enable custom lowering of DYNAMIC_STACKALLOC in sparc64. 
llvm-svn: 195573
 2013-11-24 17:41:41 +00:00
Juergen Ributzka
5357a6d64b [weak vtables] Remove a bunch of weak vtables 
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064
 2013-11-19 00:57:56 +00:00
Alexey Samsonov
3bfef6bdb6 Revert r194865 and r194874. 
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
  Base *foo = new Child();
  delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997
 2013-11-18 09:31:53 +00:00
Juergen Ributzka
ee3af15269 [weak vtables] Remove a bunch of weak vtables 
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 194865
 2013-11-15 22:34:48 +00:00
Roman Divacky
8f3a1182e7 Expand rotate instructions on sparcv9 as well. 
llvm-svn: 194500
 2013-11-12 19:04:45 +00:00
Venkatraman Govindaraju
8ce290e5fa [SparcV9] Handle i64 <-> float conversions in sparcv9 mode. 
llvm-svn: 193957
 2013-11-03 12:28:40 +00:00
Venkatraman Govindaraju
1b0f7d035d [Sparc] Expand FP_TO_UINT, UINT_TO_FP for fp128. 
llvm-svn: 193947
 2013-11-03 08:00:19 +00:00
Venkatraman Govindaraju
c60684ae6f [SparcV9] Add ctpop instruction for i64. Also, expand ctlz, cttz and bswap. 
llvm-svn: 193941
 2013-11-03 05:59:07 +00:00
Roman Divacky
e5df4dcd13 SparcV9 doesnt have rem instruction either. 
llvm-svn: 193789
 2013-10-31 19:22:33 +00:00
Rafael Espindola
68ddc56344 Add a helper getSymbol to AsmPrinter. 
llvm-svn: 193627
 2013-10-29 17:07:16 +00:00
Rafael Espindola
90d8b36e1e Add a MCAsmInfoELF class and factor some code into it. 
We had a MCAsmInfoCOFF, but no common class for all the ELF MCAsmInfos before.

llvm-svn: 192760
 2013-10-16 01:34:32 +00:00
Venkatraman Govindaraju
aedc12be2e [Sparc] Disable tail call optimization for sparc64. 
This patch fixes PR17506.

llvm-svn: 192294
 2013-10-09 12:50:39 +00:00
NAKAMURA Takumi
f37e42a504 SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-default] 
llvm-svn: 192179
 2013-10-08 10:29:09 +00:00
NAKAMURA Takumi
18fc7c1446 Prune trailing linefeeds. 
llvm-svn: 192178
 2013-10-08 10:29:03 +00:00
Venkatraman Govindaraju
6abd2b0367 [Sparc] Implement JIT for SPARC. 
No new testcases. However, this patch makes all supported JIT testcases in 
test/ExecutionEngine  pass on Sparc.

llvm-svn: 192176
 2013-10-08 07:15:22 +00:00
Venkatraman Govindaraju
72515ccf89 [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead. 
llvm-svn: 192160
 2013-10-08 02:50:29 +00:00
Rafael Espindola
e60c3625e3 Remove getEHExceptionRegister and getEHHandlerRegister. 
They haven't been used for a long time. Patch by MathOnNapkins.

llvm-svn: 192099
 2013-10-07 13:39:22 +00:00
Venkatraman Govindaraju
2d62beab83 [Sparc] Do not emit nop after fcmp* instruction with V9. 
llvm-svn: 192056
 2013-10-06 07:06:44 +00:00
Venkatraman Govindaraju
aacd252702 [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64. 
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.

llvm-svn: 192054
 2013-10-06 03:36:18 +00:00
Venkatraman Govindaraju
fa75d8536b [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx. 
addx/subx does not modify conditional codes whereas addxcc/subxx does.

llvm-svn: 192053
 2013-10-06 02:11:10 +00:00
Venkatraman Govindaraju
179e7e6dea [Sparc] Use correct alignment while loading/storing fp128 values. 
llvm-svn: 192023
 2013-10-05 02:29:47 +00:00
Venkatraman Govindaraju
cf869e9b2a [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP with fp128 operand. 
llvm-svn: 192015
 2013-10-05 00:31:41 +00:00
Venkatraman Govindaraju
271e9485db [Sparc] Correct the floating point conditional code mapping in GetOppositeBranchCondition(). 
llvm-svn: 192006
 2013-10-04 23:54:30 +00:00
Venkatraman Govindaraju
af5985d1f5 [Sparc] Implements exception handling in SPARC with DwarfCFI. 
llvm-svn: 191432
 2013-09-26 15:11:00 +00:00
Venkatraman Govindaraju
2c1eb43f40 [Sparc] Use correct instruction pattern for CMPri. 
llvm-svn: 191180
 2013-09-22 18:54:54 +00:00
Venkatraman Govindaraju
a015f53847 [Sparc] Make SPARC instructions' encoding well defined such that TableGen can automatically generate code emitter. 
llvm-svn: 191168
 2013-09-22 09:54:42 +00:00
Venkatraman Govindaraju
71c981302c [Sparc] Clean up MOVcc instructions so that TableGen can encode them correctly. No functionality change intended. 
llvm-svn: 191167
 2013-09-22 09:18:26 +00:00
Venkatraman Govindaraju
953c8fbf21 [Sparc] Clean up branch instructions, so that TableGen can encode branch conditions as well. No functionality change intended. 
llvm-svn: 191166
 2013-09-22 08:51:55 +00:00
Tim Northover
c9a7e47164 ISelDAG: spot chain cycles involving MachineNodes 
Previously, the DAGISel function WalkChainUsers was spotting that it
had entered already-selected territory by whether a node was a
MachineNode (amongst other things). Since it's fairly common practice
to insert MachineNodes during ISelLowering, this was not the correct
check.

Looking around, it seems that other nodes get their NodeId set to -1
upon selection, so this makes sure the same thing happens to all
MachineNodes and uses that characteristic to determine whether we
should stop looking for a loop during selection.

This should fix PR15840.

llvm-svn: 191165
 2013-09-22 08:21:56 +00:00
Venkatraman Govindaraju
ae9ddc5768 [Sparc] Add support for TLS in sparc. 
llvm-svn: 191164
 2013-09-22 06:48:52 +00:00
Venkatraman Govindaraju
df68ba133b [SPARC] Make functions with GLOBAL_OFFSET_TABLE access as non-leaf functions. 
llvm-svn: 191160
 2013-09-22 01:40:24 +00:00
Venkatraman Govindaraju
e3ed207140 [Sparc] Emit .register directive to declare the use of global registers %g2, %g4, %g6 and %g7. 
llvm-svn: 191158
 2013-09-22 00:42:30 +00:00