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Commit Graph

75490 Commits

Author SHA1 Message Date
Benjamin Kramer
b98ae4dc68 valgrind: Suppress glibc's optiized strcasecmp harder.
llvm-svn: 139084
2011-09-03 17:59:31 +00:00
Benjamin Kramer
902004dcd8 Use internal storage for command line option.
llvm-svn: 139079
2011-09-03 03:45:06 +00:00
Bill Wendling
c273c3f456 Don't reload the values that are already there. The llvm.eh.resume uses the same
values that the resume instruction uses.
PR10850

llvm-svn: 139076
2011-09-03 01:38:17 +00:00
Andrew Trick
8b968beebd Exclude more arm jit failures pending PR10783.
llvm-svn: 139074
2011-09-03 01:08:35 +00:00
Bruno Cardoso Lopes
02157d584a Add AVX versions to match AESENC/AESDEC intrinsics. This hopefully ends
the cycle of missing AVX counterparts of already present SSE* patterns

llvm-svn: 139073
2011-09-03 00:47:08 +00:00
Bruno Cardoso Lopes
c72ce24240 Add AVX version of a SSE4.1 VPBLENDVB pattern
llvm-svn: 139072
2011-09-03 00:47:05 +00:00
Bruno Cardoso Lopes
a25fc6f941 Add AVX versions of SSE4.1 EXTRACTPS patterns
llvm-svn: 139071
2011-09-03 00:47:03 +00:00
Bruno Cardoso Lopes
45d02d5eca Add AVX versions for SSE4.1 MOVZX* patterns
llvm-svn: 139070
2011-09-03 00:47:01 +00:00
Bruno Cardoso Lopes
cadec3711c Add one more AVX pattern for MOVZPQILo2PQI
llvm-svn: 139069
2011-09-03 00:46:58 +00:00
Bruno Cardoso Lopes
48eeb79003 Move PUNPCKLQDQ splat pattern close to the instruction definition and
duplicate it for AVX mode.

llvm-svn: 139068
2011-09-03 00:46:56 +00:00
Bruno Cardoso Lopes
ca90af60bd Add AVX pattern versions for PSHUFB,PSIGN{B,W,D}
llvm-svn: 139067
2011-09-03 00:46:54 +00:00
Bruno Cardoso Lopes
7fae5ca308 Add AVX versions of MOVZDI2PDI patterns. Use SUBREG_TO_REG to indicate
that the AVX versions (even the 128-bit ones) all clear the upper part
of the destination register.

llvm-svn: 139066
2011-09-03 00:46:51 +00:00
Bruno Cardoso Lopes
e749426ece Enforce subtarget checks in a few places to be explicit when the
pattern should be matched

llvm-svn: 139065
2011-09-03 00:46:49 +00:00
Bruno Cardoso Lopes
323a5b334e Tidy up code moving patterns to their appropriate place!
llvm-svn: 139064
2011-09-03 00:46:47 +00:00
Bruno Cardoso Lopes
ea1931b9d0 Add AVX versions of FsMOVAPS and FsMOVAPS. Teach X86InstrInfo how to use
it!

llvm-svn: 139063
2011-09-03 00:46:45 +00:00
Bruno Cardoso Lopes
eb041875c1 Teach X86FastISel to use AVX versions of instructions when possible
llvm-svn: 139062
2011-09-03 00:46:42 +00:00
Bruno Cardoso Lopes
86c67e11c9 Fix 80-column and style
llvm-svn: 139061
2011-09-03 00:46:40 +00:00
Bruno Cardoso Lopes
beb7a448e7 Tidy up some SSE/AVX convert intrinsics. Also add an AVX version of
OptForSize pattern

llvm-svn: 139060
2011-09-03 00:46:38 +00:00
Owen Anderson
05f809efff Fix a truly heinous bug in DAGCombine related to AssertZext.
If we have a chain of zext -> assert_zext -> zext -> use, the first zext would get simplified away because of the later zext, and then the later zext would get simplified away because of the assert.  The solution is to teach SimplifyDemandedBits that assert_zext demands all of the high bits of its input, rather than only those demanded by its users.  No testcase because the only example I have manifests as llvm-gcc miscompiling LLVM, and I haven't found a smaller case that reproduces this problem.
Fixes <rdar://problem/10063365>.

llvm-svn: 139059
2011-09-03 00:26:49 +00:00
Dan Gohman
cbadb0f92c Revert r129875, XFAILing this test for arm, since the fix was reverted.
llvm-svn: 139058
2011-09-03 00:14:24 +00:00
Jakob Stoklund Olesen
ef8527b836 Pseudo CMOV instructions don't clobber EFLAGS.
The explanation about a 0 argument being materialized as xor is no
longer valid.  Rematerialization will check if EFLAGS is live before
clobbering it.

The code produced by X86TargetLowering::EmitLoweredSelect does not
clobber EFLAGS.

This causes one less testb instruction to be generated in the cmov.ll
test case.

llvm-svn: 139057
2011-09-02 23:52:55 +00:00
Jakob Stoklund Olesen
29145a3de1 Check for EFLAGS live-out before clobbering it.
It is only allowed to clobber EFLAGS at the end of a block if it isn't
live-in to any successor.

llvm-svn: 139056
2011-09-02 23:52:52 +00:00
Jakob Stoklund Olesen
6d5d51f687 Use existing function.
llvm-svn: 139055
2011-09-02 23:52:49 +00:00
Jim Grosbach
68afe301fc Thumb2 parsing and encoding for CBZ/CBNZ.
llvm-svn: 139054
2011-09-02 23:46:10 +00:00
Jim Grosbach
fb5e64e731 Thumb2 parsing and encoding for BXJ.
llvm-svn: 139053
2011-09-02 23:43:09 +00:00
Jim Grosbach
2ea035b027 Thumb2 parsing and encoding for BIC.
llvm-svn: 139052
2011-09-02 23:37:54 +00:00
Jim Grosbach
588f94c09b Thumb2 parsing and encoding for BFI.
llvm-svn: 139051
2011-09-02 23:28:46 +00:00
Jim Grosbach
7a45cb2b33 Thumb2 parsing and encoding for BFC.
llvm-svn: 139050
2011-09-02 23:25:46 +00:00
Jim Grosbach
44483a9ba5 Thumb2 parsing and encoding of B instruction.
Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.

llvm-svn: 139049
2011-09-02 23:22:08 +00:00
Andrew Trick
cac23d1858 Attempt to silence known valgrind errors.
llvm-svn: 139048
2011-09-02 22:59:34 +00:00
Jakob Stoklund Olesen
c710d8fdc7 Remove unused variables.
llvm-svn: 139047
2011-09-02 22:41:25 +00:00
Bill Wendling
145872a92c Try to eliminate the use of the 'unwind' instruction.
llvm-svn: 139046
2011-09-02 22:41:11 +00:00
Eli Friedman
383a3c76b2 Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel.
llvm-svn: 139044
2011-09-02 22:33:24 +00:00
Jim Grosbach
ba4ceeaae6 Thumb2 parsing and encoding for ASR.
For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.

llvm-svn: 139040
2011-09-02 21:28:54 +00:00
Bill Wendling
267bc5089a Better fix for this testcase. Update it to the new EH scheme entirely.
llvm-svn: 139039
2011-09-02 21:27:08 +00:00
Bill Wendling
a4f9142ad4 Update for new EH stuff. (I'm not sure if this is 100% correct.)
llvm-svn: 139038
2011-09-02 21:24:17 +00:00
Andrew Trick
f449c87835 Test case update for unroll-scev.
llvm-svn: 139037
2011-09-02 21:21:03 +00:00
Andrew Trick
43d88c3879 Comment and clarifying assert.
llvm-svn: 139036
2011-09-02 21:20:46 +00:00
Bill Wendling
e35fdee39e No need to get fancy inserting a PHI node when the values are stored in stack
slots. This fixes a bug where the number of nodes coming into the PHI node may
not equal the number of predecessors. E.g., two or more landingpad instructions
may require a PHI before reaching the eh.exception and eh.selector instructions.

llvm-svn: 139035
2011-09-02 21:17:08 +00:00
David Greene
9cb3b3dd2e Make RecordVal Name an Init
Store a RecordVal's name as an Init to allow class-qualified Record
members to reference Records that have Init names.  We'll use this to
provide more programmability in how we name defs and their associated
members.

llvm-svn: 139031
2011-09-02 20:12:07 +00:00
Kevin Enderby
90a1526592 Change X86 disassembly to print immediates values as signed by default. Special
case those instructions that the immediate is not sign-extend.  radr://8795217

llvm-svn: 139028
2011-09-02 20:01:23 +00:00
Jim Grosbach
20ed697ea7 Tidy up. Formatting.
llvm-svn: 139024
2011-09-02 18:46:15 +00:00
Bill Wendling
3033d7846d Update comments to reflect reality.
llvm-svn: 139023
2011-09-02 18:43:33 +00:00
Jim Grosbach
a93f292add Tidy up. 80 columns.
llvm-svn: 139022
2011-09-02 18:43:25 +00:00
Jim Grosbach
cbf37eebff Thumb2 parsing and encoding for AND (register).
llvm-svn: 139021
2011-09-02 18:41:35 +00:00
Jakob Stoklund Olesen
d10a0768cb Simplify by using isFullCopy().
llvm-svn: 139019
2011-09-02 18:18:29 +00:00
Bill Wendling
991a1dab16 Revert r138826 until PR10834 can be fixed.
llvm-svn: 139018
2011-09-02 18:15:04 +00:00
Jim Grosbach
dd0421034a Thumb2 parsing and encoding for ADD (register).
llvm-svn: 139017
2011-09-02 18:14:46 +00:00
Duncan Sands
33f33411e8 Darwin wants ctors/dtors to be ordered the other way round to linux.
llvm-svn: 139015
2011-09-02 18:07:19 +00:00
Kevin Enderby
edfcba2f3c Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702.
llvm-svn: 139014
2011-09-02 18:03:03 +00:00