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Author SHA1 Message Date
Owen Anderson
309c4b7ef6 Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping. 
llvm-svn: 138834
 2011-08-30 22:03:20 +00:00
Owen Anderson
d9dbde4a50 Clean up whitespace. 
llvm-svn: 138833
 2011-08-30 21:58:18 +00:00
Bill Wendling
1e8c335302 Fix off-by-one error Benjamin noticed. 
llvm-svn: 138832
 2011-08-30 21:23:24 +00:00
Rafael Espindola
17f15bc464 Add a triple. 
llvm-svn: 138831
 2011-08-30 21:19:37 +00:00
Owen Anderson
58a5ca1320 Remove empty file. 
llvm-svn: 138830
 2011-08-30 21:17:20 +00:00
Owen Anderson
d3a9f00a58 Speculatively revert r138809 in an attempt to fix DragonEgg. 
llvm-svn: 138829
 2011-08-30 21:11:06 +00:00
Bill Wendling
569b9fee87 Enable compact unwind info by default. This only applies to Darwin when CFI is 
disabled.

llvm-svn: 138826
 2011-08-30 20:54:11 +00:00
Jeffrey Yasskin
8f36e758c2 Fix C++0x narrowing errors when char is unsigned. 
In the case of EDInstInfo, this would actually cause a bug when -1 became 255
and was then compared >=0 in llvm-mc/Disassembler.cpp.

llvm-svn: 138825
 2011-08-30 20:53:29 +00:00
Rafael Espindola
b1ed13e0e1 Preliminary documentation in docs/SegmentedStacks.html. 
llvm-svn: 138823
 2011-08-30 20:25:49 +00:00
Owen Anderson
9d3407e7c2 Port Thumb2 assembler tests over to disassembler tests. 
llvm-svn: 138822
 2011-08-30 20:03:11 +00:00
Rafael Espindola
83257fe618 Some test code to check if correct code is being generated. 
Patch by Sanjoy Das.

llvm-svn: 138820
 2011-08-30 19:51:29 +00:00
Nicolas Geoffray
7927005c3a The code model of JIT should default to JITDefault. 
llvm-svn: 138819
 2011-08-30 19:50:33 +00:00
Rafael Espindola
9db302e741 Adds support for variable sized allocas. For a variable sized alloca, 
code is inserted to first check if the current stacklet has enough
space. If so, space is allocated by simply decrementing the stack
pointer. Otherwise a runtime routine (__morestack_allocate_stack_space
in libgcc) is called which allocates the required memory from the
heap.

Patch by Sanjoy Das.

llvm-svn: 138818
 2011-08-30 19:47:04 +00:00
Rafael Espindola
7721c15106 Adds a SelectionDAG node X86SegAlloca which will be custom lowered 
from DYNAMIC_STACKALLOC.

Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which
will match X86SegAlloca (based on word size) are also added.  They
will be custom emitted to inject the actual stack handling code.

Patch by Sanjoy Das.

llvm-svn: 138814
 2011-08-30 19:43:21 +00:00
Rafael Espindola
321e47cd0b Emit segmented-stack specific code into function prologues for 
X86. Modify the pass added in the previous patch to call this new
code.

This new prologues generated will call a libgcc routine (__morestack)
to allocate more stack space from the heap when required

Patch by Sanjoy Das.

llvm-svn: 138812
 2011-08-30 19:39:58 +00:00
Rafael Espindola
84f69a1992 Command line option to enable support for segmented stacks: 
-segmented-stacks.
Patch by Sanjoy Das!

llvm-svn: 138811
 2011-08-30 19:29:02 +00:00
Evan Cheng
91aa81acaa Follow up to r138791. 
Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.

llvm-svn: 138810
 2011-08-30 19:09:48 +00:00
Owen Anderson
3ec8beb8c8 When walking backwards to eliminate final stores to allocas at the end of a function, encountering an unrelated store should not cause us to give up like encountering a load does. 
llvm-svn: 138809
 2011-08-30 18:51:55 +00:00
Benjamin Kramer
de3a6db63c Teach macho-dump how to dump linkedit_data load commands. 
llvm-svn: 138807
 2011-08-30 18:33:37 +00:00
Benjamin Kramer
67a03c6a96 Add load commands from Lion to Macho.h. 
llvm-svn: 138806
 2011-08-30 18:33:34 +00:00
Tobias Grosser
660f6d2616 Update docs: Bugpoint understands -O[123] 
Eli added this in revision 132695.

llvm-svn: 138805
 2011-08-30 18:26:11 +00:00
Andrew Trick
e1de7514f3 Lit option for ignoring stderr output. 
This is useful for testing a build a temporarily hand instrumented
build.
Patch by arrowdodger!

llvm-svn: 138804
 2011-08-30 17:42:33 +00:00
Roman Divacky
7ac1bc57f7 Set CR1EQ only when lowering vararg floating arguments (not any vararg 
arguments as before), unset CR1EQ otherwise.

llvm-svn: 138802
 2011-08-30 17:04:16 +00:00
James Molloy
a7a4266f83 Fix typos in SPUMCTargetDesc.h 
Patch supplied by Liu (projlc@gmail.com)

llvm-svn: 138799
 2011-08-30 07:27:02 +00:00
James Molloy
c537f89907 Fix typo in BlackfinFrameLowering.h 
Patch supplied by Liu (projlc@gmail.com)

llvm-svn: 138798
 2011-08-30 07:26:11 +00:00
James Molloy
21b255e052 Fix typo in MSP430MCTargetDesc.h. 
Patch supplied by Liu (projlc@gmail.com)

llvm-svn: 138797
 2011-08-30 07:24:47 +00:00
James Molloy
e841c9709a Fix typo in MipsMCTargetDesc.h; Patch supplied by Liu (proljc@gmail.com) 
llvm-svn: 138796
 2011-08-30 07:23:29 +00:00
Craig Topper
5556444bf7 Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807. 
llvm-svn: 138795
 2011-08-30 07:09:35 +00:00
Bob Wilson
cc7b5b71eb Do not try to rematerialize a value from a partial definition. 
I don't currently have a good testcase for this; will try to get one
tomorrow.  <rdar://problem/10032939>

llvm-svn: 138794
 2011-08-30 05:36:02 +00:00
Evan Cheng
1eacb83316 Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical 
register dependency (rather than glue them together). This is general
goodness as it gives scheduler more freedom. However it is motivated by
a nasty bug in isel.

When a i64 sub is expanded to subc + sube.
  libcall #1
     \
      \        subc 
       \       /  \
        \     /    \
         \   /    libcall #2
          sube

If the libcalls are not serialized (i.e. both have chains which are dag
entry), legalizer can serialize them in arbitrary orders. If it's
unlucky, it can force libcall #2 before libcall #1 in the above case.

  subc
   |
  libcall #2
   |
  libcall #1
   |
  sube

However since subc and sube are "glued" together, this ends up being a
cycle when the scheduler combine subc and sube as a single scheduling
unit.

The right solution is to fix LegalizeType too chains the libcalls together.
However, LegalizeType is not processing nodes in order so that's harder than
it should be. For now, the move to physical register dependency will do.

rdar://10019576

llvm-svn: 138791
 2011-08-30 01:34:54 +00:00
Jim Grosbach
187be92001 Revert 138781. It's not playing nicely with the immediate forms for ADC. 
llvm-svn: 138782
 2011-08-29 23:24:15 +00:00
Jim Grosbach
bc2d35e0ec Thumb2 assembler aliases for ADC/SBC w/o the .w suffix. 
llvm-svn: 138781
 2011-08-29 23:20:54 +00:00
Owen Anderson
4bd28c69c4 Add missing encoding information for some of the GPR<->FP register moves. 
llvm-svn: 138780
 2011-08-29 23:15:25 +00:00
Jim Grosbach
d71237315a Remove redundant tests from XFAIL'ed test file. 
llvm-svn: 138779
 2011-08-29 23:04:04 +00:00
Jim Grosbach
00dc3313fc Thumb2 assembly parsing and encoding support for ADC(immediate). 
llvm-svn: 138778
 2011-08-29 23:01:38 +00:00
Jim Grosbach
3bd8967df7 Remove test file. Superceded by other more exhaustive tests. 
llvm-svn: 138777
 2011-08-29 23:00:19 +00:00
Jim Grosbach
a1aa6a2e8b Thumb2 parsing and encoding for IT blocks. 
llvm-svn: 138773
 2011-08-29 22:24:09 +00:00
Kevin Enderby
f1aef98ad2 Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217 
llvm-svn: 138771
 2011-08-29 22:06:28 +00:00
Eli Friedman
4d90e53381 Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. 
llvm-svn: 138768
 2011-08-29 21:15:46 +00:00
Jim Grosbach
447ede4d6e Tidy up. Whitespace. 
llvm-svn: 138767
 2011-08-29 21:15:20 +00:00
Owen Anderson
bbb6ed8264 Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand encodings to the load-store optimizer that I applied to the instruction selector in r138758. Fixes ary3 from the nightly test suite. 
llvm-svn: 138766
 2011-08-29 21:14:19 +00:00
Bill Wendling
d9df43679c Fix grammar, noticed by Duncan. 
llvm-svn: 138764
 2011-08-29 21:03:12 +00:00
Owen Anderson
518e14771a Specify an additional fixed bit in the PLD/PLDW/PLI register-register encoding. 
llvm-svn: 138760
 2011-08-29 20:42:00 +00:00
Bill Wendling
87d029bc27 Update tests to new EH model. Add landingpad instructions to landing pads. 
llvm-svn: 138759
 2011-08-29 20:39:23 +00:00
Owen Anderson
44c24b13a3 addrmode_imm12 and addrmode2_offset encode their immediate values differently. Update the manual instruction selection code that was encoding them the addrmode2 way even though LDR_PRE_IMM/LDRB_PRE_IMM had switched to addrmode_imm12. Should fix a number of nightly test failures. 
llvm-svn: 138758
 2011-08-29 20:16:50 +00:00
Nadav Rotem
43912ff374 Fixes following the CR by Chris and Duncan: 
Optimize chained bitcasts of the form A->B->A.
Undo r138722 and change isEliminableCastPair to allow this case.

llvm-svn: 138756
 2011-08-29 19:58:36 +00:00
Owen Anderson
e14d6edccc Improve handling of #-0 offsets for many more pre-indexed addressing modes. 
llvm-svn: 138754
 2011-08-29 19:36:44 +00:00
Bill Wendling
6d2c747e53 Initialize CompactUnwindSection so that other targets won't use an uninitialized value. 
llvm-svn: 138752
 2011-08-29 18:25:59 +00:00
Eli Friedman
6d27cb5e01 Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well enough to fix properly. 
llvm-svn: 138751
 2011-08-29 18:23:02 +00:00
Jim Grosbach
a5a8e59643 Tidy up. 80 columns. 
llvm-svn: 138750
 2011-08-29 18:22:04 +00:00